From nobody Sat May 4 00:47:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+73069+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+73069+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1616399680; cv=none; d=zohomail.com; s=zohoarc; b=i8Fnplf3rulJ3RDQEKYLf53m35xUOJtnoEmZyRPdQcKS8oMeBPlr2k7hIUQuZjj4YOg6r1z5sSUHHkiTAFPaXAMPaAEPehZCInxmE1NOauimtoBxSC7MStokVWPrd9v1CuoJ4f51XBbNigw5+okKIpchOI/tiDgvtvoKHDNV9Gg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1616399680; h=Content-Transfer-Encoding:Cc:Date:From:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=o6cF422CdTsh2SCw96BjBxGMAULwfW9HNrYfaQOuGZo=; b=E1u8c7PyOTv7mUd4IyppMpUeH0wSONJvqCsbkycIxQepZ+EpnVMX5LW+nhT4GiiT8hf/7rZtKf9/S41XwytPuqgcM3BJjbq0oJHRvGemR87k7U5d4VBQGxF4fjTlAEIQrR2ccW5wILwYkpaoBT+zXpw6tqo/8V6NJ3QDYybzz7c= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+73069+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1616399680384365.8223181535708; Mon, 22 Mar 2021 00:54:40 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 9eXxYY1788612xIJwqVJSoRt; Mon, 22 Mar 2021 00:54:34 -0700 X-Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web10.9747.1616399674107148063 for ; Mon, 22 Mar 2021 00:54:34 -0700 IronPort-SDR: UjdvetxthPxfA4CtEortP4q1VhR3+UtaWOGpE8JwITzWHTphkQMzlYOXTtkHiUqcc70Uv0Ls71 2H1SsMkY1OVA== X-IronPort-AV: E=McAfee;i="6000,8403,9930"; a="177795636" X-IronPort-AV: E=Sophos;i="5.81,268,1610438400"; d="scan'208";a="177795636" X-Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2021 00:54:33 -0700 IronPort-SDR: zRHMCEBUNloLWG2LEfAHjHXxztsguODXggxfTQLoj+LsliwJRpEyaNH07rMO9dT5PvE2ln7SKI x8w4ADWbFgdQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,268,1610438400"; d="scan'208";a="412959278" X-Received: from ikuox-tiger-lake-client-platform.itwn.intel.com ([10.5.215.23]) by orsmga007.jf.intel.com with ESMTP; 22 Mar 2021 00:54:31 -0700 From: "IanX Kuo" To: devel@edk2.groups.io Cc: lersek@redhat.com, VincentX Ke , Ray Ni , Zhichao Gao Subject: [edk2-devel] [PATCH v5] ShellPkg/Pci: Add valid check for PCI extended config space parser Date: Mon, 22 Mar 2021 15:53:28 +0800 Message-Id: MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ianx.kuo@intel.com X-Gm-Message-State: WaJbSEn8cC2lopkXiVUwis6Ex1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1616399674; bh=HEgRvuLPGve4oedyrJaqASv/NQuWZqrhOHQyquWUaRo=; h=Cc:Date:From:Reply-To:Subject:To; b=GnBOFhkWP5ZdCHdtEzq+Yredt6zUCqBbkg8xTwzmIPqvvbs2/sw03ue9LQBbqp28Hxk eeCKLkGzn46xzZJg8Uawr0lNZA2xpCyA/edKJKvheLTFqFT7Rdy6XRktuXI93UKQ878Gi +q5n2LKBnF3N8ZIILkJSJXjVdP5eN8DRarM= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: VincentX Ke [edk2-devel] [PATCH v5] From: VincentX Ke Bugzilla: 3262 (https://bugzilla.tianocore.org/show_bug.cgi?id=3D3262) No need to print PCIe details while CapabilityId is 0xFFFF. Limit the NextCapabilityOffset to PCI/PCIe configuration space. Cc: Ray Ni Cc: Zhichao Gao Signed-off-by: VincentX Ke Change-Id: I951d0a040154873e6459730e76eccca36c31f6c2 --- ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c b/ShellPkg/L= ibrary/UefiShellDebug1CommandsLib/Pci.c index a2f04d8db5..1e5dc75e27 100644 --- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c +++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c @@ -2038,12 +2038,14 @@ LocatePciCapability ( =20 @param[in] PciExpressCap PCI Express capability buffer. @param[in] ExtendedConfigSpace PCI Express extended configuration space. + @param[in] ExtendedConfigSize PCI Express extended configuration size. @param[in] ExtendedCapability PCI Express extended capability ID to exp= lain. **/ VOID PciExplainPciExpress ( IN PCI_CAPABILITY_PCIEXP *PciExpressCap, IN UINT8 *ExtendedConfigSpace, + IN UINTN ExtendedConfigSize, IN CONST UINT16 ExtendedCapability ); =20 @@ -2921,6 +2923,7 @@ ShellCommandRunPci ( PciExplainPciExpress ( (PCI_CAPABILITY_PCIEXP *) ((UINT8 *) &ConfigSpace + PcieCapabili= tyPtr), ExtendedConfigSpace, + ExtendedConfigSize, ExtendedCapability ); } @@ -5698,12 +5701,14 @@ PrintPciExtendedCapabilityDetails( =20 @param[in] PciExpressCap PCI Express capability buffer. @param[in] ExtendedConfigSpace PCI Express extended configuration space. + @param[in] ExtendedConfigSize PCI Express extended configuration size. @param[in] ExtendedCapability PCI Express extended capability ID to exp= lain. **/ VOID PciExplainPciExpress ( IN PCI_CAPABILITY_PCIEXP *PciExpressCap, IN UINT8 *ExtendedConfigSpace, + IN UINTN ExtendedConfigSize, IN CONST UINT16 ExtendedCapability ) { @@ -5786,7 +5791,7 @@ PciExplainPciExpress ( } =20 ExtHdr =3D (PCI_EXP_EXT_HDR*)ExtendedConfigSpace; - while (ExtHdr->CapabilityId !=3D 0 && ExtHdr->CapabilityVersion !=3D 0) { + while (ExtHdr->CapabilityId !=3D 0 && ExtHdr->CapabilityVersion !=3D 0 &= & ExtHdr->CapabilityId !=3D 0xFFFF) { // // Process this item // @@ -5800,7 +5805,8 @@ PciExplainPciExpress ( // // Advance to the next item if it exists // - if (ExtHdr->NextCapabilityOffset !=3D 0) { + if (ExtHdr->NextCapabilityOffset !=3D 0 && + (ExtHdr->NextCapabilityOffset <=3D (UINT32) (ExtendedConfigSize + E= FI_PCIE_CAPABILITY_BASE_OFFSET - sizeof (PCI_EXP_EXT_HDR)))) { ExtHdr =3D (PCI_EXP_EXT_HDR*)(ExtendedConfigSpace + ExtHdr->NextCapa= bilityOffset - EFI_PCIE_CAPABILITY_BASE_OFFSET); } else { break; --=20 2.18.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#73069): https://edk2.groups.io/g/devel/message/73069 Mute This Topic: https://groups.io/mt/81519102/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-