From nobody Mon Apr 29 15:38:01 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+49022+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+49022+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=nvidia.com ARC-Seal: i=1; a=rsa-sha256; t=1571160052; cv=none; d=zoho.com; s=zohoarc; b=k+78fXmMuMgvB/L9Xt69klBiBerCQQerrMsl9UVVywnFPmIsPnHjDKJj4OZ5SU1Ne9f1n1fhKtmk3ywIiKTsJ0fg6DU0gaR5Gmi0CBVB4ZiaJyPxw96/bGL7oLMwsganvPgTljfeNzMbxPxlgNA+TU3xI1ylqkGLRJ052vnf1k0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571160052; h=Content-Type:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=4HkCZyshW1XwlLigPGTSedVslDUSlJE4+bGcMs7G4J0=; b=M67WrwRT1fHTk0+s2KEGXb19fpXlssBOEIWsRd50a5x/buJThqGdINoGds8B2VnxGQhCdROR3rqbM2azmm7i4rD2lAcVhQJYEGE+ac9r+Y9Z2rsm3wMEqP9qe7A1qD8Y89xlycfe6vwFqzd4DLU8M+6IjTs0w4FDm/LySoqjl+4= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+49022+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1571160052702148.82623458083856; Tue, 15 Oct 2019 10:20:52 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 0GWPYY1788612xxmcJgJHqJn; Tue, 15 Oct 2019 10:20:52 -0700 X-Received: from hqemgate16.nvidia.com (hqemgate16.nvidia.com [216.228.121.65]) by mx.groups.io with SMTP id smtpd.web12.323.1571160051853710201 for ; Tue, 15 Oct 2019 10:20:51 -0700 X-Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 15 Oct 2019 10:20:53 -0700 X-Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Tue, 15 Oct 2019 10:20:51 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Tue, 15 Oct 2019 10:20:51 -0700 X-Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 15 Oct 2019 17:20:50 +0000 X-Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Tue, 15 Oct 2019 17:20:50 +0000 X-Received: from ashishsingha-lnx.nvidia.com (Not Verified[10.28.48.147]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Tue, 15 Oct 2019 10:20:51 -0700 From: "Ashish Singhal" To: , , , CC: Ashish Singhal Subject: [edk2-devel] [PATCH v4 1/2] MdeModulePkg/XhciDxe: Fix Aligned Page Allocation Date: Tue, 15 Oct 2019 11:20:46 -0600 Message-ID: In-Reply-To: References: X-NVConfidentiality: public MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ashishsingha@nvidia.com X-Gm-Message-State: FNHYCVbvDnbYBDkJPoJ76Llhx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1571160052; bh=J0LDr3Ar/YeQMXfovJthBBfQRp6BV1vN/iRxPbx+gzQ=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=g5HuKnI18s40/gvTlASjxHV8cjkPovS6J2bBPsUOdFcXIVfa8UbIN8pEKevSLUz/Lh7 koSRGp03iKziBx5liK2J2G3wVIuJbEiUf98f98gR7bA4ITqx1Wl6u0DaUIEBwwc7nZbSl J5mDVojevIZXgZ1/cPpcP+NsHUmM86Wepwc= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" While allocating pages aligned at an alignment higher than 4K, allocate memory taking into consideration the padding required for that alignment. The calls to free pages takes care of this already. Signed-off-by: Ashish Singhal Reviewed-by: Hao A Wu --- MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c b/MdeModulePkg/Bus/Pci= /XhciDxe/UsbHcMem.c index fd79988..aa69c47 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c +++ b/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c @@ -656,7 +656,7 @@ UsbHcAllocateAlignedPages ( PciIo, AllocateAnyPages, EfiBootServicesData, - Pages, + RealPages, &Memory, 0 ); --=20 2.7.4 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#49022): https://edk2.groups.io/g/devel/message/49022 Mute This Topic: https://groups.io/mt/34547968/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 15:38:01 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+49024+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+49024+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=nvidia.com ARC-Seal: i=1; a=rsa-sha256; t=1571160053; cv=none; d=zoho.com; s=zohoarc; b=nCpAD1GW0r2c0DGYcn6mgcpZdqBUgQ/5XVhfub/JCQgktOvxKVzzyMOpJubGxyKVZSaiPAPbphMlB4uvRF1HYjeZLn8V7606vHnkx4q6TExPr0XKuN07eym9XGLhf7Uf8kDQrjUIN9W9UpsJva6j8k+8WSRGIwy9x/59N13J+hA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571160053; h=Content-Type:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=u4fODBDXG/3ZRcfVEUDBwGBY85BadJLiRGfhDL55hmw=; b=RQ0hp8xRdvg5yhjzAvHzCqIKpyDpF9wkvizYCG9OHcr/Nt9yGu0kYJ2E4BHEVm7oOk6DO5NSAAFk43PDRY0IK5l9eQh0Bgu+LQG/6MYDA6fSY4kgVSVcY8zVXdeXRNQcAaJRr29m04vmrqAKrn+r0uHWK0rkoQuoF8JWC1ndhaY= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+49024+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1571160053422919.6502917869226; Tue, 15 Oct 2019 10:20:53 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id AAu9YY1788612xDeLzlSCURw; Tue, 15 Oct 2019 10:20:52 -0700 X-Received: from hqemgate15.nvidia.com (hqemgate15.nvidia.com [216.228.121.64]) by mx.groups.io with SMTP id smtpd.web11.342.1571160052380780205 for ; Tue, 15 Oct 2019 10:20:52 -0700 X-Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 15 Oct 2019 10:21:03 -0700 X-Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 15 Oct 2019 10:20:52 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 15 Oct 2019 10:20:52 -0700 X-Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 15 Oct 2019 17:20:51 +0000 X-Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 15 Oct 2019 17:20:51 +0000 X-Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Tue, 15 Oct 2019 17:20:51 +0000 X-Received: from ashishsingha-lnx.nvidia.com (Not Verified[10.28.48.147]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Tue, 15 Oct 2019 10:20:51 -0700 From: "Ashish Singhal" To: , , , CC: Ashish Singhal Subject: [edk2-devel] [PATCH v4 2/2] MdeModulePkg/XhciPei: Fix Aligned Page Allocation Date: Tue, 15 Oct 2019 11:20:47 -0600 Message-ID: In-Reply-To: References: X-NVConfidentiality: public MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ashishsingha@nvidia.com X-Gm-Message-State: UB6IelhgLVAB0iBiCzk26RRHx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1571160052; bh=qGrVQat9amM4h0hIyJPuQz9PevC+TNdmVTOu131rtHM=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=PN270ilYibhd/TYUT0jPMT8mhPzidE3t4BI3onSCLit5qHxYtAnMIe8QRMhenk7nc9Y y5ULUiSLt5aMG6Au7yvgJP7y8Yww6K+ZP6j6pt33jJ/zQ0S7Kjv3hZiqbbRkOUm31mf9W Q1w9B71qOun2TxQIxaJBG8IE0A729DUE6es= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for allocating aligned pages at an alignment higher than 4K. The new function allocated memory taking into account the padding required and then frees up unused pages before mapping it. Change-Id: I32d36bfbff0eee93d14a9a1a86e5ce7635251b64 Signed-off-by: Ashish Singhal Reviewed-by: Hao A Wu --- MdeModulePkg/Bus/Pci/XhciPei/DmaMem.c | 128 ++++++++++++++++++++++++++++= ++++ MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.c | 25 +------ MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h | 28 +++++++ 3 files changed, 160 insertions(+), 21 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/XhciPei/DmaMem.c b/MdeModulePkg/Bus/Pci/X= hciPei/DmaMem.c index 71d6113..c4d93ae 100644 --- a/MdeModulePkg/Bus/Pci/XhciPei/DmaMem.c +++ b/MdeModulePkg/Bus/Pci/XhciPei/DmaMem.c @@ -225,6 +225,134 @@ IoMmuFreeBuffer ( } =20 /** + Allocates aligned pages that are suitable for an OperationBusMasterCommo= nBuffer or + OperationBusMasterCommonBuffer64 mapping. + + @param Pages The number of pages to allocate. + @param Alignment The requested alignment of the allocation.= Must be a power of two. + @param HostAddress A pointer to store the base system memory = address of the + allocated range. + @param DeviceAddress The resulting map address for the bus mast= er PCI controller to use to + access the hosts HostAddress. + @param Mapping A resulting value to pass to Unmap(). + + @retval EFI_SUCCESS The requested memory pages were allocated. + @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal = attribute bits are + MEMORY_WRITE_COMBINE and MEMORY_CACHED. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. + +**/ +EFI_STATUS +IoMmuAllocateAlignedBuffer ( + IN UINTN Pages, + IN UINTN Alignment, + OUT VOID **HostAddress, + OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, + OUT VOID **Mapping + ) +{ + EFI_STATUS Status; + VOID *Memory; + UINTN AlignedMemory; + UINTN AlignmentMask; + UINTN UnalignedPages; + UINTN RealPages; + UINTN NumberOfBytes; + EFI_PHYSICAL_ADDRESS HostPhyAddress; + + *HostAddress =3D NULL; + *DeviceAddress =3D 0; + AlignmentMask =3D Alignment - 1; + + // + // Calculate the total number of pages since alignment is larger than pa= ge size. + // + RealPages =3D Pages + EFI_SIZE_TO_PAGES (Alignment); + + // + // Make sure that Pages plus EFI_SIZE_TO_PAGES (Alignment) does not over= flow. + // + ASSERT (RealPages > Pages); + + if (mIoMmu !=3D NULL) { + Status =3D mIoMmu->AllocateBuffer ( + mIoMmu, + EfiBootServicesData, + RealPages, + HostAddress, + 0 + ); + if (EFI_ERROR (Status)) { + return EFI_OUT_OF_RESOURCES; + } + Memory =3D *HostAddress; + AlignedMemory =3D ((UINTN) Memory + AlignmentMask) & ~AlignmentMask; + UnalignedPages =3D EFI_SIZE_TO_PAGES (AlignedMemory - (UINTN) Memory); + if (UnalignedPages > 0) { + // + // Free first unaligned page(s). + // + Status =3D mIoMmu->FreeBuffer ( + mIoMmu, + UnalignedPages, + Memory); + if (EFI_ERROR (Status)) { + return Status; + } + } + Memory =3D (VOID *)(UINTN)(AlignedMemory + EFI_PAGES_TO_SIZE (= Pages)); + UnalignedPages =3D RealPages - Pages - UnalignedPages; + if (UnalignedPages > 0) { + // + // Free last unaligned page(s). + // + Status =3D mIoMmu->FreeBuffer ( + mIoMmu, + UnalignedPages, + Memory); + if (EFI_ERROR (Status)) { + return Status; + } + } + *HostAddress =3D (VOID *) AlignedMemory; + NumberOfBytes =3D EFI_PAGES_TO_SIZE(Pages); + Status =3D mIoMmu->Map ( + mIoMmu, + EdkiiIoMmuOperationBusMasterCommonBuffer, + *HostAddress, + &NumberOfBytes, + DeviceAddress, + Mapping + ); + if (EFI_ERROR (Status)) { + return EFI_OUT_OF_RESOURCES; + } + Status =3D mIoMmu->SetAttribute ( + mIoMmu, + *Mapping, + EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE + ); + if (EFI_ERROR (Status)) { + return Status; + } + } else { + Status =3D PeiServicesAllocatePages ( + EfiBootServicesData, + RealPages, + &HostPhyAddress + ); + if (EFI_ERROR (Status)) { + return EFI_OUT_OF_RESOURCES; + } + *HostAddress =3D (VOID *)(((UINTN) HostPhyAddress + AlignmentMask) & ~= AlignmentMask); + *DeviceAddress =3D ((UINTN) HostPhyAddress + AlignmentMask) & ~Alignme= ntMask; + *Mapping =3D NULL; + } + return Status; +} + +/** Initialize IOMMU. **/ VOID diff --git a/MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.c b/MdeModulePkg/Bus/Pci= /XhciPei/UsbHcMem.c index 56c0b90..01f42285 100644 --- a/MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.c +++ b/MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.c @@ -562,11 +562,7 @@ UsbHcAllocateAlignedPages ( { EFI_STATUS Status; VOID *Memory; - UINTN AlignedMemory; - UINTN AlignmentMask; EFI_PHYSICAL_ADDRESS DeviceMemory; - UINTN AlignedDeviceMemory; - UINTN RealPages; =20 // // Alignment must be a power of two or zero. @@ -582,18 +578,9 @@ UsbHcAllocateAlignedPages ( } =20 if (Alignment > EFI_PAGE_SIZE) { - // - // Calculate the total number of pages since alignment is larger than = page size. - // - AlignmentMask =3D Alignment - 1; - RealPages =3D Pages + EFI_SIZE_TO_PAGES (Alignment); - // - // Make sure that Pages plus EFI_SIZE_TO_PAGES (Alignment) does not ov= erflow. - // - ASSERT (RealPages > Pages); - - Status =3D IoMmuAllocateBuffer ( + Status =3D IoMmuAllocateAlignedBuffer ( Pages, + Alignment, &Memory, &DeviceMemory, Mapping @@ -601,8 +588,6 @@ UsbHcAllocateAlignedPages ( if (EFI_ERROR (Status)) { return EFI_OUT_OF_RESOURCES; } - AlignedMemory =3D ((UINTN) Memory + AlignmentMask) & ~AlignmentMask; - AlignedDeviceMemory =3D ((UINTN) DeviceMemory + AlignmentMask) & ~Alig= nmentMask; } else { // // Do not over-allocate pages in this case. @@ -616,12 +601,10 @@ UsbHcAllocateAlignedPages ( if (EFI_ERROR (Status)) { return EFI_OUT_OF_RESOURCES; } - AlignedMemory =3D (UINTN) Memory; - AlignedDeviceMemory =3D (UINTN) DeviceMemory; } =20 - *HostAddress =3D (VOID *) AlignedMemory; - *DeviceAddress =3D (EFI_PHYSICAL_ADDRESS) AlignedDeviceMemory; + *HostAddress =3D Memory; + *DeviceAddress =3D DeviceMemory; =20 return EFI_SUCCESS; } diff --git a/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h b/MdeModulePkg/Bus/Pci/= XhciPei/XhcPeim.h index 480e13b..03a55f3 100644 --- a/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h +++ b/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h @@ -342,4 +342,32 @@ IoMmuFreeBuffer ( IN VOID *Mapping ); =20 +/** + Allocates aligned pages that are suitable for an OperationBusMasterCommo= nBuffer or + OperationBusMasterCommonBuffer64 mapping. + + @param Pages The number of pages to allocate. + @param Alignment The requested alignment of the allocation.= Must be a power of two. + @param HostAddress A pointer to store the base system memory = address of the + allocated range. + @param DeviceAddress The resulting map address for the bus mast= er PCI controller to use to + access the hosts HostAddress. + @param Mapping A resulting value to pass to Unmap(). + + @retval EFI_SUCCESS The requested memory pages were allocated. + @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal = attribute bits are + MEMORY_WRITE_COMBINE and MEMORY_CACHED. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. + +**/ +EFI_STATUS +IoMmuAllocateAlignedBuffer ( + IN UINTN Pages, + IN UINTN Alignment, + OUT VOID **HostAddress, + OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, + OUT VOID **Mapping + ); + #endif --=20 2.7.4 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#49024): https://edk2.groups.io/g/devel/message/49024 Mute This Topic: https://groups.io/mt/34547970/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-