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Mon, 19 Aug 2019 21:36:04 +0000 From: "Lendacky, Thomas" To: "devel@edk2.groups.io" CC: Jordan Justen , Laszlo Ersek , Ard Biesheuvel , Michael D Kinney , Liming Gao , Eric Dong , Ray Ni , "Singh, Brijesh" Subject: [edk2-devel] [RFC PATCH 13/28] UefiCpuPkg/CpuExceptionHandler: Add support for CPUID NAE events Thread-Topic: [RFC PATCH 13/28] UefiCpuPkg/CpuExceptionHandler: Add support for CPUID NAE events Thread-Index: AQHVVtYasnqA0UoIf0epM4taCoCEnw== Date: Mon, 19 Aug 2019 21:36:04 +0000 Message-ID: References: In-Reply-To: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SN2PR01CA0031.prod.exchangelabs.com (2603:10b6:804:2::41) To BYAPR12MB3158.namprd12.prod.outlook.com (2603:10b6:a03:132::19) x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [165.204.77.1] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 41beaa64-1f71-437c-01fa-08d724ed3cd8 x-ms-office365-filtering-ht: Tenant x-ms-traffictypediagnostic: BYAPR12MB2965: x-ms-exchange-purlcount: 1 x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:8273; 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,thomas.lendacky@amd.com Content-Language: en-US Content-ID: Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1566301166; bh=y9GJIYThMdu50r4ExYevFxrhwJRZBUoDQY//6WQHAY0=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=FObgD4EWrwkTYy13l0JC9DRJNGZ2AJKakxTPKzKXeuYERodiK+FGrAYARdO28N7yHiU htThlwHCmOEVDb//FsmSNRbCvmBaOPg+UWoetx2IXVBVOBqzIGB5A2cnjD3RQQPOReNmV pzjXMMTUfBkHxqNOChH/XKqT3QfnWwOvM3w= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Tom Lendacky Under SEV-ES, a CPUID intercept generates a #VC exception. VMGEXIT must be used to allow the hypervisor to handle this intercept. Add support to construct the required GHCB values to support a CPUID NAE event. Additionally, CPUID 0x0000_000d requires XCR0 to be supplied in the GHCB, so add support to issue the XGETBV instruction. Signed-off-by: Tom Lendacky --- MdePkg/Library/BaseLib/BaseLib.inf | 1 + MdePkg/Include/Library/BaseLib.h | 16 +++++++ MdePkg/Library/BaseLib/X64/GccInline.c | 28 ++++++++++++ .../X64/AMDSevVcCommon.c | 45 +++++++++++++++++++ MdePkg/Library/BaseLib/X64/XGetBv.nasm | 39 ++++++++++++++++ 5 files changed, 129 insertions(+) create mode 100644 MdePkg/Library/BaseLib/X64/XGetBv.nasm diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/Ba= seLib.inf index a41401340f95..7c1c077c63a9 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -287,6 +287,7 @@ [Sources.X64] X64/ReadCr0.nasm| MSFT X64/ReadEflags.nasm| MSFT X64/VmgExit.nasm | MSFT + X64/XGetBv.nasm | MSFT =20 =20 X64/Non-existing.c diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/Base= Lib.h index 80bd5cf57a72..ae16fa6f1c52 100644 --- a/MdePkg/Include/Library/BaseLib.h +++ b/MdePkg/Include/Library/BaseLib.h @@ -7893,6 +7893,22 @@ AsmVmgExit ( VOID ); =20 +/** + Executes a XGETBV instruction + + Executes a XGETBV instruction. This function is only available on IA-32 = and + x64. + + @param[in] Index Extended control register index + + @retval The current value of the extended control regist= er +**/ +UINT64 +EFIAPI +AsmXGetBv ( + IN UINT32 Index + ); + =20 /** Patch the immediate operand of an IA32 or X64 instruction such that the = byte, diff --git a/MdePkg/Library/BaseLib/X64/GccInline.c b/MdePkg/Library/BaseLi= b/X64/GccInline.c index 17539caa0798..46aa96d67ab9 100644 --- a/MdePkg/Library/BaseLib/X64/GccInline.c +++ b/MdePkg/Library/BaseLib/X64/GccInline.c @@ -1814,4 +1814,32 @@ AsmVmgExit ( __asm__ __volatile__ ("rep; vmmcall":::"memory"); } =20 +/** + Executes a XGETBV instruction + + Executes a XGETBV instruction. This function is only available on IA-32 = and + x64. + + @param[in] Index Extended control register index + + @retval The current value of the extended control regist= er +**/ +UINT64 +EFIAPI +AsmXGetBv ( + IN UINT32 Index + ) +{ + UINT32 LowData; + UINT32 HighData; + + __asm__ __volatile__ ( + "xgetbv" + : "=3Da" (LowData), // %0 + "=3Dd" (HighData) // %1 + : "c" (Index) // %2 + ); + + return (((UINT64)HighData) << 32) | LowData; +} =20 diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c= b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c index 2bc156840e74..66cd0f9eb196 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c @@ -3,6 +3,8 @@ #include #include "AMDSevVcCommon.h" =20 +#define CR4_OSXSAVE (1 << 18) + typedef enum { LongMode64Bit =3D 0, LongModeCompat32Bit, @@ -473,6 +475,45 @@ IoioExit ( return 0; } =20 +STATIC +UINTN +CpuidExit ( + GHCB *Ghcb, + EFI_SYSTEM_CONTEXT_X64 *Regs, + SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + UINTN Status; + + Ghcb->SaveArea.Rax =3D Regs->Rax; + GhcbSetRegValid (Ghcb, GhcbRax); + Ghcb->SaveArea.Rcx =3D Regs->Rcx; + GhcbSetRegValid (Ghcb, GhcbRcx); + if (Regs->Rax =3D=3D 0x0000000d) { + Ghcb->SaveArea.XCr0 =3D (AsmReadCr4 () & CR4_OSXSAVE) ? AsmXGetBv (0) = : 1; + GhcbSetRegValid (Ghcb, GhcbXCr0); + } + + Status =3D VmgExit (Ghcb, SvmExitCpuid, 0, 0); + if (Status) { + return Status; + } + + if (!GhcbIsRegValid (Ghcb, GhcbRax) || + !GhcbIsRegValid (Ghcb, GhcbRbx) || + !GhcbIsRegValid (Ghcb, GhcbRcx) || + !GhcbIsRegValid (Ghcb, GhcbRdx)) { + VmgExit (Ghcb, SvmExitUnsupported, SvmExitCpuid, 0); + ASSERT (0); + } + Regs->Rax =3D Ghcb->SaveArea.Rax; + Regs->Rbx =3D Ghcb->SaveArea.Rbx; + Regs->Rcx =3D Ghcb->SaveArea.Rcx; + Regs->Rdx =3D Ghcb->SaveArea.Rdx; + + return 0; +} + UINTN DoVcCommon ( GHCB *Ghcb, @@ -489,6 +530,10 @@ DoVcCommon ( =20 ExitCode =3D Regs->ExceptionData; switch (ExitCode) { + case SvmExitCpuid: + NaeExit =3D CpuidExit; + break; + case SvmExitIoioProt: NaeExit =3D IoioExit; break; diff --git a/MdePkg/Library/BaseLib/X64/XGetBv.nasm b/MdePkg/Library/BaseLi= b/X64/XGetBv.nasm new file mode 100644 index 000000000000..83c10b40e369 --- /dev/null +++ b/MdePkg/Library/BaseLib/X64/XGetBv.nasm @@ -0,0 +1,39 @@ +;-------------------------------------------------------------------------= ----- +; +; Copyright (c) 2019, Advanced Micro Device, Inc. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BS= D License +; which accompanies this distribution. The full text of the license may b= e found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. +; +; Module Name: +; +; XGetBv.Asm +; +; Abstract: +; +; AsmXgetBv function +; +; Notes: +; +;-------------------------------------------------------------------------= ----- + + DEFAULT REL + SECTION .text + +;-------------------------------------------------------------------------= ----- +; VOID +; EFIAPI +; AsmXGetBv ( +; IN UINT32 Index +; ); +;-------------------------------------------------------------------------= ----- +global ASM_PFX(AsmXGetBv) +ASM_PFX(AsmXGetBv): + xgetbv + shl rdx, 0x20 + or rax, rdx + ret --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#46099): https://edk2.groups.io/g/devel/message/46099 Mute This Topic: https://groups.io/mt/32966271/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-