From nobody Sun Feb 8 15:46:38 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+98271+1787277+3901457@groups.io; arc=fail (BodyHash is different from the expected one) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1673417798800497.5564876681083; Tue, 10 Jan 2023 22:16:38 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id Yk8nYY1788612xXUS0OQ411E; Tue, 10 Jan 2023 22:16:38 -0800 X-Received: from NAM04-DM6-obe.outbound.protection.outlook.com (NAM04-DM6-obe.outbound.protection.outlook.com [40.107.102.73]) by mx.groups.io with SMTP id smtpd.web10.17360.1673417797106675156 for ; Tue, 10 Jan 2023 22:16:37 -0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=mdQuUMyNMkR3rSuLQE7uHHli4ZoK43JR6PHXOjk0Kfq3Ox6+561PwOmPA0QL5gpdkrsNa6UcdnFeIVJDyzwLYW6ISzyVc5GA3L0asdcLBzBhk9A34NpwLAVv0budF1JneQ9kMx3PZQBzmoA7PDFPTF1kTMHvuM+JM0oLByyl7cccHakNnStO/XT/PvaM/HHQbZ9bCrGe3CC7ry8Ihoy+ORI3Fo0U6K5VKn93CcIPypDi0C0wgE2c31g0Ir5409eTQJvH1TFds1W9Tk91inXwZGH1UC+ML+9Ks8h7Qua64xG7I8XhHOqDufbkKpaGrktHyMUTeL5fxKyow/xhrPaS3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=OcsJ0/bJqWzuNHmpRO3pWjdBHWX71orpgiObCpEmjo0=; b=On9v/Hej2nq6m2IuAzZ3Fy78JVP1iTbLiapPG/5Oh5AFSOblgXB7A3H1mtp5k1zwBy6P0wWWjRI1jnUZb5GuBybi6YYxVD4IOdLpV1qgZ84DjP2eiv1RJU5QlCcye4wQCfLabgHymH2lb6+l2rPIBAHbmmOzMAJuJNj2MrdwwURBmbfljVtNcKyWDRvPbDt+YM5qCc80pI8MRektb00P+uaUsX81xzWaI/W2snMshI8B4XBamLNkJcWTLAkzueO5jxuREQZUIcGOhsfq3r19mUX83UCTQVB0VtZVEXVjAp5XKrS+CY1KS6L9HEQlE7Yot3Apduw6YdvXo03WObBuTg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=edk2.groups.io smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none X-Received: from BN8PR07CA0002.namprd07.prod.outlook.com (2603:10b6:408:ac::15) by LV2PR12MB5894.namprd12.prod.outlook.com (2603:10b6:408:174::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.13; Wed, 11 Jan 2023 06:16:34 +0000 X-Received: from BN8NAM11FT079.eop-nam11.prod.protection.outlook.com (2603:10b6:408:ac:cafe::3b) by BN8PR07CA0002.outlook.office365.com (2603:10b6:408:ac::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.13 via Frontend Transport; Wed, 11 Jan 2023 06:16:34 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+98271+1787277+3901457@groups.io; helo=mail02.groups.io; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C X-Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT079.mail.protection.outlook.com (10.13.177.61) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5944.17 via Frontend Transport; Wed, 11 Jan 2023 06:16:34 +0000 X-Received: from SATLEXMB07.amd.com (10.181.41.45) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Wed, 11 Jan 2023 00:16:31 -0600 X-Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB07.amd.com (10.181.41.45) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Tue, 10 Jan 2023 22:16:16 -0800 X-Received: from BLR-LAB-SFW01.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Wed, 11 Jan 2023 00:16:12 -0600 From: "Abdul Lateef Attar via groups.io" To: CC: Abdul Lateef Attar , Abner Chang , Garrett Kirkendall , "Paul Grimes" , Eric Dong , Ray Ni , Rahul Kumar Subject: [edk2-devel] [PATCH v2 1/6] UefiCpuPkg/SmmCpuFeaturesLib: Restructure arch-dependent code Date: Wed, 11 Jan 2023 11:45:39 +0530 Message-ID: In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT079:EE_|LV2PR12MB5894:EE_ X-MS-Office365-Filtering-Correlation-Id: 3ebdbce8-cc95-4110-884e-08daf39b63ad X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Message-Info: wVWvq+AJYTVi69C6F4NOWZzq/FGF4hNSXW50BAI9K9Mfy4BK/tOL+6N/LeuV8hTQ/1LGKNUogBJXl7tXRkCX+FwyXJ3doAvHtp9oQXN1K3bNqahsMLXDoUtFVv1kpq/SweUNd+eR2oGMSXbdfAItdmXQR4Xxs+pXW7lKjUMSpTuCzxatSHrQ7Qem33BYb5Fr6/9GEI7FF1QHXq7Aloa4JJkppyIuYLvelwtIQjnxoGyGHT/Lbc3N4lggj7ReFB5WU26PI07hsfg2850L2jwW/vAi5qG1OAkenwQJgf4aj1u6CogAtYNxAPYNGquCGDqPmzVZBaLZNtwbNNYrf/sTj+wxWXFWIDdaipuy7X3EGJq0mpFGp9DXG7Y3phc0rQU5DA/C8EGFaNp0dJG6YXIekFY37H5cqamIlpUS462G6umEoHNDyJQQ+eFCmapordfJL/eULSI565go3Dbj6N0h4I3enushAFlYzNO9EV4c+gp1csbddIgW065L8vurxUE/ukoeFeqMJAdZKRZDykSInfQeBRywPdBeOmqORsuTh2QWMWANkDxQ+VwD5JpbMnWacgBnjDx1C4VIfrTeAPCwYDsGLlyXV2PoTGlhtM+BkoxHTBY4AGxlp0hUZxngihhpZNlhJ46GxSFyyRwEakDZtbA9fcIJpveZyAfZfOl9RyE6KB2tr0tP2LJ232VOR5wNPHoQs1kRqZZPpPNiSm2pR8khIndQLtEqTX/SWkJNmF609K+ZqRlB6GfWf30R3RlR6wX80uA4VPvL/gQGg6Wf/g== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Jan 2023 06:16:34.3831 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3ebdbce8-cc95-4110-884e-08daf39b63ad X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT079.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5894 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,abdattar@amd.com X-Gm-Message-State: lL1wvsuWAssg0qI72Xb80Lwgx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1673417798; bh=ME/VET/iaLQqFePSvTyjcpWk5PulwDl/zysw/Jw+Fc0=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=q3P28oW7s+0hualRZjm3eqDJAwqp8oCcW0sfLs/OZ2Chw2ch2h1BPaafDT2Q45vjR2u k/+MxDU1P/DS7FJMa7XiX5RC5eMQaUgAZNd0y7czuHVkb43ZE7BVdrhOEAfMRlV2mhzC6 WuyTYeCwI++lsXeY4l9JUZmK8qnISpcIhu4= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1673417800919100001 Content-Type: text/plain; charset="utf-8" From: Abdul Lateef Attar BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4182 moves Intel-specific code to the arch-dependent file. Other processor families might have different implementation of these functions. Hence, moving out of the common file. Cc: Abner Chang Cc: Garrett Kirkendall Cc: Paul Grimes Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Signed-off-by: Abdul Lateef Attar Reviewed-by: Abner Chang --- .../IntelSmmCpuFeaturesLib.c | 128 ++++++++++++++++++ .../SmmCpuFeaturesLibCommon.c | 128 ------------------ 2 files changed, 128 insertions(+), 128 deletions(-) diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c = b/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c index d5eaaa7a991e..33b1ddf8cfa9 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c @@ -400,3 +400,131 @@ SmmCpuFeaturesSetSmmRegister ( AsmWriteMsr64 (SMM_FEATURES_LIB_SMM_FEATURE_CONTROL, Value); } } + +/** + This function updates the SMRAM save state on the currently executing CPU + to resume execution at a specific address after an RSM instruction. This + function must evaluate the SMRAM save state to determine the execution m= ode + the RSM instruction resumes and update the resume execution address with + either NewInstructionPointer32 or NewInstructionPoint. The auto HALT re= start + flag in the SMRAM save state must always be cleared. This function retu= rns + the value of the instruction pointer from the SMRAM save state that was + replaced. If this function returns 0, then the SMRAM save state was not + modified. + + This function is called during the very first SMI on each CPU after + SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mo= de + to signal that the SMBASE of each CPU has been updated before the default + SMBASE address is used for the first SMI to the next CPU. + + @param[in] CpuIndex The index of the CPU to hook. The v= alue + must be between 0 and the NumberOfCp= us + field in the System Management Syste= m Table + (SMST). + @param[in] CpuState Pointer to SMRAM Save State Map for = the + currently executing CPU. + @param[in] NewInstructionPointer32 Instruction pointer to use if resumi= ng to + 32-bit execution mode from 64-bit SM= M. + @param[in] NewInstructionPointer Instruction pointer to use if resumi= ng to + same execution mode as SMM. + + @retval 0 This function did modify the SMRAM save state. + @retval > 0 The original instruction pointer value from the SMRAM save = state + before it was replaced. +**/ +UINT64 +EFIAPI +SmmCpuFeaturesHookReturnFromSmm ( + IN UINTN CpuIndex, + IN SMRAM_SAVE_STATE_MAP *CpuState, + IN UINT64 NewInstructionPointer32, + IN UINT64 NewInstructionPointer + ) +{ + return 0; +} + +/** + Read an SMM Save State register on the target processor. If this functi= on + returns EFI_UNSUPPORTED, then the caller is responsible for reading the + SMM Save Sate register. + + @param[in] CpuIndex The index of the CPU to read the SMM Save State. = The + value must be between 0 and the NumberOfCpus field= in + the System Management System Table (SMST). + @param[in] Register The SMM Save State register to read. + @param[in] Width The number of bytes to read from the CPU save stat= e. + @param[out] Buffer Upon return, this holds the CPU register value read + from the save state. + + @retval EFI_SUCCESS The register was read from Save State. + @retval EFI_INVALID_PARAMETER Buffer is NULL. + @retval EFI_UNSUPPORTED This function does not support reading Reg= ister. + +**/ +EFI_STATUS +EFIAPI +SmmCpuFeaturesReadSaveStateRegister ( + IN UINTN CpuIndex, + IN EFI_SMM_SAVE_STATE_REGISTER Register, + IN UINTN Width, + OUT VOID *Buffer + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Writes an SMM Save State register on the target processor. If this func= tion + returns EFI_UNSUPPORTED, then the caller is responsible for writing the + SMM Save Sate register. + + @param[in] CpuIndex The index of the CPU to write the SMM Save State. = The + value must be between 0 and the NumberOfCpus field = in + the System Management System Table (SMST). + @param[in] Register The SMM Save State register to write. + @param[in] Width The number of bytes to write to the CPU save state. + @param[in] Buffer Upon entry, this holds the new CPU register value. + + @retval EFI_SUCCESS The register was written to Save State. + @retval EFI_INVALID_PARAMETER Buffer is NULL. + @retval EFI_UNSUPPORTED This function does not support writing Reg= ister. +**/ +EFI_STATUS +EFIAPI +SmmCpuFeaturesWriteSaveStateRegister ( + IN UINTN CpuIndex, + IN EFI_SMM_SAVE_STATE_REGISTER Register, + IN UINTN Width, + IN CONST VOID *Buffer + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Check to see if an SMM register is supported by a specified CPU. + + @param[in] CpuIndex The index of the CPU to check for SMM register supp= ort. + The value must be between 0 and the NumberOfCpus fi= eld + in the System Management System Table (SMST). + @param[in] RegName Identifies the SMM register to check for support. + + @retval TRUE The SMM register specified by RegName is supported by the= CPU + specified by CpuIndex. + @retval FALSE The SMM register specified by RegName is not supported by= the + CPU specified by CpuIndex. +**/ +BOOLEAN +EFIAPI +SmmCpuFeaturesIsSmmRegisterSupported ( + IN UINTN CpuIndex, + IN SMM_REG_NAME RegName + ) +{ + if (FeaturePcdGet (PcdSmmFeatureControlEnable) && (RegName =3D=3D SmmReg= FeatureControl)) { + return TRUE; + } + + return FALSE; +} diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c= b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c index 5498fda38da4..cbf4b495185b 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c @@ -17,49 +17,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent =20 #include "CpuFeaturesLib.h" =20 -/** - This function updates the SMRAM save state on the currently executing CPU - to resume execution at a specific address after an RSM instruction. This - function must evaluate the SMRAM save state to determine the execution m= ode - the RSM instruction resumes and update the resume execution address with - either NewInstructionPointer32 or NewInstructionPoint. The auto HALT re= start - flag in the SMRAM save state must always be cleared. This function retu= rns - the value of the instruction pointer from the SMRAM save state that was - replaced. If this function returns 0, then the SMRAM save state was not - modified. - - This function is called during the very first SMI on each CPU after - SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mo= de - to signal that the SMBASE of each CPU has been updated before the default - SMBASE address is used for the first SMI to the next CPU. - - @param[in] CpuIndex The index of the CPU to hook. The v= alue - must be between 0 and the NumberOfCp= us - field in the System Management Syste= m Table - (SMST). - @param[in] CpuState Pointer to SMRAM Save State Map for = the - currently executing CPU. - @param[in] NewInstructionPointer32 Instruction pointer to use if resumi= ng to - 32-bit execution mode from 64-bit SM= M. - @param[in] NewInstructionPointer Instruction pointer to use if resumi= ng to - same execution mode as SMM. - - @retval 0 This function did modify the SMRAM save state. - @retval > 0 The original instruction pointer value from the SMRAM save = state - before it was replaced. -**/ -UINT64 -EFIAPI -SmmCpuFeaturesHookReturnFromSmm ( - IN UINTN CpuIndex, - IN SMRAM_SAVE_STATE_MAP *CpuState, - IN UINT64 NewInstructionPointer32, - IN UINT64 NewInstructionPointer - ) -{ - return 0; -} - /** Hook point in normal execution mode that allows the one CPU that was ele= cted as monarch during System Management Mode initialization to perform addit= ional @@ -90,91 +47,6 @@ SmmCpuFeaturesRendezvousExit ( { } =20 -/** - Check to see if an SMM register is supported by a specified CPU. - - @param[in] CpuIndex The index of the CPU to check for SMM register supp= ort. - The value must be between 0 and the NumberOfCpus fi= eld - in the System Management System Table (SMST). - @param[in] RegName Identifies the SMM register to check for support. - - @retval TRUE The SMM register specified by RegName is supported by the= CPU - specified by CpuIndex. - @retval FALSE The SMM register specified by RegName is not supported by= the - CPU specified by CpuIndex. -**/ -BOOLEAN -EFIAPI -SmmCpuFeaturesIsSmmRegisterSupported ( - IN UINTN CpuIndex, - IN SMM_REG_NAME RegName - ) -{ - if (FeaturePcdGet (PcdSmmFeatureControlEnable) && (RegName =3D=3D SmmReg= FeatureControl)) { - return TRUE; - } - - return FALSE; -} - -/** - Read an SMM Save State register on the target processor. If this functi= on - returns EFI_UNSUPPORTED, then the caller is responsible for reading the - SMM Save Sate register. - - @param[in] CpuIndex The index of the CPU to read the SMM Save State. = The - value must be between 0 and the NumberOfCpus field= in - the System Management System Table (SMST). - @param[in] Register The SMM Save State register to read. - @param[in] Width The number of bytes to read from the CPU save stat= e. - @param[out] Buffer Upon return, this holds the CPU register value read - from the save state. - - @retval EFI_SUCCESS The register was read from Save State. - @retval EFI_INVALID_PARAMETER Buffer is NULL. - @retval EFI_UNSUPPORTED This function does not support reading Reg= ister. - -**/ -EFI_STATUS -EFIAPI -SmmCpuFeaturesReadSaveStateRegister ( - IN UINTN CpuIndex, - IN EFI_SMM_SAVE_STATE_REGISTER Register, - IN UINTN Width, - OUT VOID *Buffer - ) -{ - return EFI_UNSUPPORTED; -} - -/** - Writes an SMM Save State register on the target processor. If this func= tion - returns EFI_UNSUPPORTED, then the caller is responsible for writing the - SMM Save Sate register. - - @param[in] CpuIndex The index of the CPU to write the SMM Save State. = The - value must be between 0 and the NumberOfCpus field = in - the System Management System Table (SMST). - @param[in] Register The SMM Save State register to write. - @param[in] Width The number of bytes to write to the CPU save state. - @param[in] Buffer Upon entry, this holds the new CPU register value. - - @retval EFI_SUCCESS The register was written to Save State. - @retval EFI_INVALID_PARAMETER Buffer is NULL. - @retval EFI_UNSUPPORTED This function does not support writing Reg= ister. -**/ -EFI_STATUS -EFIAPI -SmmCpuFeaturesWriteSaveStateRegister ( - IN UINTN CpuIndex, - IN EFI_SMM_SAVE_STATE_REGISTER Register, - IN UINTN Width, - IN CONST VOID *Buffer - ) -{ - return EFI_UNSUPPORTED; -} - /** This function is hook point called after the gEfiSmmReadyToLockProtocolG= uid notification is completely processed. --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#98271): https://edk2.groups.io/g/devel/message/98271 Mute This Topic: https://groups.io/mt/96195135/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-