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Mon, 11 Oct 2021 21:40:52 +0000 X-Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 11 Oct 2021 14:40:45 -0700 X-Received: from ashishsingha-lnx.nvidia.com (172.20.187.5) by mail.nvidia.com (172.20.187.10) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 11 Oct 2021 21:40:44 +0000 From: "Ashish Singhal via groups.io" To: , , CC: Ashish Singhal Subject: [edk2-devel] [PATCH v2] ArmPkg/TimerDxe: Delay End Of Interrupt Signal Date: Mon, 11 Oct 2021 15:40:42 -0600 Message-ID: X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 970b6f03-e9c8-49c4-2934-08d98cffccc2 X-MS-TrafficTypeDiagnostic: BN6PR12MB1362: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6108; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Message-Info: qZiI8Arswr+pOS9TtyJMbEKILebl5W9L9BYHKJIzquGat1GX+XHws4dgN42s8RgRvLdk6JDJeXDavwlBArqPGeLusdA4cpAgwCUtzxgtqyWACcIVA/TbnGbo7J+/q921tHy1NMfhndLjvOX+pizVBVu2s0hVi0ossUBPufqIQtm72j2upDISnbRKDJXU78feNLoFoB6wELhb+44gzFqaXyqysIXjbnnMOvQyaCFjFYAwMYAwKzCQQXGa0T72RmZUkeIOj5lcK9Q520ybt2mXDKJxhNxFXnH2kKpQo9YzPctqUv2jtbsgBegkJsOESpdyhCRSvV96/HqB++NsTmeMg1USFdh5ILiX8bPBQuxKpLPlorzGWwcB9FC1YsONUM2krcvg8gEqrm9RhpHMzLvDfbmPewuL2w8PsecJh+UJ4vfE0kC0eQhAK1GAG6qNxosYZrU9D/6noHCmigrY5Bw0Q4H25JHLtjtrTecLFjSQLo/JDcEm8P5lKTzVwyngMvynJgEXcLUNMTvXVUa/d/RTP/r9FqhbY1+R/iwzXLvPNLudndEDKvZD372bQaIoHIGiY2EneAHn+AT4YO+m6l80XTUGgabHAyNRj29NBBxnEVCAq//c1XQwjEVDX4CxhmgeqQ+l1FuWhAnUBEzFLjJCVP2M0Aiw7OkRQwJuDmm3jOnvpaLTZVYpjam1JF06iOkFLm7ArqbFD9cZyxqITC2Njg== X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Oct 2021 21:40:52.8242 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 970b6f03-e9c8-49c4-2934-08d98cffccc2 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.32];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT019.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1362 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ashishsingha@nvidia.com X-Gm-Message-State: 8CFOzRXtowjULgOJ1qmLYHx6x1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1633988455; bh=01T4L2sDA3AjVJEBoJT47MnE7t+1HcmJAMYCm7D2ufo=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=Z7hslGoh18FXh+lGYruQCuSdghoojj0B3fxmctO3yFCzgP4EW+CH1en1IFSsthv6rjf 9CtAUiEw5vXNO5g8VIS/p7Hks7fRGKiMJTmGTISH6ZBxhKKVqGn3KbEgvL9QJihU9yPUa FvUD3nMwYetFAokBoV1ij/0WLbqnKFRbUss= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1633988458490100005 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In an interrupt handler for the timers, it is important that software clears the interrupt before deactivating the interrupt in the GIC. Otherwise the GIC will re-signal the same interrupt again. Signed-off-by: Ashish Singhal --- ArmPkg/Drivers/TimerDxe/TimerDxe.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/ArmPkg/Drivers/TimerDxe/TimerDxe.c b/ArmPkg/Drivers/TimerDxe/T= imerDxe.c index 0370620fae..46e5bbf287 100644 --- a/ArmPkg/Drivers/TimerDxe/TimerDxe.c +++ b/ArmPkg/Drivers/TimerDxe/TimerDxe.c @@ -300,10 +300,6 @@ TimerInterruptHandler ( // OriginalTPL =3D gBS->RaiseTPL (TPL_HIGH_LEVEL); =20 - // Signal end of interrupt early to help avoid losing subsequent ticks - // from long duration handlers - gInterrupt->EndOfInterrupt (gInterrupt, Source); - // Check if the timer interrupt is active if ((ArmGenericTimerGetTimerCtrlReg () ) & ARM_ARCH_TIMER_ISTATUS) { =20 @@ -335,6 +331,11 @@ TimerInterruptHandler ( ArmInstructionSynchronizationBarrier (); } =20 + // In an interrupt handler for the timers, it is important that software= clears the interrupt + // before deactivating the interrupt in the GIC. Otherwise the GIC will = re-signal the same + // interrupt again. + gInterrupt->EndOfInterrupt (gInterrupt, Source); + gBS->RestoreTPL (OriginalTPL); } =20 --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#81766): https://edk2.groups.io/g/devel/message/81766 Mute This Topic: https://groups.io/mt/86248479/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-