From nobody Sun Feb 8 22:22:49 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+86058+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+86058+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1643121483; cv=none; d=zohomail.com; s=zohoarc; b=hySmf/9fpQf1/yxFMnw2Sao0HsePt6QxCVimUsaFepx2enwCSbyEZ/rcrgReiOJgEQgYSrpRHeiYwb6luqHnA7ofw2+Mk5FgUN4GRjc20N6brDMNBKMVcc8jmyhSZ4rFkQpJSMyD9uCn3QhL83HLvHV/HSfq5OJ7v/vUy9njxlY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1643121483; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=HxZOjE1ndRUtoY2RwGyj9Q8wxszBxmZi3QBxmGU4ogQ=; b=TuFOGfUBZW3/lJ4uIqb+H01ZQ7RakJD0WzA0+w7w2ykdm3aTPAijC8nyFlEkTM4VkdZhWcAlf7zA3o1Z7q6wDhNKKkTCAoHOytd6HeVGzKyc9jSb68PC1LjrGP4pTVAHa9QbRPxFT5L70Z+y6HR4QF7Jr/Qa3IJ6amwWTNrn4N4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+86058+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1643121483324311.0671476908069; Tue, 25 Jan 2022 06:38:03 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id eVYLYY1788612x7mQ29RkvWc; Tue, 25 Jan 2022 06:38:02 -0800 X-Received: from smtp-fw-9103.amazon.com (smtp-fw-9103.amazon.com [207.171.188.200]) by mx.groups.io with SMTP id smtpd.web11.7734.1643121481786203822 for ; Tue, 25 Jan 2022 06:38:01 -0800 X-IronPort-AV: E=Sophos;i="5.88,315,1635206400"; d="scan'208";a="987182349" X-Received: from pdx4-co-svc-p1-lb2-vlan2.amazon.com (HELO email-inbound-relay-pdx-2a-5feb294a.us-west-2.amazon.com) ([10.25.36.210]) by smtp-border-fw-9103.sea19.amazon.com with ESMTP; 25 Jan 2022 14:38:01 +0000 X-Received: from EX13D49EUC003.ant.amazon.com (pdx1-ws-svc-p6-lb9-vlan2.pdx.amazon.com [10.236.137.194]) by email-inbound-relay-pdx-2a-5feb294a.us-west-2.amazon.com (Postfix) with ESMTPS id 8DD5587822; Tue, 25 Jan 2022 14:38:00 +0000 (UTC) X-Received: from ub4014a598e6c52.ant.amazon.com (10.43.160.17) by EX13D49EUC003.ant.amazon.com (10.43.164.91) with Microsoft SMTP Server (TLS) id 15.0.1497.28; Tue, 25 Jan 2022 14:37:56 +0000 From: "Ojeda Leon, Nicolas via groups.io" To: CC: , Nicolas Ojeda Leon , Alexander Graf , Gerd Hoffmann Subject: [edk2-devel] [PATCH v3 7/8] MdeModulePkg/Pci MdePkg: Create service to retrieve PCI base addresses Date: Tue, 25 Jan 2022 15:37:39 +0100 Message-ID: <9447e1ddbb2aa9089456a25779cd5b8e1f0140ac.1643120206.git.ncoleon@amazon.com> In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.43.160.17] X-ClientProxiedBy: EX13D19UWC003.ant.amazon.com (10.43.162.184) To EX13D49EUC003.ant.amazon.com (10.43.164.91) Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ncoleon@amazon.com X-Gm-Message-State: wsX8iAhv5DTfF8f5uJH1R3zrx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1643121482; bh=V6EqJle6j01W0ogeCDfrPe34u6veX8XvoC8bMmP/fSE=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=F6PxqneHgvl/PrMMhL5HdFR2ZVC2/lAV03SJ7315HsW/Q2lqikkjFK5a0J96v4N1q21 jbzZEs7wlXJfMYVJK3aZXi5XnblYkYv9fqLG9NTNIs41Eltto44SCBWeG8pKmV8qEoalp 87MXKFUedtNAYKdGIX6SOQeck9Bk/d3CKWY= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1643121489782100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Extend the PCI host bridge resource allocation protocol to include one more service that retrieves the base addresses of all resources of a given root bridge. The service is defined to provide, on runtime, the possibility to fetch the base addresses of a root bridge, replicating the address alignment used when placing the host bridge's resources in the Gcd memory map. The intention of this service, initially, is to allow the PCI allocation process to get the base addresses before allocating the individual BARs grouped under a root bridge. This enables the placing logic to be enhanced to account and calculate offsets for pre-populated BARs (PCI devices' BARs that are already configured and need to be respected). Cc: Alexander Graf Cc: Gerd Hoffmann Signed-off-by: Nicolas Ojeda Leon --- MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 10 +++ .../Bus/Pci/PciHostBridgeDxe/PciHostBridge.c | 81 +++++++++++++++++++ .../Bus/Pci/PciHostBridgeDxe/PciHostBridge.h | 29 +++++++ .../PciHostBridgeResourceAllocation.h | 33 ++++++++ 4 files changed, 153 insertions(+) diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci= /PciBusDxe/PciLib.c index 63d149b3b8..2ffbc08256 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c @@ -582,6 +582,16 @@ PciHostBridgeResourceAllocator ( PciResUsageTypical ); =20 + Status =3D PciResAlloc->GetResourcesBases ( + PciResAlloc, + RootBridgeDev->Handle, + &IoBase, + &Mem32Base, + &PMem32Base, + &Mem64Base, + &PMem64Base + ); + // // Get the max ROM size that the root bridge can process // Insert to resource map so that there will be dedicate MEM32 resou= rce range for Option ROM. diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c b/MdeMod= ulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c index b20bcd310a..ddd31f78d6 100644 --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c @@ -591,6 +591,7 @@ InitializePciHostBridge ( HostBridge->ResAlloc.SubmitResources =3D SubmitResources; HostBridge->ResAlloc.GetProposedResources =3D GetProposedResources; HostBridge->ResAlloc.PreprocessController =3D PreprocessController; + HostBridge->ResAlloc.GetResourcesBases =3D GetResourcesBases; =20 Status =3D gBS->InstallMultipleProtocolInterfaces ( &HostBridge->Handle, @@ -1734,3 +1735,83 @@ PreprocessController ( =20 return EFI_INVALID_PARAMETER; } + +/** + + Retrieve the aligned base addresses for all resources of a root bridge. + + @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PRO= TOCOL instance. + @param RootBridgeHandle RootBridgeHandle returned by GetNextRootBridge = to locate the + root bridge of interest among the list of root = bridges. + @param IoBase Returns the PIO aperture base address. + @param Mem32Base Returns the 32-bit aperture base address. + @param PMem32Base Returns the 32-bit prefetchable aperture base a= ddress. + @param Mem64Base Returns the 64-bit aperture base address. + @param PMem64Base Returns the 64-bit prefetchable aperture base a= ddress. + + @retval EFI_SUCCESS Succeed. + @retval EFI_NOT_FOUND Root bridge was not found. + +**/ +EFI_STATUS +EFIAPI +GetResourcesBases ( + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This, + IN EFI_HANDLE RootBridgeHandle, + OUT UINT64 *IoBase, + OUT UINT64 *Mem32Base, + OUT UINT64 *PMem32Base, + OUT UINT64 *Mem64Base, + OUT UINT64 *PMem64Base + ) +{ + PCI_HOST_BRIDGE_INSTANCE *HostBridge; + PCI_ROOT_BRIDGE_INSTANCE *RootBridge; + LIST_ENTRY *Link; + UINT64 Alignment; + UINTN BitsOfAlignment; + + HostBridge =3D PCI_HOST_BRIDGE_FROM_THIS (This); + + for (Link =3D GetFirstNode (&HostBridge->RootBridges) + ; !IsNull (&HostBridge->RootBridges, Link) + ; Link =3D GetNextNode (&HostBridge->RootBridges, Link) + ) + { + RootBridge =3D ROOT_BRIDGE_FROM_LINK (Link); + + if (RootBridgeHandle =3D=3D RootBridge->Handle) { + // + // Have to make sure Alignment is handled since we are doing direct = address allocation + // + Alignment =3D RootBridge->ResAllocNode[TypeIo].Alignment; + BitsOfAlignment =3D MIN (15, LowBitSet64 (Alignment + 1)); + *IoBase =3D ALIGN_VALUE (RootBridge->Io.Base, Alignment + 1); + *IoBase =3D ALIGN_VALUE (*IoBase, LShiftU64 (1, BitsOfAlignm= ent)); + + Alignment =3D RootBridge->ResAllocNode[TypeMem32].Alignment; + BitsOfAlignment =3D MIN (31, LowBitSet64 (Alignment + 1)); + *Mem32Base =3D ALIGN_VALUE (RootBridge->Mem.Base, Alignment + 1= ); + *Mem32Base =3D ALIGN_VALUE (*Mem32Base, LShiftU64 (1, BitsOfAli= gnment)); + + Alignment =3D RootBridge->ResAllocNode[TypePMem32].Alignment; + BitsOfAlignment =3D MIN (31, LowBitSet64 (Alignment + 1)); + *PMem32Base =3D ALIGN_VALUE (RootBridge->PMem.Base, Alignment + = 1); + *PMem32Base =3D ALIGN_VALUE (*PMem32Base, LShiftU64 (1, BitsOfAl= ignment)); + + Alignment =3D RootBridge->ResAllocNode[TypeMem64].Alignment; + BitsOfAlignment =3D MIN (63, LowBitSet64 (Alignment + 1)); + *Mem64Base =3D ALIGN_VALUE (RootBridge->MemAbove4G.Base, Alignm= ent + 1); + *Mem64Base =3D ALIGN_VALUE (*Mem64Base, LShiftU64 (1, BitsOfAli= gnment)); + + Alignment =3D RootBridge->ResAllocNode[TypePMem64].Alignment; + BitsOfAlignment =3D MIN (63, LowBitSet64 (Alignment + 1)); + *PMem64Base =3D ALIGN_VALUE (RootBridge->PMemAbove4G.Base, Align= ment + 1); + *PMem64Base =3D ALIGN_VALUE (*PMem64Base, LShiftU64 (1, BitsOfAl= ignment)); + + return EFI_SUCCESS; + } + } + + return EFI_NOT_FOUND; +} diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h b/MdeMod= ulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h index e7a30fd909..07ba496602 100644 --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h @@ -240,6 +240,35 @@ PreprocessController ( IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase ); =20 +/** + + Retrieve the aligned base addresses for all resources of a root bridge. + + @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PRO= TOCOL instance. + @param RootBridgeHandle RootBridgeHandle returned by GetNextRootBridge = to locate the + root bridge of interest among the list of root = bridges. + @param IoBase Returns the PIO aperture base address. + @param Mem32Base Returns the 32-bit aperture base address. + @param PMem32Base Returns the 32-bit prefetchable aperture base a= ddress. + @param Mem64Base Returns the 64-bit aperture base address. + @param PMem64Base Returns the 64-bit prefetchable aperture base a= ddress. + + @retval EFI_SUCCESS Succeed. + @retval EFI_NOT_FOUND Root bridge was not found. + +**/ +EFI_STATUS +EFIAPI +GetResourcesBases ( + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This, + IN EFI_HANDLE RootBridgeHandle, + OUT UINT64 *IoBase, + OUT UINT64 *Mem32Base, + OUT UINT64 *PMem32Base, + OUT UINT64 *Mem64Base, + OUT UINT64 *PMem64Base + ); + /** This routine constructs the resource descriptors for all root bridges an= d call PciHostBridgeResourceConflict(). =20 diff --git a/MdePkg/Include/Protocol/PciHostBridgeResourceAllocation.h b/Md= ePkg/Include/Protocol/PciHostBridgeResourceAllocation.h index 5ef7c000d6..ab91acb174 100644 --- a/MdePkg/Include/Protocol/PciHostBridgeResourceAllocation.h +++ b/MdePkg/Include/Protocol/PciHostBridgeResourceAllocation.h @@ -367,6 +367,33 @@ EFI_STATUS IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase ); =20 +/** + Retrieves the base addresses of ost bridge resources. + + @param This The pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE= _ALLOCATION_PROTOCOL instance. + @param RootBridgeHandle The PCI root bridge handle. + @param IoBase The pointer to PIO aperture base address. + @param Mem32Base The pointer to 32-bit aperture base address. + @param PMem32Base The pointer to 32-bit prefetchable aperture bas= e address. + @param Mem64Base The pointer to 64-bit aperture base address. + @param PMem64Base The pointer to 64-bit prefetchable aperture bas= e address. + + @retval EFI_SUCCESS Succeed. + @retval EFI_NOT_FOUND Root bridge was not found. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_RESOURCES_BA= SES)( + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This, + IN EFI_HANDLE RootBridgeHandle, + OUT UINT64 *IoBase, + OUT UINT64 *Mem32Base, + OUT UINT64 *PMem32Base, + OUT UINT64 *Mem64Base, + OUT UINT64 *PMem64Base + ); + /// /// Provides the basic interfaces to abstract a PCI host bridge resource a= llocation. /// @@ -415,6 +442,12 @@ struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOC= OL { /// before enumeration. /// EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER = PreprocessController; + + /// + /// Returns the aligned base addresses of the different resource windows + /// of the host bridge. Intended for use before resources are submitted. + /// + EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_RESOURCES_BASES = GetResourcesBases; }; =20 extern EFI_GUID gEfiPciHostBridgeResourceAllocationProtocolGuid; --=20 2.17.1 Amazon Development Center Germany GmbH Krausenstr. 38 10117 Berlin Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B Sitz: Berlin Ust-ID: DE 289 237 879 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#86058): https://edk2.groups.io/g/devel/message/86058 Mute This Topic: https://groups.io/mt/88672542/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-