From nobody Sun May 5 17:18:14 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+69133+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69133+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1608214355; cv=none; d=zohomail.com; s=zohoarc; b=f0b8NBlOzYLbRsFTzzK9QjmzKVOYqMAVwMsAipCvf9Kcuk+FuZikLNxzxaBs3hnZkt+kox7rd30DXGQuyplsyprCwpo6GNODNIgGNwjCzi7+a/DOxLGe8Lm8GOHHofEN27paLyT8AdtiEH+E+VIqMw8D8OL00sK9OknG0rc0kSA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1608214355; h=Content-ID:Content-Type:Content-Transfer-Encoding:Cc:Date:From:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=65I8IAT7ObZhPI09tuVRu1VzZ8fn2uOiNXgd8jIpLfQ=; b=CQvTN9O5k9smAMV+pByYYIt8T9DZ5fY4JjUGrfhWWy0d+dL3gmpz1zFxWd26Rv0LppJIcLWTJh15VNt182sryG1Y1+lCAX07gHUJqU32rd7uVax+erQ1PrC+tpkm1EZUTMYwoOw2/hNx7xtV/dkqzSrlaet9jssGRAYMDpXmlr0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69133+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1608214355294360.08469913706756; Thu, 17 Dec 2020 06:12:35 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id XBYEYY1788612xoq9xsnpoRd; Thu, 17 Dec 2020 06:12:33 -0800 X-Received: from smtp-fw-2101.amazon.com (smtp-fw-2101.amazon.com [72.21.196.25]) by mx.groups.io with SMTP id smtpd.web11.8679.1608214352793134924 for ; Thu, 17 Dec 2020 06:12:33 -0800 X-IronPort-AV: E=Sophos;i="5.78,428,1599523200"; d="scan'208";a="69723122" X-Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO email-inbound-relay-1d-16425a8d.us-east-1.amazon.com) ([10.43.8.6]) by smtp-border-fw-out-2101.iad2.amazon.com with ESMTP; 17 Dec 2020 14:12:26 +0000 X-Received: from EX13MTAUEE001.ant.amazon.com (iad12-ws-svc-p26-lb9-vlan3.iad.amazon.com [10.40.163.38]) by email-inbound-relay-1d-16425a8d.us-east-1.amazon.com (Postfix) with ESMTPS id 20DA1101191 for ; Thu, 17 Dec 2020 14:12:24 +0000 (UTC) X-Received: from EX13D08UEE004.ant.amazon.com (10.43.62.182) by EX13MTAUEE001.ant.amazon.com (10.43.62.200) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 17 Dec 2020 14:12:23 +0000 X-Received: from EX13D33EUC004.ant.amazon.com (10.43.164.63) by EX13D08UEE004.ant.amazon.com (10.43.62.182) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 17 Dec 2020 14:12:23 +0000 X-Received: from EX13D33EUC004.ant.amazon.com ([10.43.164.63]) by EX13D33EUC004.ant.amazon.com ([10.43.164.63]) with mapi id 15.00.1497.006; Thu, 17 Dec 2020 14:12:22 +0000 From: "Borghorst, Hendrik via groups.io" To: "devel@edk2.groups.io" CC: "Woodhouse, David" Subject: [edk2-devel] [PATCH v2] OvmfPkg/PlatformBootManagerLib: fix PCI interrupt link (LNKx) Thread-Topic: [PATCH v2] OvmfPkg/PlatformBootManagerLib: fix PCI interrupt link (LNKx) Thread-Index: AQHW1H6jLelBaSeebkSeFG3jCmnqMg== Date: Thu, 17 Dec 2020 14:12:22 +0000 Message-ID: <8dbedc4c7a1c3fd390aca915270814e3b35e13a5.camel@amazon.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-messagesentrepresentingtype: 1 x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.43.164.29] MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,hborghor@amazon.de X-Gm-Message-State: p4SKfXXmNTIgOeZW7NR2VTdvx1787277AA= Content-Language: en-US Content-Type: text/plain; charset="utf-8" Content-ID: <67460C2E0AFBA949806DBF038B3D3CE3@amazon.com> Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1608214353; bh=65I8IAT7ObZhPI09tuVRu1VzZ8fn2uOiNXgd8jIpLfQ=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=ih+7Yl00uI2FMQqNYZpbYtt+ll8pD9VkmmWmAVsMMACp1LCDrT/8lZAmf8QDI8qH3fC 0uAbwOPRHFR9bU3ECAIOL254BjR/yjGsTSt1zeVIXkIj7NJIou8N5zujs0uelyWJf3wFN UG3GmOOYKV/9aSWmxKgUoxDEzJgm/AkMXYI= X-ZohoMail-DKIM: pass (identity @groups.io) This patch fixes an issue with the current programming of the i440fx PCI Interrupt routing assignment. Explanation by Laszlo Ersek: (1) The rotating pattern is a map: (slot, function) --> (interrupt link) [LNKA..LNKD] (more precisely, it is a pattern from (slot, pin) to (interrupt link), but function<->pin is an identity mapping in the QEMU hardware, so we can just use (slot, function) rather than (slot, pin) on the left hand side. But I digress.) The ACPI _PRT object is generated by QEMU; it describes this map. (2) Another map is (interrupt link) --> { set of possible interrupt numbers, for this link } This map is given by the LNK[A..D] ACPI objects, also given by QEMU. (3) What the firmware is expected to do is: (3a) for each interrupt link, select an *actual* interrupt from the set that's possible for that link, yielding a deterministic map (interrupt link) --> (actual interrupt number) and (3b) for each PCI device/function with an interrupt pin, resolve the (slot, function) --> (interrupt link) --> (actual interrupt number) functional composition, and program the result into the Interrupt Line register of the device. In OVMF, we do not parse the rotating map described under (1) from QEMU's _PRT object. Instead, we duplicate the code. This is not a problem. In OVMF, we also do not parse the map described under (2) from QEMU's ACPI content. Instead, we pick a specific selection (3a) that we "apriori" know satisfies (2). This is also not a problem. OVMF's particular selection is the PciHostIrqs table. ( Table (2) from QEMU is LNKA -> { 5, 10, 11 } LNKB -> { 5, 10, 11 } LNKC -> { 5, 10, 11 } LNKD -> { 5, 10, 11 } and our specific pick in OVMF, in the PciHostIrqs table, is LNKA -> 10 LNKB -> 10 LNKC -> 11 LNKD -> 11 ) In OVMF, we also cover step (3b), in the SetPciIntLine() function. What's missing in OVMF -- and what this patch corrects -- is that we currently fail to program our selection for table (3) into the hardware. We pick a specific LNKx->IRQ# mapping for each interrupt link, and we correctly program the PCI Interrupt Line registers through those link-to-IRQ mappings -- but we don't tell the hardware about the link-to-IRQ mappings. More precisely, we program such a link-to-IRQ mapping table into the hardware that is then not matched by the mapping we use for programming the PCI device/function interrupt lines. As a result, some PCI Interrupt Line registers will have impossible values -- a given (slot, function) may use a particular link, but also report an interrupt number that was never picked for that link. Output of Linux PCI Interrupt Links for i440fx before the patch: [ 0.327305] ACPI: PCI Interrupt Link [LNKA] (IRQs 5 10 *11) [ 0.327944] ACPI: PCI Interrupt Link [LNKB] (IRQs 5 10 *11) [ 0.328582] ACPI: PCI Interrupt Link [LNKC] (IRQs 5 *10 11) [ 0.329208] ACPI: PCI Interrupt Link [LNKD] (IRQs 5 *10 11) [ 0.329807] ACPI: PCI Interrupt Link [LNKS] (IRQs *9) after the patch: [ 0.327292] ACPI: PCI Interrupt Link [LNKA] (IRQs 5 *10 11) [ 0.327934] ACPI: PCI Interrupt Link [LNKB] (IRQs 5 *10 11) [ 0.328564] ACPI: PCI Interrupt Link [LNKC] (IRQs 5 10 *11) [ 0.329195] ACPI: PCI Interrupt Link [LNKD] (IRQs 5 10 *11) [ 0.329785] ACPI: PCI Interrupt Link [LNKS] (IRQs *9) Output of Linux PCI Interrupt Links for q35 before the patch: [ 0.307474] ACPI: PCI Interrupt Link [LNKA] (IRQs 5 *10 11) [ 0.308027] ACPI: PCI Interrupt Link [LNKB] (IRQs 5 *10 11) [ 0.308764] ACPI: PCI Interrupt Link [LNKC] (IRQs 5 10 *11) [ 0.309310] ACPI: PCI Interrupt Link [LNKD] (IRQs 5 10 *11) [ 0.309853] ACPI: PCI Interrupt Link [LNKE] (IRQs 5 *10 11) [ 0.310508] ACPI: PCI Interrupt Link [LNKF] (IRQs 5 *10 11) [ 0.311051] ACPI: PCI Interrupt Link [LNKG] (IRQs 5 10 *11) [ 0.311589] ACPI: PCI Interrupt Link [LNKH] (IRQs 5 10 *11) after the patch: [ 0.301991] ACPI: PCI Interrupt Link [LNKA] (IRQs 5 *10 11) [ 0.302833] ACPI: PCI Interrupt Link [LNKB] (IRQs 5 *10 11) [ 0.303354] ACPI: PCI Interrupt Link [LNKC] (IRQs 5 10 *11) [ 0.303873] ACPI: PCI Interrupt Link [LNKD] (IRQs 5 10 *11) [ 0.304399] ACPI: PCI Interrupt Link [LNKE] (IRQs 5 *10 11) [ 0.304918] ACPI: PCI Interrupt Link [LNKF] (IRQs 5 *10 11) [ 0.305436] ACPI: PCI Interrupt Link [LNKG] (IRQs 5 10 *11) [ 0.305954] ACPI: PCI Interrupt Link [LNKH] (IRQs 5 10 *11) Signed-off-by: Hendrik Borghorst Reviewed-by: David Woodhouse Reviewed-by: Laszlo Ersek --- .../PlatformBootManagerLib/BdsPlatform.c | 29 ++++++++++--------- 1 file changed, 16 insertions(+), 13 deletions(-) diff --git a/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c b/OvmfPkg= /Library/PlatformBootManagerLib/BdsPlatform.c index 3c55ec9bd9..b0e9742937 100644 --- a/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c +++ b/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c @@ -29,7 +29,10 @@ UINT16 mHostBridgeDevId; // (for configuring PCI Interrupt Line register) // CONST UINT8 PciHostIrqs[] =3D { - 0x0a, 0x0a, 0x0b, 0x0b + 0x0a, // LNKA, LNKE + 0x0a, // LNKB, LNKF + 0x0b, // LNKC, LNKG + 0x0b // LNKD, LNKH }; =20 // @@ -1211,24 +1214,24 @@ PciAcpiInitialization ( // // 00:01.0 ISA Bridge (PIIX4) LNK routing targets // - PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x60), 0x0b); // A - PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x61), 0x0b); // B - PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x62), 0x0a); // C - PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x63), 0x0a); // D + PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x60), PciHostIrqs[0]); // A + PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x61), PciHostIrqs[1]); // B + PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x62), PciHostIrqs[2]); // C + PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x63), PciHostIrqs[3]); // D break; case INTEL_Q35_MCH_DEVICE_ID: Pmba =3D POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE); // // 00:1f.0 LPC Bridge (Q35) LNK routing targets // - PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x60), 0x0a); // A - PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x61), 0x0a); // B - PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x62), 0x0b); // C - PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x63), 0x0b); // D - PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x68), 0x0a); // E - PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x69), 0x0a); // F - PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x6a), 0x0b); // G - PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x6b), 0x0b); // H + PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x60), PciHostIrqs[0]); // A + PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x61), PciHostIrqs[1]); // B + PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x62), PciHostIrqs[2]); // C + PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x63), PciHostIrqs[3]); // D + PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x68), PciHostIrqs[0]); // E + PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x69), PciHostIrqs[1]); // F + PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x6a), PciHostIrqs[2]); // G + PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x6b), PciHostIrqs[3]); // H break; default: if (XenDetected ()) { --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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