From nobody Mon Sep 16 18:58:32 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+96275+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96275+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1668157962; cv=none; d=zohomail.com; s=zohoarc; b=ZuFo07FTs4O7kJEbvGHCb4eqnf4lcM1tTH1iMIXmbslTsLW0Zf4HGB37wesCxlLXz4sWJM9DO2n8WcBBV1mYz9bo8I+dP61pb2RoWbJNSztzYHvHQ3FX9ZKt+Zq8v/9AqvdQqdMwsj97ZUqhu63I1A8iK1xMpt57/n7MKgyvRlM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1668157962; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=K+if3Bnzm/XH5ewSlSYBVli1lpLEpZRA2/4+5ot31hs=; b=UV4puHJmK/206ZSYkiA9BlCZFTVsM7YsTq3A6aOwSZwy7PYZGbRhc1AmQFNhu8SYMHWS2bKctdbZFq5rM/X82GvP0YU7Jj9ApFbkmYKMEh2Hj/j47bQcdISwkmqAgpsritmX8KQT3vjCghTdaio3NX7BBlHBezuCBNzC+iWHtwQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96275+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 166815796245448.24348469289578; Fri, 11 Nov 2022 01:12:42 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id WW7KYY1788612xsRdlXDAxEb; Fri, 11 Nov 2022 01:12:42 -0800 X-Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web08.3550.1668157960197213090 for ; Fri, 11 Nov 2022 01:12:40 -0800 X-Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8DxndoGEm5jhxMGAA--.19241S3; Fri, 11 Nov 2022 17:12:38 +0800 (CST) X-Received: from localhost.localdomain (unknown [10.2.5.185]) by localhost.localdomain (Coremail) with SMTP id AQAAf8BxFlcAEm5jXc0QAA--.27651S8; Fri, 11 Nov 2022 17:12:38 +0800 (CST) From: "xianglai" To: devel@edk2.groups.io Cc: Bibo Mao , Chao Li , Leif Lindholm , Liming Gao , Michael D Kinney Subject: [edk2-devel] [edk2-platforms][PATCH V5 06/15] Platform/Loongson: Add StableTimerLib. Date: Fri, 11 Nov 2022 17:12:21 +0800 Message-Id: <7831d165809e5e96efbf9e78d3538ded0f4543a2.1668157715.git.lixianglai@loongson.cn> In-Reply-To: References: MIME-Version: 1.0 X-CM-TRANSID: AQAAf8BxFlcAEm5jXc0QAA--.27651S8 X-CM-SenderInfo: 5ol0xt5qjotxo6or00hjvr0hdfq/ X-Coremail-Antispam: 1Uk129KBjvJXoW3Kw45ZF4rGw1xKryDCF4DJwb_yoWDKw13pr sxZa47Kr18Gr45Aw13t3WjgFy5Aw43Cr98GF45Cr18A3yDA3s3Ww1ktFW0qFyfZrW3Wry0 q3yIga1UuF48J3DanT9S1TB71UUUUjUqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj qI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUU bFAFc2x0x2IEx4CE42xK8VAvwI8IcIk0rVWrJVCq3wA2ocxC64kIII0Yj41l84x0c7CEw4 AK67xGY2AK021l84ACjcxK6xIIjxv20xvE14v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF 7I0E14v26r4j6F4UM28EF7xvwVC2z280aVAFwI0_Cr1j6rxdM28EF7xvwVC2z280aVCY1x 0267AKxVWxJr0_GcWln4kS14v26r1Y6r17M2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF 6xkI12xvs2x26I8E6xACxx1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6x8ErcxFaVAv8V WrMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x0EwIxGrwCF 04k20xvE74AGY7Cv6cx26rWl4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1l4IxYO2xFxVAFwI0_Jr v_JF1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY 17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Xr0_Ar1lIxAIcV C0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY 6I8E87Iv67AKxVWxJVW8Jr1lIxAIcVC2z280aVCY1x0267AKxVW8JVW8JrUvcSsGvfC2Kf nxnUUI43ZEXa7xRihFxUUUUUU== Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lixianglai@loongson.cn X-Gm-Message-State: YizAoL4g1ZqNwFg6jDJ0D77cx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1668157962; bh=LJ02YTHWA5xn8VlPiVMh2/cvGIf2B4gLFQzV2mcVHSE=; h=Cc:Date:From:Reply-To:Subject:To; b=Fbb+ZtJmt0j1Mjnx3ZuPZcnlEIF10P8Z7tfw85VhjwpkkxK8O6PDDL6vSTmbZteHYrX JNF8APN3qmEmrRQdy5ELGI39LsMNVtvv4vZcoLT8/ZW1yvc4o+JLO5mdwleBgyUIk2Rz3 CZjFyW9a/2mH7r4zFmR1vNahAdrez81CYAA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1668157964460100024 Content-Type: text/plain; charset="utf-8" This library provides a delay interface and a timing interface. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4054 Cc: Bibo Mao Cc: Chao Li Cc: Leif Lindholm Cc: Liming Gao Cc: Michael D Kinney Signed-off-by: xianglai li Reviewed-by: Chao Li --- .../Include/Library/StableTimer.h | 59 +++++ .../Library/StableTimerLib/Count.S | 52 ++++ .../Library/StableTimerLib/TimerLib.c | 236 ++++++++++++++++++ .../Library/StableTimerLib/TimerLib.inf | 32 +++ 4 files changed, 379 insertions(+) create mode 100644 Platform/Loongson/LoongArchQemuPkg/Include/Library/Stab= leTimer.h create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/StableTimerL= ib/Count.S create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/StableTimerL= ib/TimerLib.c create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/StableTimerL= ib/TimerLib.inf diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer= .h b/Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h new file mode 100644 index 0000000000..93f5b66c34 --- /dev/null +++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h @@ -0,0 +1,59 @@ +/** @file + + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights r= eserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Glossary: + - Csr - Cpu Status Register + - Calc - Calculation + - Freq - frequency +**/ + +#ifndef STABLE_TIMER_H_ +#define STABLE_TIMER_H_ +#include "Library/Cpu.h" + +/** + Gets the timer count value. + + @param[] VOID + + @retval timer count value. +**/ +extern +UINTN +EFIAPI +LoongArchReadTime ( + VOID + ); + +/** + Calculate the timer frequency. + + @param[] VOID + + @retval Timer frequency. +**/ +UINT32 +EFIAPI +CalcConstFreq ( + VOID + ); + +/* + Reads data from the specified CPUCFG register. + + @param[OUT] Val Pointer to the variable used to store the CPUCFG regi= ster value. + @param[IN] reg Specifies the register number of the CPUCFG to read t= he data. + + @retval none + */ +extern +VOID +LoongArchReadCpuCfg ( + UINT64 *Val, + UINT64 reg + ); + +#endif // STABLE_TIMER_H_ diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Coun= t.S b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S new file mode 100644 index 0000000000..4e0e718381 --- /dev/null +++ b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S @@ -0,0 +1,52 @@ +#-------------------------------------------------------------------------= ----- +# +# Count for LoongArch +# +# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights r= eserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#-------------------------------------------------------------------------= ----- + +#ifndef __ASSEMBLY__ +#define __ASSEMBLY__ +#endif + +#include "Library/Cpu.h" + +ASM_GLOBAL ASM_PFX(CpuSetIP) +ASM_GLOBAL ASM_PFX(LoongArchReadTime) +ASM_GLOBAL ASM_PFX(LoongArchReadCpuCfg) + +# +# Set cpu interrupts +# @param A0 The interrupt number +# + +ASM_PFX(CpuSetIP): + csrrd T0, LOONGARCH_CSR_ECFG + or T0, T0, A0 + csrwr T0, LOONGARCH_CSR_ECFG + jirl ZERO, RA, 0 + +# +#Gets the timer count value. +#@param[] VOID +#@retval timer count value. +# + +ASM_PFX(LoongArchReadTime): + rdtime.d A0, ZERO + jirl ZERO, RA, 0 + +# +# Read Csr CPUCFG register. +# @param A0 Pointer to the variable used to store the CPUCFG register = value. +# @param A1 Specifies the register number of the CPUCFG to read the da= ta. +# @retval none +# + +ASM_PFX(LoongArchReadCpuCfg): + cpucfg T0, A1 + stptr.d T0, A0, 0 + jirl ZERO, RA, 0 diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Time= rLib.c b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib= .c new file mode 100644 index 0000000000..135fb22611 --- /dev/null +++ b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c @@ -0,0 +1,236 @@ +/** @file + Generic LoongArch implementation of TimerLib.h + + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights r= eserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Glossary: + - Freq - Frequency + - Csr - Cpu Status Register + - calc - calculate +**/ + +#include +#include +#include +#include +#include "Library/StableTimer.h" +#include "Library/Cpu.h" + +UINT32 StableTimerFreq =3D 0; + +/** + Calculate the timer frequency. + + @param[] VOID + + @retval Timer frequency. +**/ +UINT32 +EFIAPI +CalcConstFreq ( + VOID + ) +{ + UINT32 Result; + UINT32 BaseFreq; + UINT32 ClockMultiplier; + UINT32 ClockDivide; + UINT64 Val; + + LoongArchReadCpuCfg (&Val, LOONGARCH_CPUCFG4); + BaseFreq =3D (UINT32)Val; + LoongArchReadCpuCfg (&Val, LOONGARCH_CPUCFG5); + Result =3D (UINT32)Val; + ClockMultiplier =3D Result & 0xffff; + ClockDivide =3D (Result >> 16) & 0xffff; + + if ((!BaseFreq) || (!ClockMultiplier) || (!ClockDivide)) { + return 0; + } else { + return (BaseFreq * ClockMultiplier / ClockDivide); + } +} +/** + Get the timer frequency. + + @param[] VOID + + @retval Timer frequency. +**/ +UINT32 +EFIAPI +GetFreq ( + VOID + ) +{ + if (StableTimerFreq) { + } else { + StableTimerFreq =3D CalcConstFreq (); + } + + return StableTimerFreq; +} + +/** + Stalls the CPU for at least the given number of microseconds. + + Stalls the CPU for the number of microseconds specified by MicroSeconds. + + @param MicroSeconds The minimum number of microseconds to delay. + + @return MicroSeconds +**/ +UINTN +EFIAPI +MicroSecondDelay ( + IN UINTN MicroSeconds + ) +{ + + UINTN Count; + UINTN Ticks; + UINTN Start; + UINTN End; + + Count =3D GetFreq (); + Count =3D (Count * MicroSeconds) / 1000000; + Start =3D LoongArchReadTime (); + End =3D Start + Count; + + do { + Ticks =3D LoongArchReadTime (); + } while (Ticks < End); + + return MicroSeconds; +} + +/** + Stalls the CPU for at least the given number of nanoseconds. + + Stalls the CPU for the number of nanoseconds specified by NanoSeconds. + + @param NanoSeconds The minimum number of nanoseconds to delay. + + @return NanoSeconds +**/ +UINTN +EFIAPI +NanoSecondDelay ( + IN UINTN NanoSeconds + ) +{ + UINT32 MicroSeconds; + + if (NanoSeconds % 1000 =3D=3D 0) { + MicroSeconds =3D NanoSeconds/1000; + } else { + MicroSeconds =3D NanoSeconds/1000 + 1; + } + MicroSecondDelay (MicroSeconds); + + return NanoSeconds; +} + +/** + Retrieves the current value of a 64-bit free running performance counter. + + Retrieves the current value of a 64-bit free running performance counter= . The + counter can either count up by 1 or count down by 1. If the physical + performance counter counts by a larger increment, then the counter values + must be translated. The properties of the counter can be retrieved from + GetPerformanceCounterProperties (). + + @return The current value of the free running performance counter. +**/ +UINT64 +EFIAPI +GetPerformanceCounter ( + VOID + ) +{ + return LoongArchReadTime (); +} +/** + Retrieves the 64-bit frequency in Hz and the range of performance counter + values. + + If StartValue is not NULL, then the value that the performance counter s= tarts + with immediately after is it rolls over is returned in StartValue. If + EndValue is not NULL, then the value that the performance counter end wi= th + immediately before it rolls over is returned in EndValue. The 64-bit + frequency of the performance counter in Hz is always returned. If StartV= alue + is less than EndValue, then the performance counter counts up. If StartV= alue + is greater than EndValue, then the performance counter counts down. For + example, a 64-bit free running counter that counts up would have a Start= Value + of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter + that counts down would have a StartValue of 0xFFFFFF and an EndValue of = 0. + + @param StartValue The value the performance counter starts with when it + rolls over. + @param EndValue The value that the performance counter ends with bef= ore + it rolls over. + + @return The frequency in Hz. +**/ +UINT64 +EFIAPI +GetPerformanceCounterProperties ( + OUT UINT64 *StartValue, OPTIONAL + OUT UINT64 *EndValue OPTIONAL + ) +{ + if (StartValue !=3D NULL) { + *StartValue =3D BIT2; + } + + if (EndValue !=3D NULL) { + *EndValue =3D BIT48 - 1; + } + + return GetFreq (); +} + +/** + Converts elapsed ticks of performance counter to time in nanoseconds. + + This function converts the elapsed ticks of running performance counter = to + time value in unit of nanoseconds. + + @param Ticks The number of elapsed ticks of running performance cou= nter. + + @return The elapsed time in nanoseconds. +**/ +UINT64 +EFIAPI +GetTimeInNanoSecond ( + IN UINT64 Ticks + ) +{ + UINT64 Frequency; + UINT64 NanoSeconds; + UINT64 Remainder; + INTN Shift; + + Frequency =3D GetPerformanceCounterProperties (NULL, NULL); + + // + // Ticks + // Time =3D --------- x 1,000,000,000 + // Frequency + // + NanoSeconds =3D MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remai= nder), 1000000000u); + + // + // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit. + // Since 2^29 < 1,000,000,000 =3D 0x3B9ACA00 < 2^30, Remainder should < = 2^(64-30) =3D 2^34, + // i.e. highest bit set in Remainder should <=3D 33. + // + Shift =3D MAX (0, HighBitSet64 (Remainder) - 33); + Remainder =3D RShiftU64 (Remainder, (UINTN) Shift); + Frequency =3D RShiftU64 (Frequency, (UINTN) Shift); + NanoSeconds +=3D DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u)= , Frequency, NULL); + + return NanoSeconds; +} diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Time= rLib.inf b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerL= ib.inf new file mode 100644 index 0000000000..86f243998b --- /dev/null +++ b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.inf @@ -0,0 +1,32 @@ +## @file +# Generic LoongArch implementation of TimerLib.h +# +# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights = reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D TimerLib + FILE_GUID =3D 740389C7-CC44-4A2F-88DC-89D97D312E= 7C + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D TimerLib + +# +# VALID_ARCHITECTURES =3D LOONGARCH64 +# + +[Sources] + TimerLib.c + Count.S + +[Packages] + Platform/Loongson/LoongArchQemuPkg/Loongson.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + DebugLib + IoLib --=20 2.31.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#96275): https://edk2.groups.io/g/devel/message/96275 Mute This Topic: https://groups.io/mt/94955172/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-