From nobody Mon Feb 9 02:57:07 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+86795+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+86795+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1645271938; cv=none; d=zohomail.com; s=zohoarc; b=CwZp4q2sYUj7cu0MM6iXNa/2wlTSKQ28v0eFsZDK3YqoNPbEJ/vwtMZNkgQ9csJOblBd8ijJD6mEYaA/USAi3LU/0axtKK5VOG94mWIOYmcb2yjv4iuA44KMDi3gquTwanMryKbIAgnTIPRaJfBmoOzKu6I3MYv9Z7HUf06NsEc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1645271938; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=h/XToQZYg8uuL0lLFGsWzsZsQNEKAGJSMCUfh3CvB4E=; b=WXQiqG+jfduiNZnuDgCqZLyTlBKeNPBxJ/4Nk1MCdVZtSMpURd86fcsheVW6PzvBYTWJalkzlTQMB/CFMGTjdb77aAB6uZKcMldo6B1fMnavNYRvywXgRqkhyx3BHAR3HT16Kw/Dh8uZJj89N0Hh8h00YITTXlKAQrHqB5gbOZg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+86795+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 164527193826363.09756680753003; Sat, 19 Feb 2022 03:58:58 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id y4noYY1788612xLAcU5ZhMAH; Sat, 19 Feb 2022 03:58:57 -0800 X-Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web08.9100.1645271933337984887 for ; Sat, 19 Feb 2022 03:58:54 -0800 X-IronPort-AV: E=McAfee;i="6200,9189,10262"; a="231915532" X-IronPort-AV: E=Sophos;i="5.88,381,1635231600"; d="scan'208";a="231915532" X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Feb 2022 03:58:45 -0800 X-IronPort-AV: E=Sophos;i="5.88,381,1635231600"; d="scan'208";a="546691390" X-Received: from mxu9-mobl1.ccr.corp.intel.com ([10.249.175.253]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Feb 2022 03:58:42 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min Xu , Ard Biesheuvel , Jordan Justen , Brijesh Singh , Erdem Aktas , James Bottomley , Jiewen Yao , Tom Lendacky , Gerd Hoffmann Subject: [edk2-devel] [PATCH V6 33/42] OvmfPkg: Update PlatformInitLib for Tdx guest to publish ram regions Date: Sat, 19 Feb 2022 19:56:46 +0800 Message-Id: <6b6241dda6d4a672e4602ddae095963c0e127edc.1645261991.git.min.m.xu@intel.com> In-Reply-To: References: MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,min.m.xu@intel.com X-Gm-Message-State: yGey6EfnGRcW00RmuOCTo00yx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1645271937; bh=2xkE58Q8oyvDOcDytrV5BMYu+P5U+gwozQQieJN822Y=; h=Cc:Date:From:Reply-To:Subject:To; b=fpBrhmhmnwoiIhrCRVfKc1xWkZ3UWkADsOSOtmorrN1P1ha81YGeevQTAIhvUdHOZ4K M9u0SnzA+2GSs1ON0OK3cGCRvbR4uWP6Z72XyMAj6Gs9Zb95WP2qcp0/ic4zilpBvLTyC gkmVD+HiVz/nob90pNei3aWPOmfC5E6F0qs= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1645271940321100024 Content-Type: text/plain; charset="utf-8" RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3429 In Tdx guest, the system memory is passed in TdHob by host VMM. So the major task of PlatformTdxPublishRamRegions is to walk thru the TdHob list and transfer the ResourceDescriptorHob and MemoryAllocationHob to the hobs in DXE phase. MemoryAllocationHob should also be created for Mailbox and Ovmf work area. Another update is in PlatformAddressWidthInitialization. The physical address width that Tdx guest supports is either 48 or 52. Cc: Ard Biesheuvel Cc: Jordan Justen Cc: Brijesh Singh Cc: Erdem Aktas Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Cc: Gerd Hoffmann Signed-off-by: Min Xu Acked-by: Gerd Hoffmann --- OvmfPkg/Include/Library/PlatformInitLib.h | 14 ++++++ OvmfPkg/Library/PlatformInitLib/IntelTdx.c | 49 +++++++++++++++++++ .../Library/PlatformInitLib/IntelTdxNull.c | 16 ++++++ OvmfPkg/Library/PlatformInitLib/MemDetect.c | 13 +++++ 4 files changed, 92 insertions(+) diff --git a/OvmfPkg/Include/Library/PlatformInitLib.h b/OvmfPkg/Include/Li= brary/PlatformInitLib.h index 538fd7aee48c..6a88a9b4a69c 100644 --- a/OvmfPkg/Include/Library/PlatformInitLib.h +++ b/OvmfPkg/Include/Library/PlatformInitLib.h @@ -269,4 +269,18 @@ ProcessTdxHobList ( VOID ); =20 +/** + In Tdx guest, the system memory is passed in TdHob by host VMM. So + the major task of PlatformTdxPublishRamRegions is to walk thru the + TdHob list and transfer the ResourceDescriptorHob and MemoryAllocationHob + to the hobs in DXE phase. + + MemoryAllocationHob should also be created for Mailbox and Ovmf work are= a. +**/ +VOID +EFIAPI +PlatformTdxPublishRamRegions ( + VOID + ); + #endif // PLATFORM_INIT_LIB_H_ diff --git a/OvmfPkg/Library/PlatformInitLib/IntelTdx.c b/OvmfPkg/Library/P= latformInitLib/IntelTdx.c index 1ee24dfe754d..e9243cfa7e37 100644 --- a/OvmfPkg/Library/PlatformInitLib/IntelTdx.c +++ b/OvmfPkg/Library/PlatformInitLib/IntelTdx.c @@ -502,3 +502,52 @@ TransferTdxHobList ( Hob.Raw =3D GET_NEXT_HOB (Hob); } } + +/** + In Tdx guest, the system memory is passed in TdHob by host VMM. So + the major task of PlatformTdxPublishRamRegions is to walk thru the + TdHob list and transfer the ResourceDescriptorHob and MemoryAllocationHob + to the hobs in DXE phase. + + MemoryAllocationHob should also be created for Mailbox and Ovmf work are= a. +**/ +VOID +EFIAPI +PlatformTdxPublishRamRegions ( + VOID + ) +{ + if (!TdIsEnabled ()) { + return; + } + + TransferTdxHobList (); + + // + // The memory region defined by PcdOvmfSecGhcbBackupBase is pre-allocate= d by + // host VMM and used as the td mailbox at the beginning of system boot. + // + BuildMemoryAllocationHob ( + FixedPcdGet32 (PcdOvmfSecGhcbBackupBase), + FixedPcdGet32 (PcdOvmfSecGhcbBackupSize), + EfiACPIMemoryNVS + ); + + if (FixedPcdGet32 (PcdOvmfWorkAreaSize) !=3D 0) { + // + // Reserve the work area. + // + // Since this memory range will be used by the Reset Vector on S3 + // resume, it must be reserved as ACPI NVS. + // + // If S3 is unsupported, then various drivers might still write to the + // work area. We ought to prevent DXE from serving allocation requests + // such that they would overlap the work area. + // + BuildMemoryAllocationHob ( + (EFI_PHYSICAL_ADDRESS)(UINTN)FixedPcdGet32 (PcdOvmfWorkAreaBase), + (UINT64)(UINTN)FixedPcdGet32 (PcdOvmfWorkAreaSize), + EfiBootServicesData + ); + } +} diff --git a/OvmfPkg/Library/PlatformInitLib/IntelTdxNull.c b/OvmfPkg/Libra= ry/PlatformInitLib/IntelTdxNull.c index af90e0866e89..3ebe582af8de 100644 --- a/OvmfPkg/Library/PlatformInitLib/IntelTdxNull.c +++ b/OvmfPkg/Library/PlatformInitLib/IntelTdxNull.c @@ -28,3 +28,19 @@ ProcessTdxHobList ( { return EFI_UNSUPPORTED; } + +/** + In Tdx guest, the system memory is passed in TdHob by host VMM. So + the major task of PlatformTdxPublishRamRegions is to walk thru the + TdHob list and transfer the ResourceDescriptorHob and MemoryAllocationHob + to the hobs in DXE phase. + + MemoryAllocationHob should also be created for Mailbox and Ovmf work are= a. +**/ +VOID +EFIAPI +PlatformTdxPublishRamRegions ( + VOID + ) +{ +} diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/= PlatformInitLib/MemDetect.c index 5a9cb6e638ed..af4c851d479d 100644 --- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c +++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c @@ -34,6 +34,7 @@ Module Name: #include #include #include +#include =20 #include =20 @@ -481,7 +482,19 @@ PlatformAddressWidthInitialization ( PhysMemAddressWidth =3D 36; } =20 + #if defined (MDE_CPU_X64) + if (TdIsEnabled ()) { + if (TdSharedPageMask () =3D=3D (1ULL << 47)) { + PhysMemAddressWidth =3D 48; + } else { + PhysMemAddressWidth =3D 52; + } + } + + ASSERT (PhysMemAddressWidth <=3D 52); + #else ASSERT (PhysMemAddressWidth <=3D 48); + #endif =20 return PhysMemAddressWidth; } --=20 2.29.2.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#86795): https://edk2.groups.io/g/devel/message/86795 Mute This Topic: https://groups.io/mt/89252063/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-