From nobody Thu Apr 25 07:58:33 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+72953+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+72953+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1615962268; cv=none; d=zohomail.com; s=zohoarc; b=QgJAWDSlbB6gq1mCQpIryIz+LS5xYgPr0Q1kHhprZJDiPc+IN08+4IM7rXN38Lcm3k21i0kiXBdLmeFPriZrK4b4WpLT+F0ZrMux+8xpDz1u0smm2dln1Xzu/zeXgk7JKxZm7zN/31nhdi1iGRMVFClyrI9jQNwBPONstVYtn+k= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615962268; h=Content-Transfer-Encoding:Cc:Date:From:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=mnVZ3o+FXeHWOtkJyYmpQv05ffbaMT40L+hFDN7Z+UA=; b=PnZyF7RlMd7N06fYWUVwdEk9fvXOtsmzt6hPo3dGBU3sQJhzyrV33Ml5O8Jc/MQ0p3dQONxgUXctei/WXCRYD8kcWSMHG99Efy5T7qcd8cimghRYP8J6mFEDcFh82aMJH9N85sPNnT5dw7z+uYcu2FVCOm64r4DFa/5aq3Syqb4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+72953+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1615962268843236.22563126700356; Tue, 16 Mar 2021 23:24:28 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id mFzSYY1788612xJ64EY4Vv4Y; Tue, 16 Mar 2021 23:24:26 -0700 X-Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mx.groups.io with SMTP id smtpd.web10.3002.1615962263935965704 for ; Tue, 16 Mar 2021 23:24:24 -0700 IronPort-SDR: h8sjYJnH7fE+osd+yLfSXMfMhgL1SFeCYezkN1AqOIks1SyD3bX4wLNCxiuPI+CNMOYxzrPphx PhRJgGnhxhJw== X-IronPort-AV: E=McAfee;i="6000,8403,9925"; a="186040978" X-IronPort-AV: E=Sophos;i="5.81,255,1610438400"; d="scan'208";a="186040978" X-Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Mar 2021 23:24:17 -0700 IronPort-SDR: G+vB46H8ylJIqw+L/7u80JvEt4XQGONOSLfwWOOK14IbeDGmqCde/GcEB26WPyNQftwfZLwaoa Qjqe3oqGYfaQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,255,1610438400"; d="scan'208";a="440341289" X-Received: from ikuox-tiger-lake-client-platform.itwn.intel.com ([10.5.215.23]) by FMSMGA003.fm.intel.com with ESMTP; 16 Mar 2021 23:24:16 -0700 From: "IanX Kuo" To: devel@edk2.groups.io Cc: VincentX Ke Subject: [edk2-devel] [PATCH] ShellPkg/Pci: Add valid check for PCI extended config space parser Date: Sat, 10 Apr 2021 22:15:09 +0800 Message-Id: <568b955d98de0cc3dc52467bf394324e391d4b7c.1615954984.git.vincentx.ke@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ianx.kuo@intel.com X-Gm-Message-State: p7uVG7bRhYpLAYZ2Yqr47tCMx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1615962266; bh=0rdrT3Tzk/+rvf0oh5ib9rDGzk/tIXhYU5Xb0BELGo0=; h=Cc:Date:From:Reply-To:Subject:To; b=ky0tym/aZxy3AACV782m98nii/9f0aoYpxeO0q4bwKCEjqEs+LiMH/4jrjCC/no/ys8 JdVw5GXEZhlVJh7J8Z3YJk1en/De0FjVcpoH0tJgV7LZCR7FFD1GvlOZCcktKYfHri6ci teZfht/kQxMBQGVe1009oEVE/yeNiXOOhm0= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: VincentX Ke Bugzilla: 3262 (https://bugzilla.tianocore.org/show_bug.cgi?id=3D3262) No need to print PCIe details while CapabilityId is 0xFFFF. Limit the NextCapabilityOffset to PCI configuration space. Signed-off-by: VincentX Ke --- ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c b/ShellPkg/L= ibrary/UefiShellDebug1CommandsLib/Pci.c index a2f04d8db5..1e5dc75e27 100644 --- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c +++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c @@ -2038,12 +2038,14 @@ LocatePciCapability ( =20 @param[in] PciExpressCap PCI Express capability buffer. @param[in] ExtendedConfigSpace PCI Express extended configuration space. + @param[in] ExtendedConfigSize PCI Express extended configuration size. @param[in] ExtendedCapability PCI Express extended capability ID to exp= lain. **/ VOID PciExplainPciExpress ( IN PCI_CAPABILITY_PCIEXP *PciExpressCap, IN UINT8 *ExtendedConfigSpace, + IN UINTN ExtendedConfigSize, IN CONST UINT16 ExtendedCapability ); =20 @@ -2921,6 +2923,7 @@ ShellCommandRunPci ( PciExplainPciExpress ( (PCI_CAPABILITY_PCIEXP *) ((UINT8 *) &ConfigSpace + PcieCapabili= tyPtr), ExtendedConfigSpace, + ExtendedConfigSize, ExtendedCapability ); } @@ -5698,12 +5701,14 @@ PrintPciExtendedCapabilityDetails( =20 @param[in] PciExpressCap PCI Express capability buffer. @param[in] ExtendedConfigSpace PCI Express extended configuration space. + @param[in] ExtendedConfigSize PCI Express extended configuration size. @param[in] ExtendedCapability PCI Express extended capability ID to exp= lain. **/ VOID PciExplainPciExpress ( IN PCI_CAPABILITY_PCIEXP *PciExpressCap, IN UINT8 *ExtendedConfigSpace, + IN UINTN ExtendedConfigSize, IN CONST UINT16 ExtendedCapability ) { @@ -5786,7 +5791,7 @@ PciExplainPciExpress ( } =20 ExtHdr =3D (PCI_EXP_EXT_HDR*)ExtendedConfigSpace; - while (ExtHdr->CapabilityId !=3D 0 && ExtHdr->CapabilityVersion !=3D 0) { + while (ExtHdr->CapabilityId !=3D 0 && ExtHdr->CapabilityVersion !=3D 0 &= & ExtHdr->CapabilityId !=3D 0xFFFF) { // // Process this item // @@ -5800,7 +5805,8 @@ PciExplainPciExpress ( // // Advance to the next item if it exists // - if (ExtHdr->NextCapabilityOffset !=3D 0) { + if (ExtHdr->NextCapabilityOffset !=3D 0 && + (ExtHdr->NextCapabilityOffset <=3D (UINT32) (ExtendedConfigSize + E= FI_PCIE_CAPABILITY_BASE_OFFSET - sizeof (PCI_EXP_EXT_HDR)))) { ExtHdr =3D (PCI_EXP_EXT_HDR*)(ExtendedConfigSpace + ExtHdr->NextCapa= bilityOffset - EFI_PCIE_CAPABILITY_BASE_OFFSET); } else { break; --=20 2.18.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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