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Tue, 6 Dec 2022 13:23:46 +0000 X-Received: from SATLEXMB07.amd.com (10.181.41.45) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Tue, 6 Dec 2022 07:23:45 -0600 X-Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB07.amd.com (10.181.41.45) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Tue, 6 Dec 2022 05:23:45 -0800 X-Received: from BLR-LAB-SFW01.amd.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Tue, 6 Dec 2022 07:23:43 -0600 From: "Abdul Lateef Attar via groups.io" To: CC: Abdul Lateef Attar , Abner Chang , Garrett Kirkendall , "Paul Grimes" , Eric Dong , Ray Ni , Rahul Kumar Subject: [edk2-devel] [PATCH v1 1/5] UefiCpuPkg/SmmCpuFeaturesLib: Restructure arch-dependent code Date: Tue, 6 Dec 2022 18:53:14 +0530 Message-ID: <4c6e06ace12701059f409fc146c227cc28c5ca6b.1670332633.git.abdattar@amd.com> In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT078:EE_|DM6PR12MB4282:EE_ X-MS-Office365-Filtering-Correlation-Id: ca7e7546-582c-4c01-a9b5-08dad78d1ac3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Message-Info: sWx+fVzn5oIBZ8qmRNRtcW46xnZsnSzG8s/a7jGphGNCVVaSOjANHE+WqH6OHElhc1uXl2RXfAq/HecC4ZXmRWdw8/S+TLobP7IZVaHjc7tTJjuyZoqkKF31K/Zt54M0BnScwz4aS0Cs0Kn/7tzPndNqcw9+KPQJvj/HwNJExH/3DLUJXYLBlbGDslXCnQLcQAPdEZICnuMUkCf5T7KwrOsXxH6xDuTH2OcxPQJcFQYcRZixioGzJFl2njfK5FLb+niyXO32rCc/wPJZTF3A/49D28tMIxICQZTnE+D7ZD3JsNuT8lnNQxdhLOoE0veLzeW+L2TEewKrfqzYUmiTXW4FymnpSMavYl8VcnE7vpv46I2anl/22xPqHEL1FAXKsKIXcPm6oC+d7N1n8iBfdy7WZ9VbrCvyrfC9lmcIx4WMzdk8Rmzj3iJUULcK5ERiN4/5qSIhH6px/8WwXwaDstQ2G2Qww5rSaLdOjMszXs3njSusyEtE53e7+zR858t15oqh5c6VQKZna8OLNdkL7qBAc8WjrvR0aXWgOYjwQvy73bfiAEpDsrcciaFmKkk6xcrQ8Y5l21Ig9I+vy2rubdlVCAEWK3CRaHxBMSieflOmJDyLhcygm/fYq14NSd0kX5iPx3q3oGUa6BZdWa4WsTtz5h4IXvCDSL3jG/u902tpieYE4d2wwJeAntFV8PDL2g18Cp7sG0wD29DyxLaXSBiwVrqIwhKwDFyVzJQPeWu9aoJlXsFnQF4bf8u8IknrdWZTWK3xUVR9Tyihu6lWDA== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Dec 2022 13:23:46.4956 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ca7e7546-582c-4c01-a9b5-08dad78d1ac3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT078.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4282 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,abdattar@amd.com X-Gm-Message-State: 8FGeU6te3aHHz1yV45WgKnx2x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1670333029; bh=ruFwHG4T+BjeQ3sjSubecOeBDRUNu57WWrUwynNkK7k=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=macEDbdw8PeX0fIfbuOBnbcxg56vNprD2E2Ufn5Rz92QVrstPqu5h9Ju588uCBA0yJU QW/SyesDi0THaNkYkQVQX0BCDYgRlFyVGh4XdQDm1QlsT30T3KpidXT7+9dRwX3WBkLFO CGoErAEur/IeSpdGX5ni9RHqJ2i9cMPYEEo= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1670333032150100001 Content-Type: text/plain; charset="utf-8" From: Abdul Lateef Attar BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4182 moves Intel-specific code to the arch-dependent file. Other processor families might have different implementation of these functions. Hence, moving out of the common file. Cc: Abner Chang Cc: Garrett Kirkendall Cc: Paul Grimes Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Signed-off-by: Abdul Lateef Attar Reviewed-by: Abner Chang --- .../IntelSmmCpuFeaturesLib.c | 140 ++++++++++++++++++ .../SmmCpuFeaturesLibCommon.c | 140 ------------------ 2 files changed, 140 insertions(+), 140 deletions(-) diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c = b/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c index d5eaaa7a991e..994267f393b3 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c @@ -400,3 +400,143 @@ SmmCpuFeaturesSetSmmRegister ( AsmWriteMsr64 (SMM_FEATURES_LIB_SMM_FEATURE_CONTROL, Value); } } + +/** + This function updates the SMRAM save state on the currently executing CPU + to resume execution at a specific address after an RSM instruction. This + function must evaluate the SMRAM save state to determine the execution m= ode + the RSM instruction resumes and update the resume execution address with + either NewInstructionPointer32 or NewInstructionPoint. The auto HALT re= start + flag in the SMRAM save state must always be cleared. This function retu= rns + the value of the instruction pointer from the SMRAM save state that was + replaced. If this function returns 0, then the SMRAM save state was not + modified. + + This function is called during the very first SMI on each CPU after + SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mo= de + to signal that the SMBASE of each CPU has been updated before the default + SMBASE address is used for the first SMI to the next CPU. + + @param[in] CpuIndex The index of the CPU to hook. The v= alue + must be between 0 and the NumberOfCp= us + field in the System Management Syste= m Table + (SMST). + @param[in] CpuState Pointer to SMRAM Save State Map for = the + currently executing CPU. + @param[in] NewInstructionPointer32 Instruction pointer to use if resumi= ng to + 32-bit execution mode from 64-bit SM= M. + @param[in] NewInstructionPointer Instruction pointer to use if resumi= ng to + same execution mode as SMM. + + @retval 0 This function did modify the SMRAM save state. + @retval > 0 The original instruction pointer value from the SMRAM save = state + before it was replaced. +**/ +UINT64 +EFIAPI +SmmCpuFeaturesHookReturnFromSmm ( + IN UINTN CpuIndex, + IN SMRAM_SAVE_STATE_MAP *CpuState, + IN UINT64 NewInstructionPointer32, + IN UINT64 NewInstructionPointer + ) +{ + return 0; +} + +/** + Read an SMM Save State register on the target processor. If this functi= on + returns EFI_UNSUPPORTED, then the caller is responsible for reading the + SMM Save Sate register. + + @param[in] CpuIndex The index of the CPU to read the SMM Save State. = The + value must be between 0 and the NumberOfCpus field= in + the System Management System Table (SMST). + @param[in] Register The SMM Save State register to read. + @param[in] Width The number of bytes to read from the CPU save stat= e. + @param[out] Buffer Upon return, this holds the CPU register value read + from the save state. + + @retval EFI_SUCCESS The register was read from Save State. + @retval EFI_INVALID_PARAMETER Buffer is NULL. + @retval EFI_UNSUPPORTED This function does not support reading Reg= ister. + +**/ +EFI_STATUS +EFIAPI +SmmCpuFeaturesReadSaveStateRegister ( + IN UINTN CpuIndex, + IN EFI_SMM_SAVE_STATE_REGISTER Register, + IN UINTN Width, + OUT VOID *Buffer + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Writes an SMM Save State register on the target processor. If this func= tion + returns EFI_UNSUPPORTED, then the caller is responsible for writing the + SMM Save Sate register. + + @param[in] CpuIndex The index of the CPU to write the SMM Save State. = The + value must be between 0 and the NumberOfCpus field = in + the System Management System Table (SMST). + @param[in] Register The SMM Save State register to write. + @param[in] Width The number of bytes to write to the CPU save state. + @param[in] Buffer Upon entry, this holds the new CPU register value. + + @retval EFI_SUCCESS The register was written to Save State. + @retval EFI_INVALID_PARAMETER Buffer is NULL. + @retval EFI_UNSUPPORTED This function does not support writing Reg= ister. +**/ +EFI_STATUS +EFIAPI +SmmCpuFeaturesWriteSaveStateRegister ( + IN UINTN CpuIndex, + IN EFI_SMM_SAVE_STATE_REGISTER Register, + IN UINTN Width, + IN CONST VOID *Buffer + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Check to see if an SMM register is supported by a specified CPU. + + @param[in] CpuIndex The index of the CPU to check for SMM register supp= ort. + The value must be between 0 and the NumberOfCpus fi= eld + in the System Management System Table (SMST). + @param[in] RegName Identifies the SMM register to check for support. + + @retval TRUE The SMM register specified by RegName is supported by the= CPU + specified by CpuIndex. + @retval FALSE The SMM register specified by RegName is not supported by= the + CPU specified by CpuIndex. +**/ +BOOLEAN +EFIAPI +SmmCpuFeaturesIsSmmRegisterSupported ( + IN UINTN CpuIndex, + IN SMM_REG_NAME RegName + ) +{ + if (FeaturePcdGet (PcdSmmFeatureControlEnable) && (RegName =3D=3D SmmReg= FeatureControl)) { + return TRUE; + } + + return FALSE; +} + +/** + This function is hook point called after the gEfiSmmReadyToLockProtocolG= uid + notification is completely processed. +**/ +VOID +EFIAPI +SmmCpuFeaturesCompleteSmmReadyToLock ( + VOID + ) +{ +} diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c= b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c index 7777e52740eb..2f8841bbbf77 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c @@ -17,49 +17,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent =20 #include "CpuFeaturesLib.h" =20 -/** - This function updates the SMRAM save state on the currently executing CPU - to resume execution at a specific address after an RSM instruction. This - function must evaluate the SMRAM save state to determine the execution m= ode - the RSM instruction resumes and update the resume execution address with - either NewInstructionPointer32 or NewInstructionPoint. The auto HALT re= start - flag in the SMRAM save state must always be cleared. This function retu= rns - the value of the instruction pointer from the SMRAM save state that was - replaced. If this function returns 0, then the SMRAM save state was not - modified. - - This function is called during the very first SMI on each CPU after - SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mo= de - to signal that the SMBASE of each CPU has been updated before the default - SMBASE address is used for the first SMI to the next CPU. - - @param[in] CpuIndex The index of the CPU to hook. The v= alue - must be between 0 and the NumberOfCp= us - field in the System Management Syste= m Table - (SMST). - @param[in] CpuState Pointer to SMRAM Save State Map for = the - currently executing CPU. - @param[in] NewInstructionPointer32 Instruction pointer to use if resumi= ng to - 32-bit execution mode from 64-bit SM= M. - @param[in] NewInstructionPointer Instruction pointer to use if resumi= ng to - same execution mode as SMM. - - @retval 0 This function did modify the SMRAM save state. - @retval > 0 The original instruction pointer value from the SMRAM save = state - before it was replaced. -**/ -UINT64 -EFIAPI -SmmCpuFeaturesHookReturnFromSmm ( - IN UINTN CpuIndex, - IN SMRAM_SAVE_STATE_MAP *CpuState, - IN UINT64 NewInstructionPointer32, - IN UINT64 NewInstructionPointer - ) -{ - return 0; -} - /** Hook point in normal execution mode that allows the one CPU that was ele= cted as monarch during System Management Mode initialization to perform addit= ional @@ -90,103 +47,6 @@ SmmCpuFeaturesRendezvousExit ( { } =20 -/** - Check to see if an SMM register is supported by a specified CPU. - - @param[in] CpuIndex The index of the CPU to check for SMM register supp= ort. - The value must be between 0 and the NumberOfCpus fi= eld - in the System Management System Table (SMST). - @param[in] RegName Identifies the SMM register to check for support. - - @retval TRUE The SMM register specified by RegName is supported by the= CPU - specified by CpuIndex. - @retval FALSE The SMM register specified by RegName is not supported by= the - CPU specified by CpuIndex. -**/ -BOOLEAN -EFIAPI -SmmCpuFeaturesIsSmmRegisterSupported ( - IN UINTN CpuIndex, - IN SMM_REG_NAME RegName - ) -{ - if (FeaturePcdGet (PcdSmmFeatureControlEnable) && (RegName =3D=3D SmmReg= FeatureControl)) { - return TRUE; - } - - return FALSE; -} - -/** - Read an SMM Save State register on the target processor. If this functi= on - returns EFI_UNSUPPORTED, then the caller is responsible for reading the - SMM Save Sate register. - - @param[in] CpuIndex The index of the CPU to read the SMM Save State. = The - value must be between 0 and the NumberOfCpus field= in - the System Management System Table (SMST). - @param[in] Register The SMM Save State register to read. - @param[in] Width The number of bytes to read from the CPU save stat= e. - @param[out] Buffer Upon return, this holds the CPU register value read - from the save state. - - @retval EFI_SUCCESS The register was read from Save State. - @retval EFI_INVALID_PARAMETER Buffer is NULL. - @retval EFI_UNSUPPORTED This function does not support reading Reg= ister. - -**/ -EFI_STATUS -EFIAPI -SmmCpuFeaturesReadSaveStateRegister ( - IN UINTN CpuIndex, - IN EFI_SMM_SAVE_STATE_REGISTER Register, - IN UINTN Width, - OUT VOID *Buffer - ) -{ - return EFI_UNSUPPORTED; -} - -/** - Writes an SMM Save State register on the target processor. If this func= tion - returns EFI_UNSUPPORTED, then the caller is responsible for writing the - SMM Save Sate register. - - @param[in] CpuIndex The index of the CPU to write the SMM Save State. = The - value must be between 0 and the NumberOfCpus field = in - the System Management System Table (SMST). - @param[in] Register The SMM Save State register to write. - @param[in] Width The number of bytes to write to the CPU save state. - @param[in] Buffer Upon entry, this holds the new CPU register value. - - @retval EFI_SUCCESS The register was written to Save State. - @retval EFI_INVALID_PARAMETER Buffer is NULL. - @retval EFI_UNSUPPORTED This function does not support writing Reg= ister. -**/ -EFI_STATUS -EFIAPI -SmmCpuFeaturesWriteSaveStateRegister ( - IN UINTN CpuIndex, - IN EFI_SMM_SAVE_STATE_REGISTER Register, - IN UINTN Width, - IN CONST VOID *Buffer - ) -{ - return EFI_UNSUPPORTED; -} - -/** - This function is hook point called after the gEfiSmmReadyToLockProtocolG= uid - notification is completely processed. -**/ -VOID -EFIAPI -SmmCpuFeaturesCompleteSmmReadyToLock ( - VOID - ) -{ -} - /** This API provides a method for a CPU to allocate a specific region for s= toring page tables. =20 --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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