From nobody Sun Apr 28 21:52:23 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1499324400153710.1571129762752; Thu, 6 Jul 2017 00:00:00 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 99C4821CC5343; Wed, 5 Jul 2017 23:58:18 -0700 (PDT) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6267C21CC5341 for ; Wed, 5 Jul 2017 23:58:17 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jul 2017 23:59:57 -0700 Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga001.jf.intel.com with ESMTP; 05 Jul 2017 23:59:57 -0700 Received: from fmsmsx118.amr.corp.intel.com (10.18.116.18) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 5 Jul 2017 23:59:56 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx118.amr.corp.intel.com (10.18.116.18) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 5 Jul 2017 23:59:56 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.116]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.56]) with mapi id 14.03.0319.002; Thu, 6 Jul 2017 14:59:52 +0800 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.40,315,1496127600"; d="dat'59?scan'59,208,59";a="1148280798" From: "Guo, Mang" To: "edk2-devel@lists.01.org" Thread-Topic: [Patch][edk2-platforms/devel-MinnowBoard3-UDK2017] Enable GCC Yocto S3 Thread-Index: AdL2JXVBPXjsnwcHQCmTz+SZUKEuow== Date: Thu, 6 Jul 2017 06:59:52 +0000 Message-ID: <22D2C85ED001C54AA20BFE3B0E4751D15251F63E@SHSMSX103.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: <22D2C85ED001C54AA20BFE3B0E4751D15251F63E@SHSMSX103.ccr.corp.intel.com> x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZTJlNTJiYzktMWEwNy00YzNkLTliZmQtNTNmYzgyNWRhOTQxIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6IlhRU29KdXRBN1AxZFwvMTN2dHN1TjdNeGN3bXFNbG9NVWV1OEtRZkFCRWd3PSJ9 x-ctpclassification: CTP_IC dlp-product: dlpe-windows dlp-version: 10.0.102.7 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.22 Subject: [edk2] [Patch][edk2-platforms/devel-MinnowBoard3-UDK2017] Enable GCC Yocto S3 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Wei, David" Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Enable GCC build BIOS image Yocto S3 support. Replace CPU drivers with driv= ers from core packages. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang --- .../Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c | 34 ++++++++++++++++++= ++++ .../Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf | 4 ++- .../PlatformPostMemPei/PlatformInit.c | 30 ------------------- .../PlatformPostMemPei/PlatformPostMemPei.inf | 1 - .../BroxtonPlatformPkg/PlatformDsc/Components.dsc | 2 +- Platform/BroxtonPlatformPkg/PlatformPkg.fdf | 8 +---- Silicon/BroxtonSoC/BroxtonSiPkg/SiPkgDxe.dsc | 3 +- 7 files changed, 40 insertions(+), 42 deletions(-) diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPl= atform.c b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlat= form.c index b5cd9f7..3007132 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -42,6 +43,7 @@ #include #include #include +#include #include "PlatformBaseAddresses.h" =20 #if (ENBDT_PF_ENABLE =3D=3D 0) @@ -66,6 +68,8 @@ CHAR16 gACPIOSFRMfgStringVariableName[] =3D ACPI_OS= FR_MFG_STRING_VARIABLE_NA =20 EFI_GLOBAL_NVS_AREA_PROTOCOL mGlobalNvsArea; EFI_CPU_IO2_PROTOCOL *mCpuIo; +CPU_INIT_DATA_HOB *mCpuInitDataHob =3D NULL; +CPU_GLOBAL_NVS_AREA_PROTOCOL CpuGlobalNvsAreaProtocol; =20 BOOLEAN mFirstNotify; EFI_PLATFORM_INFO_HOB *mPlatformInfo; @@ -1317,6 +1321,7 @@ AcpiPlatformEntryPoint ( CHAR16 LocalGuidString[GUID_CHARS_NUMBER]; UINTN Data32; UINT32 VariableAttributes; + VOID *Hob; =20 mFirstNotify =3D FALSE; TableVersion =3D EFI_ACPI_TABLE_VERSION_2_0; @@ -1999,6 +2004,35 @@ AcpiPlatformEntryPoint ( NULL ); =20 + + + // + // Get CPU Init Data Hob + // + Hob =3D GetFirstGuidHob (&gCpuInitDataHobGuid); + if (Hob =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "CPU Data HOB not available\n")); + ASSERT_EFI_ERROR (EFI_NOT_FOUND); + } + mCpuInitDataHob =3D (CPU_INIT_DATA_HOB *) ((UINTN) Hob + sizeof (EFI_= HOB_GUID_TYPE)); + + // + // Get CPU Global NVS protocol pointer + // + CpuGlobalNvsAreaProtocol.Area =3D (CPU_GLOBAL_NVS_AREA *) (UINTN) mCpuIn= itDataHob->CpuGnvsPointer; + CpuGlobalNvsAreaProtocol.Area->DtsAcpiEnable =3D 0; + + // + // Install Cpu Power management GlobalNVS Area protocol + // + Status =3D gBS->InstallMultipleProtocolInterfaces ( + &Handle, + &gCpuGlobalNvsAreaProtocolGuid, + &CpuGlobalNvsAreaProtocol, + NULL + ); + ASSERT_EFI_ERROR (Status); + // // Read tables from the storage file. // diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPl= atformDxe.inf b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/Acp= iPlatformDxe.inf index cf862fc..31c2a77 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatformD= xe.inf +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatformD= xe.inf @@ -1,7 +1,7 @@ ## @file # ACPI Platform Driver. # -# Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License @@ -62,6 +62,7 @@ gEfiBxtVariableGuid gEfiPramConfGuid gPlatformSsdtImageGuid + gCpuInitDataHobGuid =20 [Protocols] gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED @@ -77,6 +78,7 @@ gEfiTcgProtocolGuid gEfiFirmwareVolume2ProtocolGuid gEfiSeCOperationProtocolGuid + gCpuGlobalNvsAreaProtocolGuid =20 [Pcd] gEfiBxtTokenSpaceGuid.PcdScAcpiIoPortBaseAddress diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPo= stMemPei/PlatformInit.c b/Platform/BroxtonPlatformPkg/Common/PlatformSettin= gs/PlatformPostMemPei/PlatformInit.c index 7d84e26..bfed3bf 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPe= i/PlatformInit.c +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPe= i/PlatformInit.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include =20 @@ -30,13 +29,6 @@ #pragma optimize ("", off) #endif =20 -EFI_STATUS -EFIAPI -CpuS3SmmAccessNotifyCallback ( - IN EFI_PEI_SERVICES **PeiServices, - IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor, - IN VOID *Ppi - ); =20 static EFI_PEI_RESET_PPI mResetPpi =3D { IchReset }; =20 @@ -69,11 +61,6 @@ static EFI_PEI_PPI_DESCRIPTOR mPpiList[] =3D { =20 static EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList[] =3D { { - EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK, - &gPeiSmmAccessPpiGuid, - CpuS3SmmAccessNotifyCallback - }, - { (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMI= NATE_LIST), &gEfiEndOfPeiSignalPpiGuid, EndOfPeiPpiNotifyCallback @@ -545,23 +532,6 @@ PeiGetSectionFromFv ( } =20 =20 -EFI_STATUS -EFIAPI -CpuS3SmmAccessNotifyCallback ( - IN EFI_PEI_SERVICES **PeiServices, - IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor, - IN VOID *Ppi - ) -{ - // - // Restore Cpu settings only during S3 resume - // - S3InitializeCpu (PeiServices); - - return EFI_SUCCESS; -} - - /** Install Firmware Volume Hob's once there is main memory =20 diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPo= stMemPei/PlatformPostMemPei.inf b/Platform/BroxtonPlatformPkg/Common/Platfo= rmSettings/PlatformPostMemPei/PlatformPostMemPei.inf index 762eff2..2fb7fb6 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPe= i/PlatformPostMemPei.inf +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPe= i/PlatformPostMemPei.inf @@ -55,7 +55,6 @@ CpuPolicyLib TimerLib ScPlatformLib - CpuS3Lib SeCUmaLib =20 [Ppis] diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc b/Platf= orm/BroxtonPlatformPkg/PlatformDsc/Components.dsc index 6bb2a77..234c277 100644 --- a/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc @@ -43,6 +43,7 @@ MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf } =20 + UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCod= eRouterRuntimeDxe.inf =20 @@ -246,7 +247,6 @@ $(PLATFORM_PACKAGE_COMMON)/PlatformSettings/PlatformDxe/PlatformDxe.inf =20 $(PLATFORM_PACKAGE_COMMON)/SaveMemoryConfigDxe/SaveMemoryConfigDxe.inf - $(PLATFORM_PACKAGE_COMMON)/Features/S3/SmramSaveInfoHandlerSmm/SmramSave= InfoHandlerSmm.inf =20 !if $(GOP_DRIVER_ENABLE) =3D=3D TRUE $(PLATFORM_PACKAGE_COMMON)/Console/PlatformGopPolicyDxe/PlatformGopPolic= yDxe.inf diff --git a/Platform/BroxtonPlatformPkg/PlatformPkg.fdf b/Platform/Broxton= PlatformPkg/PlatformPkg.fdf index 4324f4f..eeb0985 100644 --- a/Platform/BroxtonPlatformPkg/PlatformPkg.fdf +++ b/Platform/BroxtonPlatformPkg/PlatformPkg.fdf @@ -494,11 +494,8 @@ APRIORI DXE { INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/Firmware= PerformanceSmm.inf !endif =20 -!if $(TOOL_CHAIN_TAG) =3D=3D GCC5 INF UefiCpuPkg/CpuDxe/CpuDxe.inf -!else - INF $(PLATFORM_SI_PACKAGE)/Cpu/CpuInit/Dxe/CpuInitDxe.inf -!endif + INF UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf =20 INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf =20 @@ -557,9 +554,6 @@ APRIORI DXE { INF $(PLATFORM_PACKAGE_COMMON)/PlatformSettings/PlatformInfoDxe/Platform= InfoDxe.inf #INF $(TABLET_PLATFORM_PACKAGE)/PlatformCpuInfo/PlatformCpuInfoDxe.inf INF $(PLATFORM_PACKAGE_COMMON)/SaveMemoryConfigDxe/SaveMemoryConfigDxe.i= nf -!if $(TOOL_CHAIN_TAG) !=3D GCC5 - INF $(PLATFORM_PACKAGE_COMMON)/Features/S3/SmramSaveInfoHandlerSmm/Smram= SaveInfoHandlerSmm.inf -!endif =20 !if $(GOP_DRIVER_ENABLE) =3D=3D TRUE INF $(PLATFORM_PACKAGE_COMMON)/Console/PlatformGopPolicyDxe/PlatformGopP= olicyDxe.inf diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SiPkgDxe.dsc b/Silicon/Broxton= SoC/BroxtonSiPkg/SiPkgDxe.dsc index b568bd9..4ae0803 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/SiPkgDxe.dsc +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SiPkgDxe.dsc @@ -1,7 +1,7 @@ ## @file # Component description file for the Broxton RC DXE drivers. # -# Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2004 - 2017, Intel Corporation. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License @@ -16,7 +16,6 @@ # # CPU # - $(PLATFORM_SI_PACKAGE)/Cpu/CpuInit/Dxe/CpuInitDxe.inf !if $(PPM_ENABLE) =3D=3D TRUE $(PLATFORM_SI_PACKAGE)/Cpu/PowerManagement/Dxe/PowerMgmtDxe.inf $(PLATFORM_SI_PACKAGE)/Cpu/PowerManagement/Smm/PowerMgmtSmm.inf --=20 2.8.1.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel