From nobody Mon Sep 16 19:08:14 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+113974+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113974+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=marvell.com ARC-Seal: i=1; a=rsa-sha256; t=1705540711; cv=none; d=zohomail.com; s=zohoarc; b=e3r2nSs9zog/r5dK6uXXq1vd/VD8Rx/Y2ozdV/7vhk7oJz+RyyQsBuiOfjL1jSYYj9Ucg3KjF/LfT9aYwyXu9I37TT5XT/FtJ49Fi2Q3W21UI59i/KW7ZsIoo0qDU5he1Fx8aLWghC177hLVN13s6iLwrGuo8oU362O6uL6oaNE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1705540711; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=jC36Rz8IkXRI5cibuJpLQ/yigC88Zap0D00sFBRlOrY=; b=eJ8pMuVq18Pcf0R0ot4B/kMk5ZNF1/oGn24gzIsf10FVqDTgXzzflV2yPUezDLLVP7h4EtynfkolHwZDe0DhMaW3NiwzKFknc6pY1mJG6QK5dyNiSkL+t3Ovg/xnAmvGIQPW0NZ29Xy2/8Tlv94PAbpznMBHh55PZXYwOo68KTg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113974+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1705540711534427.45549166765386; Wed, 17 Jan 2024 17:18:31 -0800 (PST) Return-Path: DKIM-Signature: a=rsa-sha256; bh=vYxtCQSgVQNu2ZTq8ZmPijTu0Cg9yKFlaawVFaP+ppw=; c=relaxed/simple; d=groups.io; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding:Content-Type; s=20140610; t=1705540711; v=1; b=i4s895sT1yM4qPmQCJF+nnJUTjysvYrdn7Mwh8a/1zkSNOOQrQ6NgQt19jd6L2zfVcCT/aWe sPI+Jy2qDcOr04PbMvhdlYGI2Fb3wUIoYxFTlvszvOcX/iUKuwy5ivZldmlEwZX9KgN3bl6nAFi VsIH3aTNc7tIhelkTmr8dddI= X-Received: by 127.0.0.2 with SMTP id zCZRYY1788612xrV8ViA30jX; Wed, 17 Jan 2024 17:18:31 -0800 X-Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.148.174]) by mx.groups.io with SMTP id smtpd.web10.928.1705540710162662732 for ; Wed, 17 Jan 2024 17:18:30 -0800 X-Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 40HHSY3e029567; Wed, 17 Jan 2024 17:18:30 -0800 X-Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3vpaskb4ru-3 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 17 Jan 2024 17:18:29 -0800 (PST) X-Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 17 Jan 2024 17:18:27 -0800 X-Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 17 Jan 2024 17:18:27 -0800 X-Received: from MRVL-5Lp9he46Ey.marvell.com (unknown [10.85.176.100]) by maili.marvell.com (Postfix) with ESMTP id A07713F7087; Wed, 17 Jan 2024 17:18:27 -0800 (PST) From: "Narinder Dhillon" To: CC: , , , Narinder Dhillon Subject: [edk2-devel] [edk2-platforms PATCH v3 3/7] Silicon/Marvell: Odyssey watchdog driver Date: Wed, 17 Jan 2024 17:18:13 -0800 Message-ID: <20240118011817.4348-4-ndhillon@marvell.com> In-Reply-To: <20240118011817.4348-1-ndhillon@marvell.com> References: <20240118011817.4348-1-ndhillon@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: Dsyt8c4qWrjUEI1C9xkEB_SgWKcOW5cg X-Proofpoint-GUID: Dsyt8c4qWrjUEI1C9xkEB_SgWKcOW5cg Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ndhillon@marvell.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: u4QeFwoGQMkQWnTIhP34Y7D1x1787277AA= Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1705540712770100015 Content-Type: text/plain; charset="utf-8" From: Narinder Dhillon This patch adds watchdog driver for Odyssey SoC. Signed-off-by: Narinder Dhillon --- .../Drivers/Wdt/GtiWatchdogDxe/GtiWatchdog.c | 408 ++++++++++++++++++ .../Wdt/GtiWatchdogDxe/GtiWatchdogDxe.inf | 45 ++ 2 files changed, 453 insertions(+) create mode 100644 Silicon/Marvell/Drivers/Wdt/GtiWatchdogDxe/GtiWatchdog.c create mode 100644 Silicon/Marvell/Drivers/Wdt/GtiWatchdogDxe/GtiWatchdogD= xe.inf diff --git a/Silicon/Marvell/Drivers/Wdt/GtiWatchdogDxe/GtiWatchdog.c b/Sil= icon/Marvell/Drivers/Wdt/GtiWatchdogDxe/GtiWatchdog.c new file mode 100644 index 0000000000..c8f2888423 --- /dev/null +++ b/Silicon/Marvell/Drivers/Wdt/GtiWatchdogDxe/GtiWatchdog.c @@ -0,0 +1,408 @@ +/** @file +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* https://spdx.org/licenses +* +* Copyright (C) 2022 Marvell +* +* Source file for Marvell Watchdog driver +* +**/ + + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include + +#define GTI_CWD_WDOG(Core) (FixedPcdGet64(PcdGtiWatchdogBase64) + 0x400= 00 + Core * 0x8) +#define GTI_CWD_POKE(Core) (FixedPcdGet64(PcdGtiWatchdogBase64) + 0x500= 00 + Core * 0x8) + +typedef union _GTI_CWD_WDOG_UNION { + UINT64 U64; + struct { + UINTN Mode : 2; + UINTN State : 2; + UINTN Len : 16; + UINTN Cnt : 24; + UINTN DStop : 1; + UINTN GStop : 1; + UINTN Rsvd : 18; + } PACKED S; +} GTI_CWD_WDOG_UNION; + +#define CWD_WDOG_MODE_RST (BIT1 | BIT0) + +#define RST_BOOT_PNR_MUL(Val) ((Val >> 33) & 0x1F) + +EFI_EVENT mGtiExitBootServicesEvent =3D (EFI_EVENT)NULL; +UINT32 mSclk =3D 0; +BOOLEAN mHardwarePlatform =3D TRUE; + +/** + Stop the GTI watchdog timer from counting down by disabling interrupts. +**/ +STATIC +VOID +GtiWdtStop ( + VOID + ) +{ + GTI_CWD_WDOG_UNION Wdog; + + MmioWrite64(GTI_CWD_POKE(0), 0); + + Wdog.U64 =3D MmioRead64(GTI_CWD_WDOG(0)); + + // Disable WDT + if (Wdog.S.Mode !=3D 0) { + Wdog.S.Len =3D 1; + Wdog.S.Mode =3D 0; + MmioWrite64 (GTI_CWD_WDOG(0), Wdog.U64); + } +} + +/** + Starts the GTI WDT countdown by enabling interrupts. + The count down will start from the value stored in the Load register, + not from the value where it was previously stopped. +**/ +STATIC +VOID +GtiWdtStart ( + VOID + ) +{ + GTI_CWD_WDOG_UNION Wdog; + + // Reset the WDT + MmioWrite64 (GTI_CWD_POKE(0), 0); + + Wdog.U64 =3D MmioRead64 (GTI_CWD_WDOG(0)); + + // Enable countdown + if (Wdog.S.Mode =3D=3D 0) { + Wdog.S.Mode =3D CWD_WDOG_MODE_RST; + MmioWrite64 (GTI_CWD_WDOG(0), Wdog.U64); + } +} + +/** + On exiting boot services we must make sure the SP805 Watchdog Timer + is stopped. +**/ +VOID +EFIAPI +GtiExitBootServices ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + MmioWrite64 (GTI_CWD_POKE(0), 0); + GtiWdtStop (); +} + +/** + This function registers the handler NotifyFunction so it is called every= time + the watchdog timer expires. It also passes the amount of time since the= last + handler call to the NotifyFunction. + If NotifyFunction is not NULL and a handler is not already registered, + then the new handler is registered and EFI_SUCCESS is returned. + If NotifyFunction is NULL, and a handler is already registered, + then that handler is unregistered. + If an attempt is made to register a handler when a handler is already re= gistered, + then EFI_ALREADY_STARTED is returned. + If an attempt is made to unregister a handler when a handler is not regi= stered, + then EFI_INVALID_PARAMETER is returned. + + @param This The EFI_TIMER_ARCH_PROTOCOL instance. + @param NotifyFunction The function to call when a timer interrupt fir= es. This + function executes at TPL_HIGH_LEVEL. The DXE Co= re will + register a handler for the timer interrupt, so = it can know + how much time has passed. This information is u= sed to + signal timer based events. NULL will unregister= the handler. + + @retval EFI_SUCCESS The watchdog timer handler was registered. + @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler = is already + registered. + @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was = not + previously registered. + @retval EFI_UNSUPPORTED HW does not support this functionality. + +**/ +EFI_STATUS +EFIAPI +GtiWdtRegisterHandler ( + IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, + IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction + ) +{ + // UNSUPPORTED - The hardware watchdog will reset the board + return EFI_UNSUPPORTED; +} + +/** + + This function adjusts the period of timer interrupts to the value specif= ied + by TimerPeriod. If the timer period is updated, then the selected timer + period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. = If + the timer hardware is not programmable, then EFI_UNSUPPORTED is returned. + If an error occurs while attempting to update the timer period, then the + timer hardware will be put back in its state prior to this call, and + EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer inter= rupt + is disabled. This is not the same as disabling the CPU's interrupts. + Instead, it must either turn off the timer hardware, or it must adjust t= he + interrupt controller so that a CPU interrupt is not generated when the t= imer + interrupt fires. + + @param This The EFI_TIMER_ARCH_PROTOCOL instance. + @param TimerPeriod The rate to program the timer interrupt in 100 = nS units. If + the timer hardware is not programmable, then EF= I_UNSUPPORTED is + returned. If the timer is programmable, then th= e timer period + will be rounded up to the nearest timer period = that is supported + by the timer hardware. If TimerPeriod is set to= 0, then the + timer interrupts will be disabled. + + + @retval EFI_SUCCESS The timer period was changed. + @retval EFI_UNSUPPORTED The platform cannot change the period of t= he timer interrupt. + @retval EFI_DEVICE_ERROR The timer period could not be changed due = to a device error. + +**/ +EFI_STATUS +EFIAPI +GtiWdtSetTimerPeriod ( + IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, + IN UINT64 TimerPeriod // In 100ns un= its + ) +{ + UINT32 Clock; + UINT64 CountDown; + GTI_CWD_WDOG_UNION Wdog; + + if (TimerPeriod =3D=3D 0) { + + // This is a watchdog stop request + GtiWdtStop(); + + return EFI_SUCCESS; + } else { + // + // The system is reset only after the WDT expires for the 3rd time + // + + Clock =3D mSclk / 1000000; //MHz + CountDown =3D DivU64x32 (MultU64x32 (TimerPeriod, Clock), 30); + + // WDT counts in 1024 cycle steps + // Only upper 16 bits can be used + + Wdog.U64 =3D 0; + Wdog.S.Len =3D (CountDown + (0xFF << 10)) >> 18; + MmioWrite64 (GTI_CWD_WDOG(0), Wdog.U64); + + // Start the watchdog + if (mHardwarePlatform =3D=3D TRUE) { + GtiWdtStart(); + } + } + + return EFI_SUCCESS; +} + +/** + This function retrieves the period of timer interrupts in 100 ns units, + returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPer= iod + is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 = is + returned, then the timer is currently disabled. + + @param This The EFI_TIMER_ARCH_PROTOCOL instance. + @param TimerPeriod A pointer to the timer period to retrieve in 10= 0 ns units. If + 0 is returned, then the timer is currently disa= bled. + + + @retval EFI_SUCCESS The timer period was returned in TimerPeri= od. + @retval EFI_INVALID_PARAMETER TimerPeriod is NULL. + +**/ +EFI_STATUS +EFIAPI +GtiWdtGetTimerPeriod ( + IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, + OUT UINT64 *TimerPeriod + ) +{ + UINT32 Clock; + UINT64 CountDown; + UINT64 ReturnValue; + GTI_CWD_WDOG_UNION Wdog; + + if (TimerPeriod =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + Wdog.U64 =3D MmioRead64 (GTI_CWD_WDOG(0)); + + // Check if the watchdog is stopped + if (Wdog.S.Mode =3D=3D 0) { + // It is stopped, so return zero. + ReturnValue =3D 0; + } else { + // Convert the Watchdog ticks into TimerPeriod + Clock =3D mSclk / 1000000; //MHz + CountDown =3D Wdog.S.Len << 18; + + ReturnValue =3D MultU64x32(DivU64x32(3 * CountDown, Clock), 10); // us= ecs * 10 + } + + *TimerPeriod =3D ReturnValue; + + return EFI_SUCCESS; +} + +/** + Interface structure for the Watchdog Architectural Protocol. + + @par Protocol Description: + This protocol provides a service to set the amount of time to wait + before firing the watchdog timer, and it also provides a service to + register a handler that is invoked when the watchdog timer fires. + + @par When the watchdog timer fires, control will be passed to a handler + if one has been registered. If no handler has been registered, + or the registered handler returns, then the system will be + reset by calling the Runtime Service ResetSystem(). + + @param RegisterHandler + Registers a handler that will be called each time the + watchdogtimer interrupt fires. TimerPeriod defines the minimum + time between timer interrupts, so TimerPeriod will also + be the minimum time between calls to the registered + handler. + NOTE: If the watchdog resets the system in hardware, then + this function will not have any chance of executing. + + @param SetTimerPeriod + Sets the period of the timer interrupt in 100 nS units. + This function is optional, and may return EFI_UNSUPPORTED. + If this function is supported, then the timer period will + be rounded up to the nearest supported timer period. + + @param GetTimerPeriod + Retrieves the period of the timer interrupt in 100 nS units. + +**/ +EFI_WATCHDOG_TIMER_ARCH_PROTOCOL gWatchdogTimer =3D { + (EFI_WATCHDOG_TIMER_REGISTER_HANDLER) GtiWdtRegisterHandler, + (EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD) GtiWdtSetTimerPeriod, + (EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD) GtiWdtGetTimerPeriod +}; + +/** + Initialize the state information for the Watchdog Timer Architectural Pr= otocol. + + @param ImageHandle of the loaded driver + @param SystemTable Pointer to the System Table + + @retval EFI_SUCCESS Protocol registered + @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure + @retval EFI_DEVICE_ERROR Hardware problems + +**/ +EFI_STATUS +EFIAPI +GtiWdtInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_HANDLE Handle =3D NULL; + FDT_HANDLE SclkHandle =3D 0; + FDT_HANDLE RootHandle =3D 0; + CONST UINT32 *SclkFreq =3D NULL; + MRVL_FDT_CLIENT_PROTOCOL *FdtClient =3D NULL; + CONST CHAR8 *Platform; + + DEBUG ((DEBUG_INFO, "GtiWdtInitialize: Start\n")); + // Stop the watchdog from triggering unexpectedly + GtiWdtStop (); + + // + // Make sure the Watchdog Timer Architectural Protocol has not been inst= alled in the system yet. + // This will avoid conflicts with the universal watchdog + // + ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolG= uid); + + Status =3D gBS->LocateProtocol (&gMrvlFdtClientProtocolGuid, + NULL, + (VOID **)&FdtClient); + + if (EFI_ERROR (Status) || (FdtClient =3D=3D NULL)) { + DEBUG ((DEBUG_ERROR, "%a: ERROR: cannot locate: gMrvlFdtClientProtocol= Guid\n", __func__)); + return EFI_ABORTED; + } + + Status =3D FdtClient->GetNode (FdtClient, "/soc@0/sclk", &SclkHandle); + if (EFI_ERROR (Status) || !SclkHandle) { + DEBUG ((DEBUG_ERROR, "%a: %s node not found!\n", __func__, L"/soc@0/sc= lk")); + return EFI_NOT_FOUND; + } + + DEBUG ((DEBUG_INFO, "%a: Found: %s\n", __func__, L"/soc@0/sclk")); + Status =3D FdtClient->GetNodeProperty (FdtClient, + SclkHandle, + "clock-frequency", + (CONST VOID **)&SclkFreq, + NULL); + if (EFI_ERROR (Status) || NULL =3D=3D SclkFreq) { + DEBUG ((DEBUG_ERROR, "%a: %s property not found!\n", __func__, L"\"clo= ck-frequency\"")); + return EFI_NO_MAPPING; + } + + mSclk =3D FdtToCpu32(*SclkFreq); + DEBUG ((DEBUG_INFO, "%a: DT sclk =3D %d Mhz (0x%x)\n", __func__, mSclk/1= 000000, mSclk)); + + Status =3D FdtClient->GetNode (FdtClient, "/soc@0", &RootHandle); + if (!EFI_ERROR (Status) && RootHandle) { + Status =3D FdtClient->GetNodeProperty (FdtClient, + RootHandle, + "runplatform", + (CONST VOID **)&Platform, + NULL); + if (!EFI_ERROR (Status)) { + if (AsciiStrCmp (Platform, "HW_PLATFORM")) { + mHardwarePlatform =3D FALSE; + DEBUG ((DEBUG_INFO, "%a: Not a hardware platform\n", __func__)); + } + } + } + + // Register for an ExitBootServicesEvent + Status =3D gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, + TPL_NOTIFY, + GtiExitBootServices, + NULL, + &mGtiExitBootServicesEvent); + ASSERT_EFI_ERROR(Status); + + // Install the Timer Architectural Protocol onto a new handle + Handle =3D NULL; + Status =3D gBS->InstallMultipleProtocolInterfaces( + &Handle, + &gEfiWatchdogTimerArchProtocolGuid, &gWatchdogTimer, + NULL + ); + ASSERT_EFI_ERROR (Status); + + DEBUG ((DEBUG_INFO, "GtiWdtInitialize: Exit\n")); + + return EFI_SUCCESS; +} diff --git a/Silicon/Marvell/Drivers/Wdt/GtiWatchdogDxe/GtiWatchdogDxe.inf = b/Silicon/Marvell/Drivers/Wdt/GtiWatchdogDxe/GtiWatchdogDxe.inf new file mode 100644 index 0000000000..e3470f831c --- /dev/null +++ b/Silicon/Marvell/Drivers/Wdt/GtiWatchdogDxe/GtiWatchdogDxe.inf @@ -0,0 +1,45 @@ +#/** @file +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# https://spdx.org/licenses +# +# Copyright (C) 2022 Marvell +# +# Module definition file for Marvell Watchdog driver. +# +#**/ + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D GtiWatchdogDxe + FILE_GUID =3D 789F5711-6FD3-4170-BE11-EE4000037EA8 + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + + ENTRY_POINT =3D GtiWdtInitialize + +[Sources.common] + GtiWatchdog.c + +[Packages] + Silicon/Marvell/MarvellSiliconPkg/MarvellSiliconPkg.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + BaseLib + DebugLib + IoLib + PcdLib + UefiLib + UefiBootServicesTableLib + UefiDriverEntryPoint + +[FixedPcd] + gMarvellSiliconTokenSpaceGuid.PcdGtiWatchdogBase64 + +[Protocols] + gEfiWatchdogTimerArchProtocolGuid #PRODUCES + gMrvlFdtClientProtocolGuid #CONSUMED + +[Depex] + gMrvlFdtClientProtocolGuid --=20 2.34.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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