From nobody Mon May 13 11:55:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+113874+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113874+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1705391329; cv=none; d=zohomail.com; s=zohoarc; b=L2HAcOxN+HwAWwAJD9wFdp7qO2+dDCa9zENYUlO5fRNQnhzSYxgkibznBU+iZT/r9C82BLNQKfp2j/bqxX7Yph2tAdiDaLA87Gf/iirZcdeZ1X06D7mkLcW7fBXvolVyikPrUaQsiDLW4uSD3RdIKyfVRCtqIAMOsDqxvFSCjro= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1705391329; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=2x5CIZ45feuYjJMS5/EZT4mKffP1Vkx5NbKThNAOm/I=; b=TwhFopMUUM4t9gBaMWqXN1ZCZC4H5E/eEtBinvbywEZkT3pLvqTHGUZSgMH8rUec73XW547XfHh3uVX+N3AGHBEGOeNNE3QGm5GC3b1+bZFd3tThCSFKWDNqvgOSVGyqRGcozRujlu1o9oKjxRYxNXSR4Kt62YxndyPLAv/tElo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113874+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1705391329220613.292351271811; Mon, 15 Jan 2024 23:48:49 -0800 (PST) Return-Path: DKIM-Signature: a=rsa-sha256; bh=wAq10zqppGbO0KrDydLramV+sjKEiZls/M8zR6QQBBI=; c=relaxed/simple; d=groups.io; h=From:Date:Subject:MIME-Version:Message-Id:References:In-Reply-To:To:Cc:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Transfer-Encoding; s=20140610; t=1705391328; v=1; b=jG3BUzJFDtsA4faLw1/8w1MbeFFkLoBnQiL1x4YqKbKCZSF5ubkIsud5vPW12Wj5lr7hUYVw IyOgiYhsoaGMU4+XszJvODrJHASLfde/7zYbdUS6opRgvTYUGBKVlkYDpxs96yAoeFgeGQ5QacU QXBb73aDBgAv8Fx9Sx0JgxSU= X-Received: by 127.0.0.2 with SMTP id KZ2lYY1788612xyw7PjZVeUv; Mon, 15 Jan 2024 23:48:48 -0800 X-Received: from muminek.juszkiewicz.com.pl (muminek.juszkiewicz.com.pl [213.251.184.221]) by mx.groups.io with SMTP id smtpd.web11.7760.1705391327690146774 for ; Mon, 15 Jan 2024 23:48:48 -0800 X-Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id 4B4BA2602C9; Tue, 16 Jan 2024 08:48:45 +0100 (CET) X-Virus-Scanned: Debian amavis at juszkiewicz.com.pl X-Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavis, port 10024) with ESMTP id zv57Qo2SJgyw; Tue, 16 Jan 2024 08:48:43 +0100 (CET) X-Received: from [192.168.210.114] (83.11.14.94.ipv4.supernova.orange.pl [83.11.14.94]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id BCC84260720; Tue, 16 Jan 2024 08:48:42 +0100 (CET) From: "Marcin Juszkiewicz" Date: Tue, 16 Jan 2024 08:48:32 +0100 Subject: [edk2-devel] [PATCH edk2-platforms v2 1/4] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib MIME-Version: 1.0 Message-Id: <20240116-no-dt-for-cpu-v2-1-6cf078d9ab76@linaro.org> References: <20240116-no-dt-for-cpu-v2-0-6cf078d9ab76@linaro.org> In-Reply-To: <20240116-no-dt-for-cpu-v2-0-6cf078d9ab76@linaro.org> To: devel@edk2.groups.io Cc: Leif Lindholm , Ard Biesheuvel , Graeme Gregory , Marcin Juszkiewicz Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,marcin.juszkiewicz@linaro.org List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: zwoFDE1VBfNjRQD3M8Xq89Xwx1787277AA= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1705391330686100003 This library provides functions to check for hardware information. For now it covers CPU ones: - amount of cpu cores - MPIDR value for cpu core - NUMA node id for cpu core Values are read from TF-A using platform specific SMC calls. Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 3 +- .../SbsaQemuHardwareInfoLib.inf | 32 +++++++ .../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 2 + .../Include/Library/SbsaQemuHardwareInfoLib.h | 45 +++++++++ .../SbsaQemuHardwareInfoLib.c | 100 ++++++++++++++++= ++++ 5 files changed, 181 insertions(+), 1 deletion(-) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/S= bsaQemu.dsc index 378600050df9..07cb3490f4cf 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -1,6 +1,6 @@ # # Copyright (c) 2021, NUVIA Inc. All rights reserved. -# Copyright (c) 2019, Linaro Limited. All rights reserved. +# Copyright (c) 2019-2024, Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -128,6 +128,7 @@ [LibraryClasses.common] =20 FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf + SbsaQemuHardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareIn= foLib/SbsaQemuHardwareInfoLib.inf =20 # Debug Support PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCof= fExtraActionLib.inf diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemu= HardwareInfoLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib= /SbsaQemuHardwareInfoLib.inf new file mode 100644 index 000000000000..8c2def1878e6 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwar= eInfoLib.inf @@ -0,0 +1,32 @@ +#/* @file +# +# Copyright (c) Linaro Ltd. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#*/ + +[Defines] + INF_VERSION =3D 0x0001001c + BASE_NAME =3D SbsaQemuHardwareInfoLib + FILE_GUID =3D 6454006f-6502-46e2-9be4-4bba8d4b29fb + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D ArmPlatformLib + +[Sources] + SbsaQemuHardwareInfoLib.c + +[Packages] + ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + Silicon/Qemu/SbsaQemu/SbsaQemu.dec + +[LibraryClasses] + ArmSmcLib + BaseMemoryLib + DebugLib + + [Pcd] + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h b= /Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h index 7934875e4aba..e33648ee1462 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h @@ -14,5 +14,7 @@ #define SIP_SVC_VERSION SMC_SIP_FUNCTION_ID(1) #define SIP_SVC_GET_GIC SMC_SIP_FUNCTION_ID(100) #define SIP_SVC_GET_GIC_ITS SMC_SIP_FUNCTION_ID(101) +#define SIP_SVC_GET_CPU_COUNT SMC_SIP_FUNCTION_ID(200) +#define SIP_SVC_GET_CPU_NODE SMC_SIP_FUNCTION_ID(201) =20 #endif /* SBSA_QEMU_SMC_H_ */ diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.= h b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h new file mode 100644 index 000000000000..45262baf3511 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h @@ -0,0 +1,45 @@ +/** @file +* +* Copyright (c) Linaro Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#ifndef SBSA_QEMU_HARDWARE_INFO_ +#define SBSA_QEMU_HARDWARE_INFO_ + +/** + Get CPU count from information passed by Qemu. + +**/ +VOID +SbsaQemuGetCpuCount ( + VOID + ); + +/** + Get MPIDR for a given cpu from device tree passed by Qemu. + + @param [in] CpuId Index of cpu to retrieve MPIDR value for. + + @retval MPIDR value of CPU at index +**/ +UINT64 +SbsaQemuGetMpidr ( + IN UINTN CpuId + ); + +/** + Get NUMA node id for a given cpu from device tree passed by Qemu. + + @param [in] CpuId Index of cpu to retrieve NUMA node id for. + + @retval NUMA node id for CPU at index +**/ +UINT64 +SbsaQemuGetCpuNumaNode ( + IN UINTN CpuId + ); + +#endif /* SBSA_QEMU_HARDWARE_INFO_ */ diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemu= HardwareInfoLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/S= bsaQemuHardwareInfoLib.c new file mode 100644 index 000000000000..4df973fda75e --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwar= eInfoLib.c @@ -0,0 +1,100 @@ +/** @file +* +* Copyright (c) 2021, NUVIA Inc. All rights reserved. +* Copyright (c) Linaro Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include +#include +#include +#include +#include + +/** + Get CPU count from information passed by Qemu. + +**/ +VOID +SbsaQemuGetCpuCount ( + VOID + ) +{ + UINTN Arg0; + UINTN SmcResult; + RETURN_STATUS Result; + + SmcResult =3D ArmCallSmc0 (SIP_SVC_GET_CPU_COUNT, &Arg0, NULL, NULL); + if (SmcResult !=3D SMC_ARCH_CALL_SUCCESS) { + DEBUG ((DEBUG_INFO, "Too old TF-A. We have to get cpu info from DT.\n"= )); + Arg0 =3D FdtHelperCountCpus(); + } + + Result =3D PcdSet32S (PcdCoreCount, Arg0); + ASSERT_RETURN_ERROR (Result); + + Arg0 =3D PcdGet32 (PcdCoreCount); + + DEBUG ((DEBUG_INFO, "We have %d cpus.\n", Arg0)); +} + +/** + Get MPIDR for a given cpu from device tree passed by Qemu. + + @param [in] CpuId Index of cpu to retrieve MPIDR value for. + + @retval MPIDR value of CPU at index +**/ +UINT64 +SbsaQemuGetMpidr ( + IN UINTN CpuId + ) +{ + UINTN SmcResult; + UINTN Arg0; + UINTN Arg1; + + Arg0 =3D CpuId; + + SmcResult =3D ArmCallSmc0 (SIP_SVC_GET_CPU_NODE, &Arg0, &Arg1, NULL); + if (SmcResult !=3D SMC_ARCH_CALL_SUCCESS) { + DEBUG ((DEBUG_INFO, "Too old TF-A. We have to get cpu info from DT.\n"= )); + Arg1 =3D FdtHelperGetMpidr(CpuId); +} + + DEBUG ((DEBUG_ERROR, "MPIDR for CPU:%d =3D %d\n", CpuId, Arg1)); + + return Arg1; +} + +/** + Get NUMA node id for a given cpu from device tree passed by Qemu. + + @param [in] CpuId Index of cpu to retrieve NUMA node id for. + + @retval NUMA node id for CPU at index +**/ +UINT64 +SbsaQemuGetCpuNumaNode ( + IN UINTN CpuId + ) +{ + UINTN SmcResult; + UINTN Arg0; + UINTN Arg1; + + Arg0 =3D CpuId; + + SmcResult =3D ArmCallSmc0 (SIP_SVC_GET_CPU_NODE, &Arg0, &Arg1, NULL); + if (SmcResult !=3D SMC_ARCH_CALL_SUCCESS) { + /* No fallback to DeviceTree as we did not had that info earlier. */ + DEBUG ((DEBUG_ERROR, "Couldn't find information for CPU:%d\n", CpuId)); + return 0; + } + + DEBUG ((DEBUG_ERROR, "NUMA node for CPU:%d =3D %d\n", CpuId, Arg0)); + + return Arg0; +} --=20 2.43.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113874): https://edk2.groups.io/g/devel/message/113874 Mute This Topic: https://groups.io/mt/103758014/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon May 13 11:55:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+113875+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113875+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1705391329; cv=none; d=zohomail.com; s=zohoarc; b=UtiebgE++zsc/EicV3V5GsAcYdjp3vJ9LVv2JeSGJVX3dqFl0Bb1QyjtKFrOXTCLXBJtMGkKZZhT2ye07mV2nnfiRw/t+k7TrVya4/9MbNZP0sqdYWJJdwyfQKMVJ6CWFZ04CZeL1PkcZHbvtUrqmhNiL7tkBdIayOh1jrGiV+o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1705391329; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=OcNP9y4Be5+tN+jMlETpLnoVrcuzD4GnKVGyds2xdsA=; b=l8gwBtqgizcZPzl0n2Izz2YkqXKg8CpjBbW9T3h8PgmvZq5gPZBZQW9qOVbC2qO4ge6KYmyZRXA3rvk0HRiWbKWbUUTaigGZPBIl5cJmEIu3XPJfvNGuRxLPnPs3sL/QcmMtYMGTKgcJ0Iu5lXuKwxCOPgtO8P4Z9W114vRzeHk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113875+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 17053913298641004.8613707935874; Mon, 15 Jan 2024 23:48:49 -0800 (PST) Return-Path: DKIM-Signature: a=rsa-sha256; bh=A3BD/AlNFOH6U2z/yStdU17zpfrGhsJjEbUWpBJNKDo=; c=relaxed/simple; d=groups.io; h=From:Date:Subject:MIME-Version:Message-Id:References:In-Reply-To:To:Cc:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Transfer-Encoding; s=20140610; t=1705391329; v=1; b=wMHFCeuLmlLz04PcGLBC5jdy2EtLZCLCiIDyl1fpMhfBc/5yR/RatGythR3SkyQCyLYIbSnc o3b2nOtzxJFxSqB2yTYsqtZPr3BXM4hCmh23mZEaJh4QLJA5EXYULKb3xspv72bhayiTLuNpnop ZvGhir3Vf0SNV/s04abGFdSc= X-Received: by 127.0.0.2 with SMTP id qPVUYY1788612xRti6GbVdN3; Mon, 15 Jan 2024 23:48:49 -0800 X-Received: from muminek.juszkiewicz.com.pl (muminek.juszkiewicz.com.pl [213.251.184.221]) by mx.groups.io with SMTP id smtpd.web11.7763.1705391328534847011 for ; Mon, 15 Jan 2024 23:48:48 -0800 X-Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id B90B8260720; Tue, 16 Jan 2024 08:48:46 +0100 (CET) X-Virus-Scanned: Debian amavis at juszkiewicz.com.pl X-Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavis, port 10024) with ESMTP id mT_4g7B8fi-z; Tue, 16 Jan 2024 08:48:44 +0100 (CET) X-Received: from [192.168.210.114] (83.11.14.94.ipv4.supernova.orange.pl [83.11.14.94]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id 85B4E260898; Tue, 16 Jan 2024 08:48:43 +0100 (CET) From: "Marcin Juszkiewicz" Date: Tue, 16 Jan 2024 08:48:33 +0100 Subject: [edk2-devel] [PATCH edk2-platforms v2 2/4] Platform/SbsaQemu: read amount of cpus during init MIME-Version: 1.0 Message-Id: <20240116-no-dt-for-cpu-v2-2-6cf078d9ab76@linaro.org> References: <20240116-no-dt-for-cpu-v2-0-6cf078d9ab76@linaro.org> In-Reply-To: <20240116-no-dt-for-cpu-v2-0-6cf078d9ab76@linaro.org> To: devel@edk2.groups.io Cc: Leif Lindholm , Ard Biesheuvel , Graeme Gregory , Marcin Juszkiewicz Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,marcin.juszkiewicz@linaro.org List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: OD0q1bMmwYJ56PMc2FE4yjlBx1787277AA= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1705391330677100001 We read it once and store in Pcd for future use. Signed-off-by: Marcin Juszkiewicz --- .../SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf | 4 +++- .../SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 9 +++++= ---- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlat= formDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPla= tformDxe.inf index 19534b7a274a..9752694a432b 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe= .inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe= .inf @@ -1,7 +1,7 @@ ## @file # This driver effectuates SbsaQemu platform configuration settings # -# Copyright (c) 2019, Linaro Ltd. All rights reserved. +# Copyright (c) Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -32,6 +32,7 @@ [LibraryClasses] PcdLib DebugLib NonDiscoverableDeviceRegistrationLib + SbsaQemuHardwareInfoLib UefiDriverEntryPoint =20 [Pcd] @@ -46,6 +47,7 @@ [Pcd] gArmTokenSpaceGuid.PcdGicDistributorBase gArmTokenSpaceGuid.PcdGicRedistributorsBase gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount =20 =20 [Depex] diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlat= formDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatf= ormDxe.c index 4ebbe7c93a19..edd72e37f7f1 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe= .c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe= .c @@ -1,7 +1,7 @@ /** @file -* FDT client protocol driver for qemu,mach-virt-ahci DT node +* SbsaQemu Platform Initialization * -* Copyright (c) 2019, Linaro Ltd. All rights reserved. +* Copyright (c) Linaro Ltd. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -12,13 +12,12 @@ #include #include #include +#include #include #include #include #include =20 -#include - EFI_STATUS EFIAPI InitializeSbsaQemuPlatformDxe ( @@ -123,5 +122,7 @@ InitializeSbsaQemuPlatformDxe ( } } =20 + SbsaQemuGetCpuCount(); + return EFI_SUCCESS; } --=20 2.43.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113875): https://edk2.groups.io/g/devel/message/113875 Mute This Topic: https://groups.io/mt/103758015/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon May 13 11:55:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+113876+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113876+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1705391330; cv=none; d=zohomail.com; s=zohoarc; b=P0YY4cSiKkwCaB1InTLc5UK2SKLmvjN/92oqj8ufLCAHxYBEjt3xYYUAEmfX2p7WS4+uL5ePmob6G6PrLIHjZyGJ4tZwZmkAHiDksrSJBtmao3kNlSQ9qMmIbNFwQALr5/WmU3XXyp55tQVy52BN/uX32LIEPuYkpQWKokNK1pY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1705391330; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=uxOtjH6dYgrfX99L/A1qsHAR200mTxZz3MJVH4D0pz0=; b=H/nuEnj9nRJVqvYibUtIgLDTDCE0HiZPzavhvkSL00/gTyjIB1XbfeJMn4p8nqXzFCL/sT4Bxm4Had05kqbxUlrDLoHPcMTPfL1mExdQPUWdPTuDc8be/iM6tLuAJwHlQvxRdAHnN1+wOUW6RrmjxocKK4LSZQYFMTo2yi0iDaM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113876+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1705391330255387.0609509202826; Mon, 15 Jan 2024 23:48:50 -0800 (PST) Return-Path: DKIM-Signature: a=rsa-sha256; bh=ZWRsA7gloOVgR6iHYhkQMsWbfeOUP9c6Bt2qM2ZEP28=; c=relaxed/simple; d=groups.io; h=From:Date:Subject:MIME-Version:Message-Id:References:In-Reply-To:To:Cc:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Transfer-Encoding; s=20140610; t=1705391329; v=1; b=RmoejHzPWY9rGbmOKSStqp6CFOfaQ3MpAETFKlH3cJ9gC3uiLLiogHQ4TLgwq/R1qarSdmHd SYVjjytfofoJkNwdeynxQaO5YdfHbYF94Mq8qM+Fe8tlQvWdyPQImCyNmQTniY1mJBVaC/TlOOt CWHWw8vHES83AhmC7QXZLytg= X-Received: by 127.0.0.2 with SMTP id NgSTYY1788612xBq2bxSBCxZ; Mon, 15 Jan 2024 23:48:49 -0800 X-Received: from muminek.juszkiewicz.com.pl (muminek.juszkiewicz.com.pl [213.251.184.221]) by mx.groups.io with SMTP id smtpd.web10.7821.1705391329196742892 for ; Mon, 15 Jan 2024 23:48:49 -0800 X-Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id 1C2E3260898; Tue, 16 Jan 2024 08:48:47 +0100 (CET) X-Virus-Scanned: Debian amavis at juszkiewicz.com.pl X-Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavis, port 10024) with ESMTP id JGEfmDcV4_Rn; Tue, 16 Jan 2024 08:48:45 +0100 (CET) X-Received: from [192.168.210.114] (83.11.14.94.ipv4.supernova.orange.pl [83.11.14.94]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id 29398260A73; Tue, 16 Jan 2024 08:48:43 +0100 (CET) From: "Marcin Juszkiewicz" Date: Tue, 16 Jan 2024 08:48:34 +0100 Subject: [edk2-devel] [PATCH edk2-platforms v2 3/4] Platform/SbsaQemu: use PcdCoreCount directly MIME-Version: 1.0 Message-Id: <20240116-no-dt-for-cpu-v2-3-6cf078d9ab76@linaro.org> References: <20240116-no-dt-for-cpu-v2-0-6cf078d9ab76@linaro.org> In-Reply-To: <20240116-no-dt-for-cpu-v2-0-6cf078d9ab76@linaro.org> To: devel@edk2.groups.io Cc: Leif Lindholm , Ard Biesheuvel , Graeme Gregory , Marcin Juszkiewicz Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,marcin.juszkiewicz@linaro.org List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: fp3HtmasgfO5jsRh1x6NIjoLx1787277AA= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1705391330710100007 During platform initialization we read amount of cpu cores and set PcdCoreCount so there is no need to call FdtHandler. Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf | 6 ++---- Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 10 ++++----= -- .../Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 12 +++-----= ---- 3 files changed, 9 insertions(+), 19 deletions(-) diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf b/Platform/Qe= mu/SbsaQemu/OemMiscLib/OemMiscLib.inf index a34f54d431d4..8e2bf8c512f1 100644 --- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf +++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf @@ -3,7 +3,7 @@ # # Copyright (c) 2021, NUVIA Inc. All rights reserved. # Copyright (c) 2018, Hisilicon Limited. All rights reserved. -# Copyright (c) 2018, Linaro Limited. All rights reserved. +# Copyright (c) 2023, Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -29,8 +29,6 @@ [Packages] =20 [LibraryClasses] BaseMemoryLib - FdtLib - FdtHelperLib IoLib PcdLib =20 @@ -40,7 +38,6 @@ [Guids] [Pcd] gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease gArmTokenSpaceGuid.PcdSystemBiosRelease - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress =20 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber @@ -56,3 +53,4 @@ [Pcd] gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisManufacturer gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisAssetTag gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSKU + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c b/Platform/Qemu= /SbsaQemu/OemMiscLib/OemMiscLib.c index c38f2851904f..ab97768b5ddc 100644 --- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c +++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c @@ -2,7 +2,7 @@ * OemMiscLib.c * * Copyright (c) 2021, NUVIA Inc. All rights reserved. -* Copyright (c) 2020, Linaro Ltd. All rights reserved. +* Copyright (c) Linaro Ltd. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -12,14 +12,12 @@ #include #include #include -#include #include #include #include #include #include #include -#include =20 /** Returns whether the specified processor is present or not. =20 @@ -33,7 +31,7 @@ OemIsProcessorPresent ( UINTN ProcessorIndex ) { - if (ProcessorIndex < FdtHelperCountCpus ()) { + if (ProcessorIndex < PcdGet32 (PcdCoreCount)) { return TRUE; } =20 @@ -76,7 +74,7 @@ OemGetProcessorInformation ( { UINT16 ProcessorCount; =20 - ProcessorCount =3D FdtHelperCountCpus (); + ProcessorCount =3D PcdGet32 (PcdCoreCount); =20 if (ProcessorIndex < ProcessorCount) { ProcessorStatus->Bits.CpuStatus =3D 1; // CPU enabled @@ -121,7 +119,7 @@ OemGetMaxProcessors ( VOID ) { - return FdtHelperCountCpus (); + return PcdGet32 (PcdCoreCount); } =20 /** Gets information about the cache at the specified cache level. diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index 9fb17151d7b8..7ef314ae9f67 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -1,7 +1,7 @@ /** @file * This file is an ACPI driver for the Qemu SBSA platform. * -* Copyright (c) 2020, Linaro Ltd. All rights reserved. +* Copyright (c) Linaro Ltd. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -255,7 +255,7 @@ AddMadtTable ( // Initialize GIC Redistributor Structure EFI_ACPI_6_0_GICR_STRUCTURE Gicr =3D SBSAQEMU_MADT_GICR_INIT(); =20 - // Get CoreCount which was determined eariler after parsing device tree + // Get CoreCount which was determined earlier from TF-A NumCores =3D PcdGet32 (PcdCoreCount); =20 // Calculate the new table size based on the number of cores @@ -291,7 +291,7 @@ AddMadtTable ( New +=3D sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER); =20 // Add new GICC structures for the Cores - for (CoreIndex =3D 0; CoreIndex < PcdGet32 (PcdCoreCount); CoreIndex++) { + for (CoreIndex =3D 0; CoreIndex < NumCores; CoreIndex++) { EFI_ACPI_6_0_GIC_STRUCTURE *GiccPtr; =20 CopyMem (New, &Gicc, sizeof (EFI_ACPI_6_0_GIC_STRUCTURE)); @@ -758,12 +758,6 @@ InitializeSbsaQemuAcpiDxe ( { EFI_STATUS Status; EFI_ACPI_TABLE_PROTOCOL *AcpiTable; - UINT32 NumCores; - - // Parse the device tree and get the number of CPUs - NumCores =3D FdtHelperCountCpus (); - Status =3D PcdSet32S (PcdCoreCount, NumCores); - ASSERT_RETURN_ERROR (Status); =20 // Check if ACPI Table Protocol has been installed Status =3D gBS->LocateProtocol ( --=20 2.43.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113876): https://edk2.groups.io/g/devel/message/113876 Mute This Topic: https://groups.io/mt/103758016/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon May 13 11:55:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+113877+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113877+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1705391331; cv=none; d=zohomail.com; s=zohoarc; b=mOemVTDIM+aRw1H5tEeswflOwkHPbKo413IvGwGfcGKh/Ng0JEDG9l+1R22k1bceidSJqjsPXL7ykKxQ36T8Ndb/dJxiTrFcXdIpiyvjedqlmr9+Pvs7CwbCWrVBu4CPdZMadPNrdZ2gz1/1U6SY6uYusJvH4p+DEcW/ibcPMmo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1705391331; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=Il1GGZq/wbZKJfoTiezjR55yg9qBXH02C/4NzGl/n5I=; b=Mn89AcBlkLlvsIWqyA7frfW2RgaRxqnYC7esFllC34h0cTd2tZn/YZtRllxzErL6aE5jecNaCdPyitMag1eqJ9MXqqZNPv3DQqM+I+TOTamTA/ik5D1KJCc6x9ZgQ58JfMSmp33CW485uULZbzspBffjvrLAcqaGH/3X+vOzBM0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113877+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1705391331694832.9114384155635; Mon, 15 Jan 2024 23:48:51 -0800 (PST) Return-Path: DKIM-Signature: a=rsa-sha256; bh=quhS6Bo0C9ObGKEV3MPNGnaV1LiW4cW2TzOSIgYW/i8=; c=relaxed/simple; d=groups.io; h=From:Date:Subject:MIME-Version:Message-Id:References:In-Reply-To:To:Cc:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Transfer-Encoding; s=20140610; t=1705391331; v=1; b=heN/+iFDEX4EPmmQ4Zyx4NTyhog5uvwz3owu+zsVYN+sCMwzYDlx4gQJAoarZlW3PXAhQinK NZm79wkEQUdW1XL4/dfPBfeAqmk6ANuKc6YD3ju0xY24kcfKB6PIC92dt+KawXtfmbdRWEuBAEk Ve8e5NWh42/jjJAZm0taQJFI= X-Received: by 127.0.0.2 with SMTP id lVfJYY1788612xB4pPnpgvrV; Mon, 15 Jan 2024 23:48:51 -0800 X-Received: from muminek.juszkiewicz.com.pl (muminek.juszkiewicz.com.pl [213.251.184.221]) by mx.groups.io with SMTP id smtpd.web10.7822.1705391330464544401 for ; Mon, 15 Jan 2024 23:48:50 -0800 X-Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id 9F7AD260A73; Tue, 16 Jan 2024 08:48:48 +0100 (CET) X-Virus-Scanned: Debian amavis at juszkiewicz.com.pl X-Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavis, port 10024) with ESMTP id dwXCwI0hzVAS; Tue, 16 Jan 2024 08:48:46 +0100 (CET) X-Received: from [192.168.210.114] (83.11.14.94.ipv4.supernova.orange.pl [83.11.14.94]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id C7960260AD4; Tue, 16 Jan 2024 08:48:44 +0100 (CET) From: "Marcin Juszkiewicz" Date: Tue, 16 Jan 2024 08:48:35 +0100 Subject: [edk2-devel] [PATCH edk2-platforms v2 4/4] Platform/SbsaQemu: move FdtHandlerLib to SbsaQemuHardwareInfoLib MIME-Version: 1.0 Message-Id: <20240116-no-dt-for-cpu-v2-4-6cf078d9ab76@linaro.org> References: <20240116-no-dt-for-cpu-v2-0-6cf078d9ab76@linaro.org> In-Reply-To: <20240116-no-dt-for-cpu-v2-0-6cf078d9ab76@linaro.org> To: devel@edk2.groups.io Cc: Leif Lindholm , Ard Biesheuvel , Graeme Gregory , Marcin Juszkiewicz Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,marcin.juszkiewicz@linaro.org List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: DaafHjIeWEvBCxXyF02rfU69x1787277AA= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1705391332666100017 There is no need for EDK2 to know that there is DeviceTree around. All hardware information is read using functions from SbsaQemuHardwareInfoLib library. Library fallbacks to parsing DT if needed (used with too old TF-A). Signed-off-by: Marcin Juszkiewicz Reviewed-by: Leif Lindholm --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 1 - .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf | 33 ------- .../SbsaQemuHardwareInfoLib.inf | 2 + .../Qemu/SbsaQemu/Include/Library/FdtHelperLib.h | 36 ------- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 4 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c | 98 ----------------= -- .../SbsaQemuHardwareInfoLib.c | 104 ++++++++++++++++= ++++ 8 files changed, 110 insertions(+), 172 deletions(-) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/S= bsaQemu.dsc index 07cb3490f4cf..bde61651da2e 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -126,7 +126,6 @@ [LibraryClasses.common] # ARM PL011 UART Driver PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf =20 - FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf SbsaQemuHardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareIn= foLib/SbsaQemuHardwareInfoLib.inf =20 diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf index 291743b19115..9bf0a13de5d1 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf @@ -1,7 +1,7 @@ ## @file # This driver modifies ACPI tables for the Qemu SBSA platform # -# Copyright (c) 2020, Linaro Ltd. All rights reserved. +# Copyright (c) Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -35,9 +35,9 @@ [LibraryClasses] BaseLib DebugLib DxeServicesLib - FdtHelperLib PcdLib PrintLib + SbsaQemuHardwareInfoLib UefiDriverEntryPoint UefiLib UefiRuntimeServicesTableLib diff --git a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf b/= Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf deleted file mode 100644 index 9c059f3e5851..000000000000 --- a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf +++ /dev/null @@ -1,33 +0,0 @@ -#/** @file -# -# Component description file for FdtHelperLib module -# -# Copyright (c) 2021, NUVIA Inc. All rights reserved. -# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -#**/ - -[Defines] - INF_VERSION =3D 1.29 - BASE_NAME =3D FdtHelperLib - FILE_GUID =3D 34e4396f-c2fc-4f9e-ad58-0f98e99e3875 - MODULE_TYPE =3D BASE - VERSION_STRING =3D 1.0 - LIBRARY_CLASS =3D FdtHelperLib - -[Sources.common] - FdtHelperLib.c - -[Packages] - EmbeddedPkg/EmbeddedPkg.dec - MdePkg/MdePkg.dec - Silicon/Qemu/SbsaQemu/SbsaQemu.dec - -[LibraryClasses] - DebugLib - FdtLib - PcdLib - -[FixedPcd] - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemu= HardwareInfoLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib= /SbsaQemuHardwareInfoLib.inf index 8c2def1878e6..5358dd339eb3 100644 --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwar= eInfoLib.inf +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwar= eInfoLib.inf @@ -27,6 +27,8 @@ [LibraryClasses] ArmSmcLib BaseMemoryLib DebugLib + FdtLib =20 [Pcd] + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h b/Silicon= /Qemu/SbsaQemu/Include/Library/FdtHelperLib.h deleted file mode 100644 index ea9159857215..000000000000 --- a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h +++ /dev/null @@ -1,36 +0,0 @@ -/** @file -* FdtHelperLib.h -* -* Copyright (c) 2021, NUVIA Inc. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* -**/ - -#ifndef FDT_HELPER_LIB_ -#define FDT_HELPER_LIB_ - -/** - Get MPIDR for a given cpu from device tree passed by Qemu. - - @param [in] CpuId Index of cpu to retrieve MPIDR value for. - - @retval MPIDR value of CPU at index -**/ -UINT64 -FdtHelperGetMpidr ( - IN UINTN CpuId - ); - -/** Walks through the Device Tree created by Qemu and counts the number - of CPUs present in it. - - @return The number of CPUs present. -**/ -EFIAPI -UINT32 -FdtHelperCountCpus ( - VOID - ); - -#endif /* FDT_HELPER_LIB_ */ diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index 7ef314ae9f67..c446581b746e 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -15,10 +15,10 @@ #include #include #include -#include #include #include #include +#include #include #include #include @@ -297,7 +297,7 @@ AddMadtTable ( CopyMem (New, &Gicc, sizeof (EFI_ACPI_6_0_GIC_STRUCTURE)); GiccPtr =3D (EFI_ACPI_6_0_GIC_STRUCTURE *) New; GiccPtr->AcpiProcessorUid =3D CoreIndex; - GiccPtr->MPIDR =3D FdtHelperGetMpidr (CoreIndex); + GiccPtr->MPIDR =3D SbsaQemuGetMpidr (CoreIndex); New +=3D sizeof (EFI_ACPI_6_0_GIC_STRUCTURE); } =20 diff --git a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c b/Si= licon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c deleted file mode 100644 index 7fdfb055db76..000000000000 --- a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c +++ /dev/null @@ -1,98 +0,0 @@ -/** @file -* FdtHelperLib.c -* -* Copyright (c) 2021, NUVIA Inc. All rights reserved. -* Copyright (c) 2020, Linaro Ltd. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* -**/ - -#include -#include -#include -#include -#include - -STATIC INT32 mFdtFirstCpuOffset; -STATIC INT32 mFdtCpuNodeSize; - -/** - Get MPIDR for a given cpu from device tree passed by Qemu. - - @param [in] CpuId Index of cpu to retrieve MPIDR value for. - - @retval MPIDR value of CPU at index -**/ -UINT64 -FdtHelperGetMpidr ( - IN UINTN CpuId - ) -{ - VOID *DeviceTreeBase; - CONST UINT64 *RegVal; - INT32 Len; - - DeviceTreeBase =3D (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress); - ASSERT (DeviceTreeBase !=3D NULL); - - RegVal =3D fdt_getprop (DeviceTreeBase, - mFdtFirstCpuOffset + (CpuId * mFdtCpuNodeSize), - "reg", - &Len); - if (!RegVal) { - DEBUG ((DEBUG_ERROR, "Couldn't find reg property for CPU:%d\n", CpuId)= ); - return 0; - } - - return (fdt64_to_cpu (ReadUnaligned64 (RegVal))); -} - -/** Walks through the Device Tree created by Qemu and counts the number - of CPUs present in it. - - @return The number of CPUs present. -**/ -EFIAPI -UINT32 -FdtHelperCountCpus ( - VOID - ) -{ - VOID *DeviceTreeBase; - INT32 Node; - INT32 Prev; - INT32 CpuNode; - UINT32 CpuCount; - - DeviceTreeBase =3D (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress); - ASSERT (DeviceTreeBase !=3D NULL); - - // Make sure we have a valid device tree blob - ASSERT (fdt_check_header (DeviceTreeBase) =3D=3D 0); - - CpuNode =3D fdt_path_offset (DeviceTreeBase, "/cpus"); - if (CpuNode <=3D 0) { - DEBUG ((DEBUG_ERROR, "Unable to locate /cpus in device tree\n")); - return 0; - } - - CpuCount =3D 0; - - // Walk through /cpus node and count the number of subnodes. - // The count of these subnodes corresponds to the number of - // CPUs created by Qemu. - Prev =3D fdt_first_subnode (DeviceTreeBase, CpuNode); - mFdtFirstCpuOffset =3D Prev; - while (1) { - CpuCount++; - Node =3D fdt_next_subnode (DeviceTreeBase, Prev); - if (Node < 0) { - break; - } - mFdtCpuNodeSize =3D Node - Prev; - Prev =3D Node; - } - - return CpuCount; -} diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemu= HardwareInfoLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/S= bsaQemuHardwareInfoLib.c index 4df973fda75e..900493e02d7f 100644 --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwar= eInfoLib.c +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwar= eInfoLib.c @@ -11,8 +11,112 @@ #include #include #include +#include #include =20 +/** + Get MPIDR for a given cpu from device tree passed by Qemu. + + @param [in] CpuId Index of cpu to retrieve MPIDR value for. + + @retval MPIDR value of CPU at index +**/ +UINT64 +FdtHelperGetMpidr ( + IN UINTN CpuId + ) +{ + VOID *DeviceTreeBase; + INT32 Node; + INT32 Prev; + UINT32 CpuCount; + CONST UINT64 *RegVal; + + DeviceTreeBase =3D (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress); + ASSERT (DeviceTreeBase !=3D NULL); + + // Make sure we have a valid device tree blob + ASSERT (fdt_check_header (DeviceTreeBase) =3D=3D 0); + + Node =3D fdt_path_offset (DeviceTreeBase, "/cpus"); + if (Node <=3D 0) { + DEBUG ((DEBUG_ERROR, "Unable to locate /cpus in device tree\n")); + return 0; + } + + CpuCount =3D 0; + + Prev =3D fdt_first_subnode (DeviceTreeBase, Node); + while (1) { + + if (CpuCount =3D=3D CpuId) { + RegVal =3D fdt_getprop (DeviceTreeBase, Prev, "reg", NULL); + if (!RegVal) { + DEBUG ((DEBUG_ERROR, "Couldn't find reg property for CPU:%d\n", Cp= uId)); + return 0; + } + return (fdt64_to_cpu (ReadUnaligned64 (RegVal))); + } + + Node =3D fdt_next_subnode (DeviceTreeBase, Prev); + if (Node < 0) { + break; + } + Prev =3D Node; + CpuCount++; + } + + return 0; /* We did not found MPIDR */ + +} + +/** Walks through the Device Tree created by Qemu and counts the number + of CPUs present in it. + + @return The number of CPUs present. +**/ +EFIAPI +UINT32 +FdtHelperCountCpus ( + VOID + ) +{ + VOID *DeviceTreeBase; + INT32 Node; + INT32 Prev; + UINT32 CpuCount; + + DeviceTreeBase =3D (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress); + ASSERT (DeviceTreeBase !=3D NULL); + + // Make sure we have a valid device tree blob + ASSERT (fdt_check_header (DeviceTreeBase) =3D=3D 0); + + Node =3D fdt_path_offset (DeviceTreeBase, "/cpus"); + if (Node <=3D 0) { + DEBUG ((DEBUG_ERROR, "Unable to locate /cpus in device tree\n")); + return 0; + } + + CpuCount =3D 0; + + // Walk through /cpus node and count the number of subnodes. + // The count of these subnodes corresponds to the number of + // CPUs created by Qemu. + Prev =3D fdt_first_subnode (DeviceTreeBase, Node); + while (1) { + CpuCount++; + Node =3D fdt_next_subnode (DeviceTreeBase, Prev); + if (Node < 0) { + break; + } + Prev =3D Node; + } + + return CpuCount; +} + + /** Get CPU count from information passed by Qemu. =20 --=20 2.43.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113877): https://edk2.groups.io/g/devel/message/113877 Mute This Topic: https://groups.io/mt/103758017/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-