From nobody Mon Sep 21 06:47:13 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+113745+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113745+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1705074509; cv=none; d=zohomail.com; s=zohoarc; b=KkzXxWr+KIVstdAVCUZAnUMNqAZLt2PF2BaFw8qOGfL3+WcIOfssuBkl9LGOLYwIkF2SiQjUVDFS9hkEeSG2o09zolyLizhJz/+s5cPS+U/AWUBE1OI89NAcLoieUjWj3rSgyUDPQGRXVad0RE0S+hn5HUEkwRP4oXgG2VVTvZY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1705074509; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=umOYNZ+MFL5zXdfUE2MgfM/DpzSzrc1ytSNhg41Lre0=; b=NL/mULEbvNwZBHEiMW6lD0RCX51Mn/wGQ9/3rxa594wPAx83Hu+ZL+1qu6N30zo9NZfDXfx1UA01MN1NJKRspatqQsPkzJQGtbDztcdeDWrERFM83O+Ho05b6GWQAVtKa2OZTAeAevOryRTuDXFqtnlY3miC5u0BXbpDg6j+0jg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113745+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1705074509590340.81239149044995; Fri, 12 Jan 2024 07:48:29 -0800 (PST) Return-Path: DKIM-Signature: a=rsa-sha256; bh=dkClsrF7aYQH6xIYK0+VjCRxy8Sr+leJUqSfQjE1v/c=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1705074509; v=1; b=jl5DE8UvdUcxaCARO1GQHzSM2kmcfqAjR2HmqbnotWiq89ZPU+Jd5jgb2n+12i0O8tXeA4Bl g6eCpBIc3idGbKRNahcaflrmRA/gSww8Dp2r8dCCALxGO63ZZjg+n0kSejQOTkaeGd/3E1m81HZ a5/uh9F3a5d++ppmtEgroDW0= X-Received: by 127.0.0.2 with SMTP id bUyxYY1788612xXVYEjCWO8c; Fri, 12 Jan 2024 07:48:29 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.10453.1705074508627808241 for ; Fri, 12 Jan 2024 07:48:28 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A8B0C2F4; Fri, 12 Jan 2024 07:49:14 -0800 (PST) X-Received: from usa.arm.com (a079755.arm.com [10.162.46.129]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D23133F67D; Fri, 12 Jan 2024 07:48:26 -0800 (PST) From: "Prabin CA" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Sami Mujawar Subject: [edk2-devel] [edk2-platforms][PATCH V2 3/8] Platform/Sgi: Introduce a flag to enable PCIe support for RD Platforms Date: Fri, 12 Jan 2024 21:17:54 +0530 Message-Id: <20240112154759.1222138-4-prabin.ca@arm.com> In-Reply-To: <20240112154759.1222138-1-prabin.ca@arm.com> References: <20240112154759.1222138-1-prabin.ca@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,prabin.ca@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: hgXnIg863laTbIXvAkujSqVfx1787277AA= Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1705074510744100013 Content-Type: text/plain; charset="utf-8" Introducing a flag called PCIE_ENABLE, which can be set to TRUE or FALSE from the respective .dsc files to enable or disable the PCIe support. As not all reference design platforms have PCIe support enabled, this flag is introduced. Signed-off-by: Prabin CA --- Platform/ARM/SgiPkg/SgiPlatform.dec | 1 + Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 6 ++++++ Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc | 4 +++- Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc | 4 +++- Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc | 4 +++- Platform/ARM/SgiPkg/RdV1/RdV1.dsc | 4 +++- Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.dsc | 4 +++- Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc | 4 +++- Platform/ARM/SgiPkg/SgiPlatform.fdf | 4 +++- Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 5 ++++- Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c | 19 +++++++++++-= ------- 11 files changed, 43 insertions(+), 16 deletions(-) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiP= latform.dec index 4087ff6cad2e..af7887e54126 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dec +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec @@ -31,6 +31,7 @@ [Guids.common] [PcdsFeatureFlag.common] gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported|FALSE|BOOLEAN|0x00000001 gArmSgiTokenSpaceGuid.PcdVirtioNetSupported|FALSE|BOOLEAN|0x00000010 + gArmSgiTokenSpaceGuid.PcdPcieEnable|FALSE|BOOLEAN|0x0000002E =20 [PcdsFixedAtBuild] gArmSgiTokenSpaceGuid.PcdDramBlock2Base|0|UINT64|0x00000002 diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/= SgiPlatform.dsc.inc index 1cfe07c7e4ed..1bf489ffeb39 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc @@ -103,6 +103,10 @@ [PcdsFeatureFlag.common] gArmSgiTokenSpaceGuid.PcdVirtioNetSupported|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE =20 +!if $(PCIE_ENABLE) =3D=3D TRUE + gArmSgiTokenSpaceGuid.PcdPcieEnable|TRUE +!endif + [PcdsFixedAtBuild.common] gArmTokenSpaceGuid.PcdVFPEnabled|1 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 @@ -330,6 +334,7 @@ [Components.common] # Virtio Network OvmfPkg/VirtioNetDxe/VirtioNet.inf =20 +!if $(PCIE_ENABLE) =3D=3D TRUE # # Required by PCI # @@ -343,6 +348,7 @@ [Components.common] gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8010004F } +!endif =20 # # AHCI Support diff --git a/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc b/Platform/ARM/SgiPk= g/RdE1Edge/RdE1Edge.dsc index 32d67d380814..c7463da5203e 100644 --- a/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc +++ b/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc @@ -1,5 +1,5 @@ # -# Copyright (c) 2020-2022, ARM Limited. All rights reserved. +# Copyright (c) 2020-2024, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,6 +22,8 @@ [Defines] BOARD_DXE_FV_COMPONENTS =3D Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge= .fdf.inc BUILD_NUMBER =3D 1 =20 + DEFINE PCIE_ENABLE =3D TRUE + # include common definitions from SgiPlatform.dsc !include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc !include Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc diff --git a/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc b/Platform/ARM/SgiPk= g/RdN1Edge/RdN1Edge.dsc index 6c9a64df054f..77efec9d9533 100644 --- a/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc +++ b/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc @@ -1,5 +1,5 @@ # -# Copyright (c) 2020-2022, ARM Limited. All rights reserved. +# Copyright (c) 2020-2024, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,6 +22,8 @@ [Defines] BOARD_DXE_FV_COMPONENTS =3D Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge= .fdf.inc BUILD_NUMBER =3D 1 =20 + DEFINE PCIE_ENABLE =3D TRUE + # include common definitions from SgiPlatform.dsc !include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc !include Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc diff --git a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc b/Platform/ARM/S= giPkg/RdN1EdgeX2/RdN1EdgeX2.dsc index 10e5bfa29b46..521d88925059 100644 --- a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc +++ b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc @@ -1,5 +1,5 @@ # -# Copyright (c) 2020-2022, ARM Limited. All rights reserved. +# Copyright (c) 2020-2024, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,6 +22,8 @@ [Defines] BOARD_DXE_FV_COMPONENTS =3D Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1Ed= geX2.fdf.inc BUILD_NUMBER =3D 1 =20 + DEFINE PCIE_ENABLE =3D TRUE + # include common definitions from SgiPlatform.dsc !include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc !include Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc diff --git a/Platform/ARM/SgiPkg/RdV1/RdV1.dsc b/Platform/ARM/SgiPkg/RdV1/R= dV1.dsc index e75f68fd8a40..2a4bb019fe7a 100644 --- a/Platform/ARM/SgiPkg/RdV1/RdV1.dsc +++ b/Platform/ARM/SgiPkg/RdV1/RdV1.dsc @@ -1,5 +1,5 @@ # -# Copyright (c) 2020-2022, ARM Limited. All rights reserved. +# Copyright (c) 2020-2024, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,6 +22,8 @@ [Defines] BOARD_DXE_FV_COMPONENTS =3D Platform/ARM/SgiPkg/RdV1/RdV1.fdf.inc BUILD_NUMBER =3D 1 =20 + DEFINE PCIE_ENABLE =3D TRUE + # include common definitions from SgiPlatform.dsc !include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc !include Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc diff --git a/Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.dsc b/Platform/ARM/SgiPkg/Rd= V1Mc/RdV1Mc.dsc index ce014add4165..971e2ccca367 100644 --- a/Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.dsc +++ b/Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.dsc @@ -1,5 +1,5 @@ # -# Copyright (c) 2020-2022, ARM Limited. All rights reserved. +# Copyright (c) 2020-2024, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,6 +22,8 @@ [Defines] BOARD_DXE_FV_COMPONENTS =3D Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.fdf= .inc BUILD_NUMBER =3D 1 =20 + DEFINE PCIE_ENABLE =3D TRUE + # include common definitions from SgiPlatform.dsc !include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc !include Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc diff --git a/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc b/Platform/ARM/SgiPkg/Sg= i575/Sgi575.dsc index 4da4bc2c54a3..4ed64abecd31 100644 --- a/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc +++ b/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc @@ -1,5 +1,5 @@ # -# Copyright (c) 2020-2022, ARM Limited. All rights reserved. +# Copyright (c) 2020-2024, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,6 +22,8 @@ [Defines] BOARD_DXE_FV_COMPONENTS =3D Platform/ARM/SgiPkg/Sgi575/Sgi575.fdf= .inc BUILD_NUMBER =3D 1 =20 + DEFINE PCIE_ENABLE =3D TRUE + # include common definitions from SgiPlatform.dsc !include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc !include Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiP= latform.fdf index 7e55214c2001..4558e886f863 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.fdf +++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf @@ -1,5 +1,5 @@ # -# Copyright (c) 2018-2021, ARM Limited. All rights reserved. +# Copyright (c) 2018-2024, ARM Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -115,6 +115,7 @@ [FV.FvMain] INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf INF Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf =20 +!if $(PCIE_ENABLE) =3D=3D TRUE # Required by PCI INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf =20 @@ -123,6 +124,7 @@ [FV.FvMain] # INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf +!endif =20 # # AHCI Support diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Plat= form/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf index 020bde0d1f56..9bb14eafc5ed 100644 --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf @@ -1,5 +1,5 @@ # -# Copyright (c) 2018 - 2023, Arm Limited. All rights reserved. +# Copyright (c) 2018 - 2024, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -36,6 +36,9 @@ [Sources.common] [Sources.AARCH64] AArch64/Helper.S | GCC =20 +[FeaturePcd] + gArmSgiTokenSpaceGuid.PcdPcieEnable + [FixedPcd] gArmPlatformTokenSpaceGuid.PcdClusterCount gArmPlatformTokenSpaceGuid.PcdCoreCount diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Pla= tform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c index 62c212f3c5b0..72fb0b13e48c 100644 --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c @@ -18,7 +18,8 @@ =20 // Total number of descriptors, including the final "end-of-table" descrip= tor. #define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS = \ - ((14 + (FixedPcdGet32 (PcdChipCount) * 2)) + = \ + ((13 + (FixedPcdGet32 (PcdChipCount) * 2)) + = \ + (FeaturePcdGet (PcdPcieEnable)) + = \ (FixedPcdGet32 (PcdIoVirtSocExpBlkUartEnable) * = \ FixedPcdGet32 (PcdChipCount) * 2)) =20 @@ -263,13 +264,15 @@ ArmPlatformGetVirtualMemoryMap ( #endif #endif =20 - // PCI Configuration Space - VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdPciExpressBas= eAddress); - VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdPciExpressBas= eAddress); - VirtualMemoryTable[Index].Length =3D (FixedPcdGet32 (PcdPciBusM= ax) - - FixedPcdGet32 (PcdPciBusMin= ) + 1) * - SIZE_1MB; - VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUT= E_DEVICE; + if (FeaturePcdGet (PcdPcieEnable)) { + // PCI Configuration Space + VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdPciExpressB= aseAddress); + VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdPciExpressB= aseAddress); + VirtualMemoryTable[Index].Length =3D (FixedPcdGet32 (PcdPciBu= sMax) - + FixedPcdGet32 (PcdPciBusM= in) + 1) * + SIZE_1MB; + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIB= UTE_DEVICE; + } =20 // MM Memory Space VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdMmBufferBase); --=20 2.34.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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