When creating smm page table, limit maximum supported physical address bits returned by CalculateMaximumSupportAddress() to 48 if 5-Level Paging is disabled. When 5-Level Paging is disabled and the PhysicalAddressBits retrived from CPU HOB or CpuId is bigger than 48, only [0, 2^48 -1] range in 52-bit physical address is mapped in page table. Signed-off-by: Dun Tan <dun.tan@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c index XXXXXXX..XXXXXXX 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c @@ -XXX,XX +XXX,XX @@ GetSubEntriesNum ( /** Calculate the maximum support address. + @param[in] Is5LevelPagingNeeded If 5-level paging enabling is needed. + @return the maximum support address. **/ UINT8 CalculateMaximumSupportAddress ( - VOID + BOOLEAN Is5LevelPagingNeeded ) { UINT32 RegEax; @@ -XXX,XX +XXX,XX @@ CalculateMaximumSupportAddress ( } } + // + // Only [0, 2^48 -1] in 52-bit physical addresses is mapped in page table + // when 5-Level Paging is disabled. + // + ASSERT (PhysicalAddressBits <= 52); + if (!Is5LevelPagingNeeded && (PhysicalAddressBits > 48)) { + PhysicalAddressBits = 48; + } + return PhysicalAddressBits; } @@ -XXX,XX +XXX,XX @@ SmmInitPageTable ( mCpuSmmRestrictedMemoryAccess = PcdGetBool (PcdCpuSmmRestrictedMemoryAccess); m1GPageTableSupport = Is1GPageSupport (); m5LevelPagingNeeded = Is5LevelPagingNeeded (); - mPhysicalAddressBits = CalculateMaximumSupportAddress (); + mPhysicalAddressBits = CalculateMaximumSupportAddress (m5LevelPagingNeeded); PatchInstructionX86 (gPatch5LevelPagingNeeded, m5LevelPagingNeeded, 1); if (m5LevelPagingNeeded) { mPagingMode = m1GPageTableSupport ? Paging5Level1GB : Paging5Level; -- 2.31.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113518): https://edk2.groups.io/g/devel/message/113518 Mute This Topic: https://groups.io/mt/103637402/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=- When creating smm page table, limit maximum supported physical address bits returned by CalculateMaximumSupportAddress() to 47 if 5-Level Paging is disabled. When 5-Level Paging is disabled and the PhysicalAddressBits retrived from CPU HOB or CpuId is bigger than 47, and since virtual addresses are sign-extended, only [0, 2^47-1] range in 52-bit physical address is mapped in page table. Signed-off-by: Dun Tan <dun.tan@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c index XXXXXXX..XXXXXXX 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c @@ -XXX,XX +XXX,XX @@ GetSubEntriesNum ( /** Calculate the maximum support address. + @param[in] Is5LevelPagingNeeded If 5-level paging enabling is needed. + @return the maximum support address. **/ UINT8 CalculateMaximumSupportAddress ( - VOID + BOOLEAN Is5LevelPagingNeeded ) { UINT32 RegEax; @@ -XXX,XX +XXX,XX @@ CalculateMaximumSupportAddress ( } } + // + // Only [0, 2^47 -1] in 52-bit physical addresses is mapped in page table + // when 5-Level Paging is disabled. + // + ASSERT (PhysicalAddressBits <= 52); + if (!Is5LevelPagingNeeded && (PhysicalAddressBits > 47)) { + PhysicalAddressBits = 47; + } + return PhysicalAddressBits; } @@ -XXX,XX +XXX,XX @@ SmmInitPageTable ( mCpuSmmRestrictedMemoryAccess = PcdGetBool (PcdCpuSmmRestrictedMemoryAccess); m1GPageTableSupport = Is1GPageSupport (); m5LevelPagingNeeded = Is5LevelPagingNeeded (); - mPhysicalAddressBits = CalculateMaximumSupportAddress (); + mPhysicalAddressBits = CalculateMaximumSupportAddress (m5LevelPagingNeeded); PatchInstructionX86 (gPatch5LevelPagingNeeded, m5LevelPagingNeeded, 1); if (m5LevelPagingNeeded) { mPagingMode = m1GPageTableSupport ? Paging5Level1GB : Paging5Level; -- 2.31.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113570): https://edk2.groups.io/g/devel/message/113570 Mute This Topic: https://groups.io/mt/103655312/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-