From nobody Fri May 10 07:22:25 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+113164+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113164+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1704374189; cv=none; d=zohomail.com; s=zohoarc; b=Nf+cUG5A4aLY7ldzecZp0BM3osNOMndGVabs7/mzDvbJLTihJewh4NRMiSHPEgO+o2z3Q3zXHyQcObHxDgcFziG7WyN8+thKkq80U3nJE2RNfNIn4E8v5UWvWOq9j0Vua0WGzmlxWw3h1tuSNlamCHXlUHREamQYNV4+mcW7KM8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1704374189; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=B5nodAXNTLNqEPCBG6Pl2QaC1TEw2AXXQbWehwISBts=; b=S1v0PbKUJlfcVn5fcYg5JGfjaOd1K6oG8rvmuup6reCcNIBrBtvBZACN6W93z6bFwXHETcy8wEew/tMcWP4d5Dk0hU/bs49Vbgv0l4ppAwmgkDftr1uXmjCKYh7aRKEbTwkNTXFhXGTT98E+6S6eFgvaV69cJJKqIKukZvDla2w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113164+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1704374189015814.0078404068576; Thu, 4 Jan 2024 05:16:29 -0800 (PST) Return-Path: DKIM-Signature: a=rsa-sha256; bh=lldCvdptl99HDx4HhWsMH4z/mZOxqffFgOTT7GLQZlY=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1704374188; v=1; b=drcl0oamR4R2WXmVhzujPPkqT8Rvp/ncOXA7i63NYYu7Q70L4AomXriHZ03VPLZSMS4KyIUi uVlMOm3Lj6QXiBLH1ytD1kWxgpBKXAW9F1oin99sdIbDYhVgRPLXy4PIjyvI9he567ew65RYZs2 3Qkm6h5GtquH6hESkw4p11Sc= X-Received: by 127.0.0.2 with SMTP id cSK4YY1788612xzbiZKVlz6c; Thu, 04 Jan 2024 05:16:28 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.53579.1704374187931926516 for ; Thu, 04 Jan 2024 05:16:28 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5F12C1007; Thu, 4 Jan 2024 05:17:13 -0800 (PST) X-Received: from usa.arm.com (a077434.blr.arm.com [10.162.17.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D27723F64C; Thu, 4 Jan 2024 05:16:25 -0800 (PST) From: "sahil" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Sami Mujawar , Sahil Kaushal Subject: [edk2-devel] [edk2-platforms][PATCH V4 1/4] Silicon/ARM/NeoverseN1Soc: Extract NT_FW_CONFIG address passed by TF-A Date: Thu, 4 Jan 2024 18:46:13 +0530 Message-Id: <20240104131616.474492-2-sahil@arm.com> In-Reply-To: <20240104131616.474492-1-sahil@arm.com> References: <20240104131616.474492-1-sahil@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sahil@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: zUtc5s2t7OHTVPCfdUqHPszbx1787277AA= Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1704374190239100005 Content-Type: text/plain; charset="utf-8" NT_FW_CONFIG DTB contains platform information passed by TF-A boot stage. This patch enables support to first extract address of NT_FW_CONFIG and then pass it to other modules as a PPI. Signed-off-by: sahil --- Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 5 ++++- Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf | 3 ++- Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h | 9 ++++++= --- Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c | 12 ++++++= +++++- Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S | 4 +++- 5 files changed, 26 insertions(+), 7 deletions(-) diff --git a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec b/Silicon/ARM/Neov= erseN1Soc/NeoverseN1Soc.dec index d59f25a5b915..c04162e7e7cd 100644 --- a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec +++ b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec @@ -1,7 +1,7 @@ ## @file # Describes the entire platform configuration. # -# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.
+# Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -83,3 +83,6 @@ gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio32Translation|0x4000000= 0000|UINT64|0x0000004F gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio64Translation|0x4000000= 0000|UINT64|0x00000050 gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber|2|UINT32|0x00= 000051 + +[Ppis] + gArmNeoverseN1SocParameterPpiGuid =3D { 0x4DDD5A72, 0x31AD, 0x4B20, { 0x= 8F, 0x5F, 0xB3, 0xE8, 0x24, 0x6F, 0x80, 0x2B } } diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf = b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf index 96e590cdd810..ead7f11ec964 100644 --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf @@ -1,7 +1,7 @@ ## @file # Platform Library for N1Sdp. # -# Copyright (c) 2018-2021, ARM Limited. All rights reserved.
+# Copyright (c) 2018-2024, ARM Limited. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -63,3 +63,4 @@ =20 [Ppis] gArmMpCoreInfoPpiGuid + gArmNeoverseN1SocParameterPpiGuid diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h b/Silicon/AR= M/NeoverseN1Soc/Include/NeoverseN1Soc.h index 097160c7e2d1..2bddf5007431 100644 --- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h +++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2018 - 2020, ARM Limited. All rights reserved. +* Copyright (c) 2018 - 2024, ARM Limited. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -55,12 +55,15 @@ typedef struct { /*! 0 - Single Chip, 1 - Chip to Chip (C2C) */ UINT8 MultichipMode; - /*! Slave count in C2C mode */ - UINT8 SlaveCount; + /*! Secondary chip count in C2C mode */ + UINT8 SecondaryChipCount; /*! Local DDR memory size in GigaBytes */ UINT8 LocalDdrSize; /*! Remote DDR memory size in GigaBytes */ UINT8 RemoteDdrSize; } NEOVERSEN1SOC_PLAT_INFO; =20 +typedef struct { + CONST VOID *NtFwConfig; +} NEOVERSEN1SOC_EL3_FW_HANDOFF_PARAM_PPI; #endif diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c b/= Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c index c0effd37f333..e8568b7a039b 100644 --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c @@ -1,6 +1,6 @@ /** @file =20 - Copyright (c) 2018-2021, ARM Limited. All rights reserved.
+ Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -8,8 +8,12 @@ =20 #include #include +#include #include =20 +UINT64 gArgNtFwConfigDtPtr; +STATIC NEOVERSEN1SOC_EL3_FW_HANDOFF_PARAM_PPI mNeoverseN1SocParameterPpi; + STATIC ARM_CORE_INFO mCoreInfoTable[] =3D { { 0x0, 0x0 }, // Cluster 0, Core 0 { 0x0, 0x1 }, // Cluster 0, Core 1 @@ -46,6 +50,7 @@ ArmPlatformInitialize ( IN UINTN MpId ) { + mNeoverseN1SocParameterPpi.NtFwConfig =3D (VOID *)gArgNtFwConfigDtPtr; return RETURN_SUCCESS; } =20 @@ -80,6 +85,11 @@ EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] =3D { EFI_PEI_PPI_DESCRIPTOR_PPI, &gArmMpCoreInfoPpiGuid, &mMpCoreInfoPpi + }, + { + EFI_PEI_PPI_DESCRIPTOR_PPI, + &gArmNeoverseN1SocParameterPpiGuid, + &mNeoverseN1SocParameterPpi } }; =20 diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S= b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S index 8d2069dea837..828c383d6892 100644 --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2019 - 2020, ARM Limited. All rights reserved. +* Copyright (c) 2019 - 2024, ARM Limited. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -25,6 +25,8 @@ GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) // the UEFI firmware through the CPU registers. // ASM_PFX(ArmPlatformPeiBootAction): + adr x10, gArgNtFwConfigDtPtr + str x0, [x10] ret =20 // --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113164): https://edk2.groups.io/g/devel/message/113164 Mute This Topic: https://groups.io/mt/103521643/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri May 10 07:22:25 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+113165+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113165+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1704374191; cv=none; d=zohomail.com; s=zohoarc; b=e+mHDPH9JN97DtRL0QItG1K9z/LiNb+FFtTlKTUyafP8DYcB1nbzi9TNcdw68+6Jqx8yuFC48OiZj5Ojl/vO1Lyj2vsa+Y6w+fI/oMqBX2BRSN/SN6lWO6DpoJH28m7CX4CCj+K4+3ZTMvhXYRhOlA1t4v76NWnUrCvjM92wGq8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1704374191; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=Yyn3W0zOa/KSk+aexb+HeoWk4RJNQ6/QahwpnX3j9QY=; b=O0lk6QAd30GoPKDms/XZ9JTMyZG/tR4jlLFx+td2031JwLJKJMMMKDtWB2jINIdpaLNUzHWOznVXciuOmss5zENq4gTGBRpXC17t/t7eF1ZCVpX85GF2DUx/DeXzNyNLhAsArZYp1egmlUq09lM2OtED7UWeYzkcoDFP30HeDwU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113165+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1704374191100242.07878005520604; Thu, 4 Jan 2024 05:16:31 -0800 (PST) Return-Path: DKIM-Signature: a=rsa-sha256; bh=JaubVBvWoGU1GHo1FvPF/nVkP5Q10LgEKaMUNgg0pno=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1704374190; v=1; b=I1kTzP1hvVGLoYJF+0mpUGMKxrTgN0aXr5p9mY4PWgLqeEAULWbNPYEMTG0FIMLGPovDRSYO IUrWz7+O0w5i2eMFubg6GO8nV6TPNk23GTQCe788fRGQG0QBG2cDeUnbkpCdUahM/5OFuRb7Xft Bog7GAt+OL5DGh7I3QRvIDcU= X-Received: by 127.0.0.2 with SMTP id 1WlSYY1788612xPi1DZ0NRmb; Thu, 04 Jan 2024 05:16:30 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.53582.1704374190050949074 for ; Thu, 04 Jan 2024 05:16:30 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8D7EFC15; Thu, 4 Jan 2024 05:17:15 -0800 (PST) X-Received: from usa.arm.com (a077434.blr.arm.com [10.162.17.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0CE693F64C; Thu, 4 Jan 2024 05:16:27 -0800 (PST) From: "sahil" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Sami Mujawar , Sahil Kaushal Subject: [edk2-devel] [edk2-platforms][PATCH V4 2/4] Platform/ARM/N1Sdp: Add N1SdpNtFwConfigPei PEI module Date: Thu, 4 Jan 2024 18:46:14 +0530 Message-Id: <20240104131616.474492-3-sahil@arm.com> In-Reply-To: <20240104131616.474492-1-sahil@arm.com> References: <20240104131616.474492-1-sahil@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sahil@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: w1hePfGcgAoEt9QuOYI6IWJ9x1787277AA= Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1704374192283100009 Content-Type: text/plain; charset="utf-8" This patch adds a PEI to parse NT_FW_CONFIG and pass it to other PEI modules(as PPI) and DXE modules(as HOB). Signed-off-by: sahil --- Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf | 41 ++++= ++ Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c | 132 ++++= ++++++++++++++++ 2 files changed, 173 insertions(+) diff --git a/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.in= f b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf new file mode 100644 index 000000000000..363351b5a1df --- /dev/null +++ b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf @@ -0,0 +1,41 @@ +## @file +# This PEI module parse the NtFwConfig for N1Sdp platform and produce +# the PPI and HOB. +# +# Copyright (c) 2024, ARM Limited. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x0001001B + BASE_NAME =3D N1SdpNtFwConfigPei + FILE_GUID =3D CE76D56C-D3A5-4763-9138-DF09E1D1B614 + MODULE_TYPE =3D PEIM + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D NtFwConfigPeEntryPoint + +[Sources] + NtFwConfigPei.c + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec + +[LibraryClasses] + DebugLib + FdtLib + HobLib + PeimEntryPoint + +[Ppis] + gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid + gArmNeoverseN1SocParameterPpiGuid + +[Guids] + gArmNeoverseN1SocPlatformInfoDescriptorGuid + +[Depex] + gArmNeoverseN1SocParameterPpiGuid diff --git a/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c = b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c new file mode 100644 index 000000000000..330377d21a79 --- /dev/null +++ b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c @@ -0,0 +1,132 @@ +/** @file + + Copyright (c) 2024, ARM Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include + +#include +#include + +STATIC EFI_PEI_PPI_DESCRIPTOR mPpi; + +/** + The entrypoint of the module, parse NtFwConfig and produce the PPI and H= OB. + + @param[in] FileHandle Handle of the file being invoked. + @param[in] PeiServices Describes the list of possible PEI Services. + + @retval EFI_SUCCESS Either no NT_FW_CONFIG was given by EL3 fir= mware + OR the N1Sdp FDT HOB was successfully creat= ed. + @retval EFI_NOT_FOUND Error processing the DTB + @retval EFI_OUT_OF_RESOURCES Could not allocate memory for the HOB + @retval * Other errors are possible. +**/ +EFI_STATUS +EFIAPI +NtFwConfigPeEntryPoint ( + IN EFI_PEI_FILE_HANDLE FileHandle, + IN CONST EFI_PEI_SERVICES **PeiServices + ) +{ + CONST NEOVERSEN1SOC_EL3_FW_HANDOFF_PARAM_PPI *ParamPpi; + CONST UINT32 *Property; + INT32 Offset; + NEOVERSEN1SOC_PLAT_INFO *PlatInfo; + INT32 Status; + + PlatInfo =3D BuildGuidHob ( + &gArmNeoverseN1SocPlatformInfoDescriptorGuid, + sizeof (*PlatInfo) + ); + + if (PlatInfo =3D=3D NULL) { + DEBUG (( + DEBUG_ERROR, + "[%a]: failed to allocate platform info HOB\n", + gEfiCallerBaseName + )); + return EFI_OUT_OF_RESOURCES; + } + + Status =3D PeiServicesLocatePpi ( + &gArmNeoverseN1SocParameterPpiGuid, + 0, + NULL, + (VOID **)&ParamPpi + ); + + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "[%a]: failed to locate gArmNeoverseN1SocParameterPpiGuid - %r\n", + gEfiCallerBaseName, + Status + )); + return Status; + } + + if (fdt_check_header (ParamPpi->NtFwConfig) !=3D 0) { + DEBUG ((DEBUG_ERROR, "Invalid DTB file %p passed\n", ParamPpi->NtFwCon= fig)); + return EFI_NOT_FOUND; + } + + Offset =3D fdt_subnode_offset (ParamPpi->NtFwConfig, 0, "platform-info"); + if (Offset =3D=3D -FDT_ERR_NOTFOUND) { + DEBUG ((DEBUG_ERROR, "Invalid DTB : platform-info node not found\n")); + return EFI_NOT_FOUND; + } + + Property =3D fdt_getprop (ParamPpi->NtFwConfig, Offset, "local-ddr-size"= , NULL); + if (Property =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "local-ddr-size property not found\n")); + return EFI_NOT_FOUND; + } + + PlatInfo->LocalDdrSize =3D fdt32_to_cpu (*Property); + + Property =3D fdt_getprop (ParamPpi->NtFwConfig, Offset, "remote-ddr-size= ", NULL); + if (Property =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "remote-ddr-size property not found\n")); + return EFI_NOT_FOUND; + } + + PlatInfo->RemoteDdrSize =3D fdt32_to_cpu (*Property); + + Property =3D fdt_getprop (ParamPpi->NtFwConfig, Offset, "secondary-chip-= count", NULL); + if (Property =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "secondary-chip-count property not found\n")); + return EFI_NOT_FOUND; + } + + PlatInfo->SecondaryChipCount =3D fdt32_to_cpu (*Property); + + Property =3D fdt_getprop (ParamPpi->NtFwConfig, Offset, "multichip-mode"= , NULL); + if (Property =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "multichip-mode property not found\n")); + return EFI_NOT_FOUND; + } + + PlatInfo->MultichipMode =3D fdt32_to_cpu (*Property); + + mPpi.Flags =3D EFI_PEI_PPI_DESCRIPTOR_PPI + | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST; + mPpi.Guid =3D &gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid; + mPpi.Ppi =3D PlatInfo; + + Status =3D PeiServicesInstallPpi (&mPpi); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "[%a]: failed to install PEI service - %r\n", + gEfiCallerBaseName, + Status + )); + } + + return Status; +} --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113165): https://edk2.groups.io/g/devel/message/113165 Mute This Topic: https://groups.io/mt/103521644/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri May 10 07:22:25 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+113166+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113166+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1704374193; cv=none; d=zohomail.com; s=zohoarc; b=fkypVQyAB7KsRRhKYNYP0uP2oOgA+ctIObBLJeGayp1itl8FyPmDa0P16F4RUIKzJh+VTM6t2mQ2DlJYNJtXs8dVO468V1g0Wb5B+TOzg7dJXoOofW8418Jwn+UwxaTiWRGbpUevKRHu7YpmLjR7rVlzq0C/EVGesYNcw9cJ2mY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1704374193; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=g48eLbbKwPI8HE4V6UcUILFho3oxq05O0vRnGOy47LI=; b=mf45qgg2IQrDKdofC6qEf2TJKpUDmegDqVaiDa1tpslgaigklTiJeTd7m1NVskBUGSKhWc5Z1D6tiubAbwZEjZVCROLEbKEATmlFaF5ontZD1KXzROcq0ivqb9qv+uFw4dtnxMk9yyGjF8haIyLBgMbkrSXuAZ9PUYg5zdUiNNg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+113166+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1704374193319242.2774347349034; Thu, 4 Jan 2024 05:16:33 -0800 (PST) Return-Path: DKIM-Signature: a=rsa-sha256; bh=1ZPjPHmaFZLvzo3GLOy2e+qiGgsISTA8T7kPsC0vgtU=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1704374193; v=1; b=aUI6mIo8It2+tE6Yc1Qs+SMZUzBTjm6IbM11F3i/iS6TQJ+VbSkLkj4Z59mhT8ADxAKSKDtU VjjEP2Sx9taceWIqYVUFStrDz/xsSTbbP6VwdzPVPtQqKjddfxuG6cTpV/XAHdpmwZiUNFDmly8 Medp/nrGFE6aC0EyUEp0y1i0= X-Received: by 127.0.0.2 with SMTP id 1NqeYY1788612xgoIOgcFJHh; Thu, 04 Jan 2024 05:16:33 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.53385.1704374192293313119 for ; Thu, 04 Jan 2024 05:16:32 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BB99AC15; Thu, 4 Jan 2024 05:17:17 -0800 (PST) X-Received: from usa.arm.com (a077434.blr.arm.com [10.162.17.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 3B6BC3F64C; Thu, 4 Jan 2024 05:16:30 -0800 (PST) From: "sahil" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Sami Mujawar , Sahil Kaushal Subject: [edk2-devel] [edk2-platforms][PATCH V4 3/4] Platform/ARM/N1Sdp: Enable N1SdpNtFwConfigPei PEI module for N1Sdp Date: Thu, 4 Jan 2024 18:46:15 +0530 Message-Id: <20240104131616.474492-4-sahil@arm.com> In-Reply-To: <20240104131616.474492-1-sahil@arm.com> References: <20240104131616.474492-1-sahil@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sahil@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: SALWuJ1XKkmn6BuCNNlxDEJUx1787277AA= Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1704374194250100013 Content-Type: text/plain; charset="utf-8" Incorporate N1SdpNtFwConfigPei PEI module which parses NT_FW_CONFIG and passes it to other PEI modules(as PPI) and DXE modules(as HOB). Signed-off-by: sahil --- Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 3 +++ Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 5 ++++- Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 3 ++- 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec b/Silicon/ARM/Neov= erseN1Soc/NeoverseN1Soc.dec index c04162e7e7cd..cca5bf45db67 100644 --- a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec +++ b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec @@ -22,6 +22,8 @@ Include # Root include for the package =20 [Guids.common] + # ARM NeoverseN1Soc Platform Info descriptor + gArmNeoverseN1SocPlatformInfoDescriptorGuid =3D { 0x9fa16eb5, 0xce13, 0x= 4d37, { 0x96, 0xf0, 0x0a, 0xb5, 0xf1, 0xab, 0xff, 0x01 } } gArmNeoverseN1SocTokenSpaceGuid =3D { 0xab93eb78, 0x60d7, 0x4099, { 0xac= , 0xeb, 0x6d, 0xb5, 0x02, 0x58, 0x7c, 0x24 } } =20 [PcdsFixedAtBuild] @@ -85,4 +87,5 @@ gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber|2|UINT32|0x00= 000051 =20 [Ppis] + gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid =3D { 0x21D04AD4, 0x4D23,= 0x426D, { 0x8D, 0x3E, 0x92, 0x23, 0x3E, 0xF4, 0xB9, 0x5E } } gArmNeoverseN1SocParameterPpiGuid =3D { 0x4DDD5A72, 0x31AD, 0x4B20, { 0x= 8F, 0x5F, 0xB3, 0xE8, 0x24, 0x6F, 0x80, 0x2B } } diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1Sd= pPlatform.dsc index d04b22d3ef51..013a2e706e1a 100644 --- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc @@ -4,7 +4,7 @@ # This provides platform specific component descriptions and libraries that # conform to EFI/Framework standards. # -# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.
+# Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -228,6 +228,9 @@ # Platform driver Platform/ARM/N1Sdp/Drivers/PlatformDxe/PlatformDxe.inf =20 + # PEI Phase modules + Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf + # Human Interface Support MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf =20 diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf b/Platform/ARM/N1Sdp/N1Sd= pPlatform.fdf index e5e24ea50294..4c4a6b193658 100644 --- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf @@ -1,7 +1,7 @@ ## @file # FDF file of N1Sdp # -# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.
+# Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent ## @@ -195,6 +195,7 @@ READ_LOCK_STATUS =3D TRUE INF MdeModulePkg/Core/Pei/PeiMain.inf INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf + INF Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf =20 FILE FV_IMAGE =3D 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRE= D =3D TRUE { --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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PlatformLibMem then consumes these values in the form of a PPI during PEI phase and ConfigurationManagerDxe as a HOB during DXE phase. The previous approach of fetching platform information from a fixed address is also removed in this patch. Signed-off-by: sahil --- Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Configurat= ionManagerDxe.inf | 6 +++- Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf = | 1 + Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Configurat= ionManager.h | 5 ++- Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h = | 5 --- Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Configurat= ionManager.c | 33 +++++++++--------- Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c = | 35 +++++++++++++++----- 6 files changed, 55 insertions(+), 30 deletions(-) diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDx= e/ConfigurationManagerDxe.inf b/Platform/ARM/N1Sdp/ConfigurationManager/Con= figurationManagerDxe/ConfigurationManagerDxe.inf index 4f8e7f13021a..e4aaed3e9dd5 100644 --- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Confi= gurationManagerDxe.inf +++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Confi= gurationManagerDxe.inf @@ -1,7 +1,7 @@ ## @file # Configuration Manager Dxe # -# Copyright (c) 2021, ARM Limited. All rights reserved.
+# Copyright (c) 2021 - 2024, ARM Limited. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -42,6 +42,7 @@ =20 [LibraryClasses] ArmPlatformLib + HobLib PrintLib UefiBootServicesTableLib UefiDriverEntryPoint @@ -170,5 +171,8 @@ gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio64Translation gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber =20 +[Guids] + gArmNeoverseN1SocPlatformInfoDescriptorGuid + [Depex] TRUE diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf = b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf index ead7f11ec964..e7af4c711817 100644 --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf @@ -64,3 +64,4 @@ [Ppis] gArmMpCoreInfoPpiGuid gArmNeoverseN1SocParameterPpiGuid + gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDx= e/ConfigurationManager.h b/Platform/ARM/N1Sdp/ConfigurationManager/Configur= ationManagerDxe/ConfigurationManager.h index 303c38dcaee9..ea9cb20ba752 100644 --- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Confi= gurationManager.h +++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Confi= gurationManager.h @@ -1,6 +1,6 @@ /** @file =20 - Copyright (c) 2021, ARM Limited. All rights reserved.
+ Copyright (c) 2021-2024, ARM Limited. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -302,6 +302,9 @@ typedef struct PlatformRepositoryInfo { /// Memory Affinity Info CM_ARM_MEMORY_AFFINITY_INFO MemAffInfo[DDR_REGION_COUNT]; =20 + /// N1Sdp Platform Info + NEOVERSEN1SOC_PLAT_INFO *PlatInfo; + } EDKII_PLATFORM_REPOSITORY_INFO; =20 #endif // CONFIGURATION_MANAGER_H_ diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h b/Silicon/AR= M/NeoverseN1Soc/Include/NeoverseN1Soc.h index 2bddf5007431..5483e7bc5f68 100644 --- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h +++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h @@ -41,11 +41,6 @@ #define NEOVERSEN1SOC_EXP_PERIPH_BASE0 0x1C000000 #define NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ 0x1300000 =20 -// Base address to a structure of type NEOVERSEN1SOC_PLAT_INFO which is -// pre-populated by a earlier boot stage -#define NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE (NEOVERSEN1SOC_NON_SE= CURE_SRAM_BASE + \ - 0x00008000) - /* * Platform information structure stored in Non-secure SRAM. Platform * information are passed from the trusted firmware with the below structu= re diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDx= e/ConfigurationManager.c b/Platform/ARM/N1Sdp/ConfigurationManager/Configur= ationManagerDxe/ConfigurationManager.c index fa6408a7dd1e..966a83294c00 100644 --- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Confi= gurationManager.c +++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Confi= gurationManager.c @@ -1,7 +1,7 @@ /** @file Configuration Manager Dxe =20 - Copyright (c) 2021, ARM Limited. All rights reserved.
+ Copyright (c) 2021 - 2024, ARM Limited. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -1242,19 +1243,27 @@ InitializePlatformRepository ( IN EDKII_PLATFORM_REPOSITORY_INFO * CONST PlatRepoInfo ) { - NEOVERSEN1SOC_PLAT_INFO *PlatInfo; UINT64 Dram2Size; UINT64 RemoteDdrSize; + VOID *PlatInfoHob; + + PlatInfoHob =3D GetFirstGuidHob (&gArmNeoverseN1SocPlatformInfoDescripto= rGuid); + + if (PlatInfoHob =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "Platform HOB is NULL\n")); + return EFI_NOT_FOUND; + } + + PlatRepoInfo->PlatInfo =3D (NEOVERSEN1SOC_PLAT_INFO *)GET_GUID_HOB_DATA = (PlatInfoHob); =20 RemoteDdrSize =3D 0; =20 - PlatInfo =3D (NEOVERSEN1SOC_PLAT_INFO *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_B= ASE; - Dram2Size =3D ((PlatInfo->LocalDdrSize - 2) * SIZE_1GB); + Dram2Size =3D ((PlatRepoInfo->PlatInfo->LocalDdrSize - 2) * SIZE_1GB); =20 PlatRepoInfo->MemAffInfo[LOCAL_DDR_REGION2].Length =3D Dram2Size; =20 - if (PlatInfo->MultichipMode =3D=3D 1) { - RemoteDdrSize =3D ((UINT64)(PlatInfo->RemoteDdrSize - 2) * SIZE_1GB); + if (PlatRepoInfo->PlatInfo->MultichipMode =3D=3D 1) { + RemoteDdrSize =3D ((UINT64)(PlatRepoInfo->PlatInfo->RemoteDdrSize - 2)= * SIZE_1GB); =20 // Update Remote DDR Region1 PlatRepoInfo->MemAffInfo[REMOTE_DDR_REGION1].ProximityDomain =3D 1; @@ -1512,7 +1521,6 @@ GetGicCInfo ( ) { EDKII_PLATFORM_REPOSITORY_INFO * PlatformRepo; - NEOVERSEN1SOC_PLAT_INFO *PlatInfo; UINT32 TotalObjCount; UINT32 ObjIndex; =20 @@ -1523,9 +1531,8 @@ GetGicCInfo ( } =20 PlatformRepo =3D This->PlatRepoInfo; - PlatInfo =3D (NEOVERSEN1SOC_PLAT_INFO *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_B= ASE; =20 - if (PlatInfo->MultichipMode =3D=3D 1) { + if (PlatformRepo->PlatInfo->MultichipMode =3D=3D 1) { TotalObjCount =3D PLAT_CPU_COUNT * 2; } else { TotalObjCount =3D PLAT_CPU_COUNT; @@ -1623,7 +1630,6 @@ GetStandardNameSpaceObject ( { EFI_STATUS Status; EDKII_PLATFORM_REPOSITORY_INFO * PlatformRepo; - NEOVERSEN1SOC_PLAT_INFO *PlatInfo; UINT32 AcpiTableCount; =20 if ((This =3D=3D NULL) || (CmObject =3D=3D NULL)) { @@ -1634,9 +1640,8 @@ GetStandardNameSpaceObject ( =20 Status =3D EFI_NOT_FOUND; PlatformRepo =3D This->PlatRepoInfo; - PlatInfo =3D (NEOVERSEN1SOC_PLAT_INFO *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_B= ASE; AcpiTableCount =3D ARRAY_SIZE (PlatformRepo->CmAcpiTableList); - if (PlatInfo->MultichipMode =3D=3D 0) + if (PlatformRepo->PlatInfo->MultichipMode =3D=3D 0) AcpiTableCount -=3D 1; =20 switch (GET_CM_OBJECT_ID (CmObjectId)) { @@ -1697,7 +1702,6 @@ GetArmNameSpaceObject ( { EFI_STATUS Status; EDKII_PLATFORM_REPOSITORY_INFO * PlatformRepo; - NEOVERSEN1SOC_PLAT_INFO *PlatInfo; UINT32 GicRedistCount; UINT32 GicCpuCount; UINT32 ProcHierarchyInfoCount; @@ -1719,8 +1723,7 @@ GetArmNameSpaceObject ( PlatformRepo =3D This->PlatRepoInfo; =20 // Probe for multi chip information - PlatInfo =3D (NEOVERSEN1SOC_PLAT_INFO *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_B= ASE; - if (PlatInfo->MultichipMode =3D=3D 1) { + if (PlatformRepo->PlatInfo->MultichipMode =3D=3D 1) { GicRedistCount =3D 2; GicCpuCount =3D PLAT_CPU_COUNT * 2; ProcHierarchyInfoCount =3D PLAT_PROC_HIERARCHY_NODE_COUNT * 2; diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c= b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c index 9e8a1efc557d..80daedb33416 100644 --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c @@ -1,6 +1,6 @@ /** @file =20 - Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.
+ Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -10,6 +10,7 @@ #include #include #include +#include #include =20 // The total number of descriptors, including the final "end-of-table" des= criptor. @@ -30,15 +31,33 @@ ArmPlatformGetVirtualMemoryMap ( IN ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryMap ) { - UINTN Index; - ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; - EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; - NEOVERSEN1SOC_PLAT_INFO *PlatInfo; - UINT64 DramBlock2Size; - UINT64 RemoteDdrSize; + UINTN Index; + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; + EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; + CONST NEOVERSEN1SOC_PLAT_INFO *PlatInfo; + UINT64 DramBlock2Size; + UINT64 RemoteDdrSize; + EFI_STATUS Status; =20 Index =3D 0; - PlatInfo =3D (NEOVERSEN1SOC_PLAT_INFO *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_B= ASE; + + Status =3D PeiServicesLocatePpi ( + &gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid, + 0, + NULL, + (VOID **)&PlatInfo + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "[%a]: failed to locate gArmNeoverseN1SocPlatformInfoDescriptorPpiGu= id - %r\n", + gEfiCallerBaseName, + Status + )); + *VirtualMemoryMap =3D NULL; + return; + } + DramBlock2Size =3D ((UINT64)(PlatInfo->LocalDdrSize - NEOVERSEN1SOC_DRAM_BLOCK1_SIZE / SIZE_1GB) * (UINT64)SIZE_1GB); --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113167): https://edk2.groups.io/g/devel/message/113167 Mute This Topic: https://groups.io/mt/103521648/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-