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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: XdVKa0iyCwpbajS9BVDqy0VGx1787277AA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1694609400208100019 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Bugzilla: 3706 'Code First - MADT GICC new flags' On ARM systems physical CPU hotplug is not supported. All CPUs are considered present and this is true throughout the system uptime. The ECR 2285 introduces a new 'online-capable' flag in the GICC structure flags in ACPI 6.5, to signal firmware policy (CPU is not enabled but it can be enabled and onlined). This enables OSPM to support virtual CPU hotplug (on virtual platforms for instance). This ECR also updates the MADT table revision to 6 to reflect the ACPI 6.5 changes. Therefore, update the MADT table revision to match the value as specified in ACPI 6.5. Signed-off-by: Sami Mujawar Reviewed-by: Pierre Gondois --- Notes: v2: - No code change from v1 patch series. [SAMI] MdePkg/Include/IndustryStandard/Acpi65.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/MdePkg/Include/IndustryStandard/Acpi65.h b/MdePkg/Include/Indu= stryStandard/Acpi65.h index 6caadf2404984aa472f748293b8e80dd120f280c..9e2828bc048bcd9b2bf0529d00b= daf8bf04bf543 100644 --- a/MdePkg/Include/IndustryStandard/Acpi65.h +++ b/MdePkg/Include/IndustryStandard/Acpi65.h @@ -2,7 +2,7 @@ ACPI 6.5 definitions from the ACPI Specification Revision 6.5 Aug, 2022. =20 Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.
- Copyright (c) 2019 - 2021, ARM Ltd. All rights reserved.
+ Copyright (c) 2019 - 2023, ARM Ltd. All rights reserved.
Copyright (c) 2023, Loongson Technology Corporation Limited. All rights = reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent @@ -533,6 +533,7 @@ typedef struct { #define EFI_ACPI_6_5_GIC_ENABLED BIT0 #define EFI_ACPI_6_5_PERFORMANCE_INTERRUPT_MODEL BIT1 #define EFI_ACPI_6_5_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2 +#define EFI_ACPI_6_5_GIC_ONLINE_CAPABLE BIT3 =20 /// /// GIC Distributor Structure --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: Do46dhwhz7yLMxB3gxdwnIAlx1787277AA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1694609412971100021 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The ASWG ECR 2303 introduces a new field 'TRBE interrupt' to GICC structure in ACPI 6.5. The Trace Buffer Extension (TRBE) interrupt is a Processor Private interrupt (PPI) and is used to specify a platform-specific interrupt to signal TRBE events. Signed-off-by: Sami Mujawar Reviewed-by: Pierre Gondois --- Notes: v2: - No code change from v1 patch series. [SAMI] MdePkg/Include/IndustryStandard/Acpi65.h | 1 + 1 file changed, 1 insertion(+) diff --git a/MdePkg/Include/IndustryStandard/Acpi65.h b/MdePkg/Include/Indu= stryStandard/Acpi65.h index 9e2828bc048bcd9b2bf0529d00bdaf8bf04bf543..fab613d3a71de7eb2d128f930c6= d8109e3301dac 100644 --- a/MdePkg/Include/IndustryStandard/Acpi65.h +++ b/MdePkg/Include/IndustryStandard/Acpi65.h @@ -525,6 +525,7 @@ typedef struct { UINT8 ProcessorPowerEfficiencyClass; UINT8 Reserved2; UINT16 SpeOverflowInterrupt; + UINT16 TrbeInterrupt; } EFI_ACPI_6_5_GIC_STRUCTURE; =20 /// --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: sTpKySeHJn8gWFoMeD6hxUBzx1787277AA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1694609396631100003 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" ACPI 6.5 introduces a new filed to the MADT GICC structure to specify the Trace Buffer Extension (TRBE) interrupt. The TRBE interrupt is a Processor Private interrupt (PPI) and is used to specify a platform-specific interrupt to signal TRBE events. Therefore, update the CM_ARM_GICC_INFO to reflect the addition of the TRBE interrupt field. Signed-off-by: Sami Mujawar Reviewed-by: Pierre Gondois --- Notes: v2: - No code change from v1 patch series. [SAMI] DynamicTablesPkg/Include/ArmNameSpaceObjects.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTables= Pkg/Include/ArmNameSpaceObjects.h index 19098609de4bd0016e761122d9b30aac03ed2078..ca02970d7a177968c77ba7ae1a8= 59b81d0904ff8 100644 --- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h +++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h @@ -203,6 +203,13 @@ typedef struct CmArmGicCInfo { i.e. a token referencing a CM_ARM_CPC_INFO object. */ CM_OBJECT_TOKEN CpcToken; + + /** Trace Buffer Extension interrupt GSIV. Zero if + unsupported by this processor. This field was introduced in + ACPI 6.5 (MADT revision 6) and is therefore ignored when + generating MADT revision 5 or lower. + */ + UINT16 TrbeInterrupt; } CM_ARM_GICC_INFO; =20 /** A structure that describes the --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: elByk7J1smwTH23gqlyUujv3x1787277AA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1694609396001100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" ACPI 6.5 introduces a new filed to the MADT GICC structure to specify the Trace Buffer Extension (TRBE) interrupt. The TRBE interrupt is a Processor Private interrupt (PPI) and is used to specify a platform-specific interrupt to signal TRBE events. This field has already been added to the CM_ARM_GICC_INFO structure in a previous patch. Therefore, update the Configuration Manager Object Parser to reflect the addition of the TRBE interrupt field. Signed-off-by: Sami Mujawar Reviewed-by: Pierre Gondois --- Notes: v2: - No code change from v1 patch series. [SAMI] DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectP= arser.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationMa= nagerObjectParser.c b/DynamicTablesPkg/Library/Common/TableHelperLib/Config= urationManagerObjectParser.c index 99d6032510a5e912c9189df82c4d2b4398458d2d..c88586a74945878636955fc8a16= 6a94f7323fcde 100644 --- a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerOb= jectParser.c +++ b/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerOb= jectParser.c @@ -59,7 +59,8 @@ STATIC CONST CM_OBJ_PARSER CmArmGicCInfoParser[] =3D { { "ProximityDomain", 4, "0x%x", N= ULL }, { "ClockDomain", 4, "0x%x", N= ULL }, { "AffinityFlags", 4, "0x%x", N= ULL }, - { "CpcToken", sizeof (CM_OBJECT_TOKEN), "0x%p", N= ULL } + { "CpcToken", sizeof (CM_OBJECT_TOKEN), "0x%p", N= ULL }, + { "TRBEInterrupt", 2, "0x%x", N= ULL } }; =20 /** A parser for EArmObjGicDInfo. --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: lynwDCx7oGP5zYJka8aaliV4x1787277AA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1694609408276100011 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The ACPI 6.5 specification updates the MADT table to add a new field to GICC for specifying the TRBE interrupt and also adds support for Online Capable flag to the GICC flags. The Online Capable flags should be passed transparently through as specified in the CM_ARM_GICC_INFO.Flags field and only require the MADT table revision to be setup to 6 to reflect the ACPI 6.5 specification. The TRBE field needs to be appropriately setup in the GICC structure. Therefore, update the MADT generator to reflect the above updates required for supporting ACPI 6.5 Signed-off-by: Sami Mujawar Reviewed-by: Pierre Gondois --- Notes: v2: - TRBE interrupt not set correctly for ACPI 6.4 [Jeshua] - Fixed issue with setting TRBE interrupt [Sami] Ref: https://edk2.groups.io/g/devel/message/107427 DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c | 83 ++++= +++++++--------- 1 file changed, 46 insertions(+), 37 deletions(-) diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator= .c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c index 2102a59faf498eaab7777c509443461ada999610..97be08b5f5b967944a351f834c3= bc3f1ee5029b6 100644 --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c @@ -1,11 +1,11 @@ /** @file MADT Table Generator =20 - Copyright (c) 2017 - 2020, ARM Limited. All rights reserved. + Copyright (c) 2017 - 2023, Arm Limited. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent =20 @par Reference(s): - - ACPI 6.3 Specification - January 2019 + - ACPI 6.5 Specification - Aug 29, 2022 =20 **/ =20 @@ -82,7 +82,7 @@ GET_OBJECT_LIST ( ); =20 /** This function updates the GIC CPU Interface Information in the - EFI_ACPI_6_3_GIC_STRUCTURE structure. + EFI_ACPI_6_5_GIC_STRUCTURE structure. =20 @param [in] Gicc Pointer to GIC CPU Interface structure. @param [in] GicCInfo Pointer to the GIC CPU Interface Information. @@ -91,7 +91,7 @@ GET_OBJECT_LIST ( STATIC VOID AddGICC ( - IN EFI_ACPI_6_3_GIC_STRUCTURE *CONST Gicc, + IN EFI_ACPI_6_5_GIC_STRUCTURE *CONST Gicc, IN CONST CM_ARM_GICC_INFO *CONST GicCInfo, IN CONST UINT8 MadtRev ) @@ -100,9 +100,9 @@ AddGICC ( ASSERT (GicCInfo !=3D NULL); =20 // UINT8 Type - Gicc->Type =3D EFI_ACPI_6_3_GIC; + Gicc->Type =3D EFI_ACPI_6_5_GIC; // UINT8 Length - Gicc->Length =3D sizeof (EFI_ACPI_6_3_GIC_STRUCTURE); + Gicc->Length =3D sizeof (EFI_ACPI_6_5_GIC_STRUCTURE); // UINT16 Reserved Gicc->Reserved =3D EFI_ACPI_RESERVED_WORD; =20 @@ -148,6 +148,15 @@ AddGICC ( // in EFI_ACPI_6_2_GIC_STRUCTURE. Gicc->SpeOverflowInterrupt =3D 0; } + + // UINT16 TrbeInterrupt + if (MadtRev > EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION) { + Gicc->TrbeInterrupt =3D GicCInfo->TrbeInterrupt; + } else { + // Setting TrbeInterrupt to 0 ensures backward compatibility with + // ACPI 6.4 + Gicc->TrbeInterrupt =3D 0; + } } =20 /** @@ -214,7 +223,7 @@ IsAcpiUidEqual ( STATIC EFI_STATUS AddGICCList ( - IN EFI_ACPI_6_3_GIC_STRUCTURE *Gicc, + IN EFI_ACPI_6_5_GIC_STRUCTURE *Gicc, IN CONST CM_ARM_GICC_INFO *GicCInfo, IN UINT32 GicCCount, IN CONST UINT8 MadtRev @@ -252,7 +261,7 @@ AddGICCList ( STATIC VOID AddGICD ( - EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE *CONST Gicd, + EFI_ACPI_6_5_GIC_DISTRIBUTOR_STRUCTURE *CONST Gicd, CONST CM_ARM_GICD_INFO *CONST GicDInfo ) { @@ -260,9 +269,9 @@ AddGICD ( ASSERT (GicDInfo !=3D NULL); =20 // UINT8 Type - Gicd->Type =3D EFI_ACPI_6_3_GICD; + Gicd->Type =3D EFI_ACPI_6_5_GICD; // UINT8 Length - Gicd->Length =3D sizeof (EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE); + Gicd->Length =3D sizeof (EFI_ACPI_6_5_GIC_DISTRIBUTOR_STRUCTURE); // UINT16 Reserved Gicd->Reserved1 =3D EFI_ACPI_RESERVED_WORD; // UINT32 Identifier @@ -289,15 +298,15 @@ AddGICD ( STATIC VOID AddGICMsiFrame ( - IN EFI_ACPI_6_3_GIC_MSI_FRAME_STRUCTURE *CONST GicMsiFrame, + IN EFI_ACPI_6_5_GIC_MSI_FRAME_STRUCTURE *CONST GicMsiFrame, IN CONST CM_ARM_GIC_MSI_FRAME_INFO *CONST GicMsiFrameInfo ) { ASSERT (GicMsiFrame !=3D NULL); ASSERT (GicMsiFrameInfo !=3D NULL); =20 - GicMsiFrame->Type =3D EFI_ACPI_6_3_GIC_MSI_FRAME; - GicMsiFrame->Length =3D sizeof (EFI_ACPI_6_3_GIC_MSI_FRAME_= STRUCTURE); + GicMsiFrame->Type =3D EFI_ACPI_6_5_GIC_MSI_FRAME; + GicMsiFrame->Length =3D sizeof (EFI_ACPI_6_5_GIC_MSI_FRAME_= STRUCTURE); GicMsiFrame->Reserved1 =3D EFI_ACPI_RESERVED_WORD; GicMsiFrame->GicMsiFrameId =3D GicMsiFrameInfo->GicMsiFrameId; GicMsiFrame->PhysicalBaseAddress =3D GicMsiFrameInfo->PhysicalBaseAddres= s; @@ -316,7 +325,7 @@ AddGICMsiFrame ( STATIC VOID AddGICMsiFrameInfoList ( - IN EFI_ACPI_6_3_GIC_MSI_FRAME_STRUCTURE *GicMsiFrame, + IN EFI_ACPI_6_5_GIC_MSI_FRAME_STRUCTURE *GicMsiFrame, IN CONST CM_ARM_GIC_MSI_FRAME_INFO *GicMsiFrameInfo, IN UINT32 GicMsiFrameCount ) @@ -337,15 +346,15 @@ AddGICMsiFrameInfoList ( STATIC VOID AddGICRedistributor ( - IN EFI_ACPI_6_3_GICR_STRUCTURE *CONST Gicr, + IN EFI_ACPI_6_5_GICR_STRUCTURE *CONST Gicr, IN CONST CM_ARM_GIC_REDIST_INFO *CONST GicRedistributorInfo ) { ASSERT (Gicr !=3D NULL); ASSERT (GicRedistributorInfo !=3D NULL); =20 - Gicr->Type =3D EFI_ACPI_6_3_GICR; - Gicr->Length =3D sizeof (EFI_ACPI_6_3_GICR_STRUCTURE); + Gicr->Type =3D EFI_ACPI_6_5_GICR; + Gicr->Length =3D sizeof (EFI_ACPI_6_5_GICR_STRUCTURE); Gicr->Reserved =3D EFI_ACPI_RESERVED_WORD; Gicr->DiscoveryRangeBaseAddress =3D GicRedistributorInfo->DiscoveryRangeBaseAddress; @@ -361,7 +370,7 @@ AddGICRedistributor ( STATIC VOID AddGICRedistributorList ( - IN EFI_ACPI_6_3_GICR_STRUCTURE *Gicr, + IN EFI_ACPI_6_5_GICR_STRUCTURE *Gicr, IN CONST CM_ARM_GIC_REDIST_INFO *GicRInfo, IN UINT32 GicRCount ) @@ -382,15 +391,15 @@ AddGICRedistributorList ( STATIC VOID AddGICInterruptTranslationService ( - IN EFI_ACPI_6_3_GIC_ITS_STRUCTURE *CONST GicIts, + IN EFI_ACPI_6_5_GIC_ITS_STRUCTURE *CONST GicIts, IN CONST CM_ARM_GIC_ITS_INFO *CONST GicItsInfo ) { ASSERT (GicIts !=3D NULL); ASSERT (GicItsInfo !=3D NULL); =20 - GicIts->Type =3D EFI_ACPI_6_3_GIC_ITS; - GicIts->Length =3D sizeof (EFI_ACPI_6_3_GIC_ITS_STRUCTURE); + GicIts->Type =3D EFI_ACPI_6_5_GIC_ITS; + GicIts->Length =3D sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE); GicIts->Reserved =3D EFI_ACPI_RESERVED_WORD; GicIts->GicItsId =3D GicItsInfo->GicItsId; GicIts->PhysicalBaseAddress =3D GicItsInfo->PhysicalBaseAddress; @@ -407,7 +416,7 @@ AddGICInterruptTranslationService ( STATIC VOID AddGICItsList ( - IN EFI_ACPI_6_3_GIC_ITS_STRUCTURE *GicIts, + IN EFI_ACPI_6_5_GIC_ITS_STRUCTURE *GicIts, IN CONST CM_ARM_GIC_ITS_INFO *GicItsInfo, IN UINT32 GicItsCount ) @@ -470,7 +479,7 @@ BuildMadtTable ( UINT32 GicRedistOffset; UINT32 GicItsOffset; =20 - EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *Madt; + EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *Madt; =20 ASSERT (This !=3D NULL); ASSERT (AcpiTableInfo !=3D NULL); @@ -602,22 +611,22 @@ BuildMadtTable ( goto error_handler; } =20 - TableSize =3D sizeof (EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADE= R); + TableSize =3D sizeof (EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADE= R); =20 GicCOffset =3D TableSize; - TableSize +=3D (sizeof (EFI_ACPI_6_3_GIC_STRUCTURE) * GicCCount); + TableSize +=3D (sizeof (EFI_ACPI_6_5_GIC_STRUCTURE) * GicCCount); =20 GicDOffset =3D TableSize; - TableSize +=3D (sizeof (EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE) * GicDCo= unt); + TableSize +=3D (sizeof (EFI_ACPI_6_5_GIC_DISTRIBUTOR_STRUCTURE) * GicDCo= unt); =20 GicMSIOffset =3D TableSize; - TableSize +=3D (sizeof (EFI_ACPI_6_3_GIC_MSI_FRAME_STRUCTURE) * GicMSI= Count); + TableSize +=3D (sizeof (EFI_ACPI_6_5_GIC_MSI_FRAME_STRUCTURE) * GicMSI= Count); =20 GicRedistOffset =3D TableSize; - TableSize +=3D (sizeof (EFI_ACPI_6_3_GICR_STRUCTURE) * GicRedistCou= nt); + TableSize +=3D (sizeof (EFI_ACPI_6_5_GICR_STRUCTURE) * GicRedistCou= nt); =20 GicItsOffset =3D TableSize; - TableSize +=3D (sizeof (EFI_ACPI_6_3_GIC_ITS_STRUCTURE) * GicItsCount); + TableSize +=3D (sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE) * GicItsCount); =20 // Allocate the Buffer for MADT table *Table =3D (EFI_ACPI_DESCRIPTION_HEADER *)AllocateZeroPool (TableSize); @@ -633,7 +642,7 @@ BuildMadtTable ( goto error_handler; } =20 - Madt =3D (EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *)*Table; + Madt =3D (EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *)*Table; =20 DEBUG (( DEBUG_INFO, @@ -659,7 +668,7 @@ BuildMadtTable ( } =20 Status =3D AddGICCList ( - (EFI_ACPI_6_3_GIC_STRUCTURE *)((UINT8 *)Madt + GicCOffset), + (EFI_ACPI_6_5_GIC_STRUCTURE *)((UINT8 *)Madt + GicCOffset), GicCInfo, GicCCount, Madt->Header.Revision @@ -674,13 +683,13 @@ BuildMadtTable ( } =20 AddGICD ( - (EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE *)((UINT8 *)Madt + GicDOffset), + (EFI_ACPI_6_5_GIC_DISTRIBUTOR_STRUCTURE *)((UINT8 *)Madt + GicDOffset), GicDInfo ); =20 if (GicMSICount !=3D 0) { AddGICMsiFrameInfoList ( - (EFI_ACPI_6_3_GIC_MSI_FRAME_STRUCTURE *)((UINT8 *)Madt + GicMSIOffse= t), + (EFI_ACPI_6_5_GIC_MSI_FRAME_STRUCTURE *)((UINT8 *)Madt + GicMSIOffse= t), GicMSIInfo, GicMSICount ); @@ -688,7 +697,7 @@ BuildMadtTable ( =20 if (GicRedistCount !=3D 0) { AddGICRedistributorList ( - (EFI_ACPI_6_3_GICR_STRUCTURE *)((UINT8 *)Madt + GicRedistOffset), + (EFI_ACPI_6_5_GICR_STRUCTURE *)((UINT8 *)Madt + GicRedistOffset), GicRedistInfo, GicRedistCount ); @@ -696,7 +705,7 @@ BuildMadtTable ( =20 if (GicItsCount !=3D 0) { AddGICItsList ( - (EFI_ACPI_6_3_GIC_ITS_STRUCTURE *)((UINT8 *)Madt + GicItsOffset), + (EFI_ACPI_6_5_GIC_ITS_STRUCTURE *)((UINT8 *)Madt + GicItsOffset), GicItsInfo, GicItsCount ); @@ -764,9 +773,9 @@ ACPI_TABLE_GENERATOR MadtGenerator =3D { // Generator Description L"ACPI.STD.MADT.GENERATOR", // ACPI Table Signature - EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, // ACPI Table Revision supported by this Generator - EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION, + EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION, // Minimum supported ACPI Table Revision EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION, // Creator ID --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: GoDgKKczcbU3OmR1Ju8mCxe2x1787277AA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1694609398067100011 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The ACPI 6.5 specification updates the minor revision of the FADT table to 5. Therefore, update the FADT generator to setup the minor revision for ACPI 6.5. Signed-off-by: Sami Mujawar Reviewed-by: Pierre Gondois --- Notes: v2: - No code change from v1 patch series. [SAMI] DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/FadtGenerator.c | 108 +++= +++++++---------- 1 file changed, 54 insertions(+), 54 deletions(-) diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/FadtGenerator= .c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/FadtGenerator.c index 1d10ea55e2395c55291faa3c247e5c59e345650c..57aaaf85e64a5a9f1df8d004f9c= 4a819fc7ee5a8 100644 --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/FadtGenerator.c +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/FadtGenerator.c @@ -1,11 +1,11 @@ /** @file FADT Table Generator =20 - Copyright (c) 2017 - 2022, Arm Limited. All rights reserved. + Copyright (c) 2017 - 2023, Arm Limited. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent =20 @par Reference(s): - - ACPI 6.4 Specification, January 2021 + - ACPI 6.5 Specification, Aug 29, 2022 =20 **/ =20 @@ -32,8 +32,8 @@ Requirements: =20 /** This macro defines the FADT flag options for ARM Platforms. */ -#define FADT_FLAGS (EFI_ACPI_6_4_HW_REDUCED_ACPI | \ - EFI_ACPI_6_4_LOW_POWER_S0_IDLE_CAPABLE) +#define FADT_FLAGS (EFI_ACPI_6_5_HW_REDUCED_ACPI | \ + EFI_ACPI_6_5_LOW_POWER_S0_IDLE_CAPABLE) =20 /** This macro defines the valid mask for the FADT flag option if HW_REDUCED_ACPI flag in the table is set. @@ -42,47 +42,47 @@ Requirements: 22-31 (reserved). =20 Valid bits are: - EFI_ACPI_6_4_WBINVD BIT0 - EFI_ACPI_6_4_PWR_BUTTON BIT4 - EFI_ACPI_6_4_SLP_BUTTON BIT5 - EFI_ACPI_6_4_FIX_RTC BIT6 - EFI_ACPI_6_4_DCK_CAP BIT9 - EFI_ACPI_6_4_RESET_REG_SUP BIT10 - EFI_ACPI_6_4_SEALED_CASE BIT11 - EFI_ACPI_6_4_HEADLESS BIT12 - EFI_ACPI_6_4_USE_PLATFORM_CLOCK BIT15 - EFI_ACPI_6_4_FORCE_APIC_CLUSTER_MODEL BIT18 - EFI_ACPI_6_4_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19 - EFI_ACPI_6_4_HW_REDUCED_ACPI BIT20 - EFI_ACPI_6_4_LOW_POWER_S0_IDLE_CAPABLE BIT21 + EFI_ACPI_6_5_WBINVD BIT0 + EFI_ACPI_6_5_PWR_BUTTON BIT4 + EFI_ACPI_6_5_SLP_BUTTON BIT5 + EFI_ACPI_6_5_FIX_RTC BIT6 + EFI_ACPI_6_5_DCK_CAP BIT9 + EFI_ACPI_6_5_RESET_REG_SUP BIT10 + EFI_ACPI_6_5_SEALED_CASE BIT11 + EFI_ACPI_6_5_HEADLESS BIT12 + EFI_ACPI_6_5_USE_PLATFORM_CLOCK BIT15 + EFI_ACPI_6_5_FORCE_APIC_CLUSTER_MODEL BIT18 + EFI_ACPI_6_5_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19 + EFI_ACPI_6_5_HW_REDUCED_ACPI BIT20 + EFI_ACPI_6_5_LOW_POWER_S0_IDLE_CAPABLE BIT21 */ #define VALID_HARDWARE_REDUCED_FLAG_MASK ( \ - EFI_ACPI_6_4_WBINVD | \ - EFI_ACPI_6_4_PWR_BUTTON | \ - EFI_ACPI_6_4_SLP_BUTTON | \ - EFI_ACPI_6_4_FIX_RTC | \ - EFI_ACPI_6_4_DCK_CAP | \ - EFI_ACPI_6_4_RESET_REG_SUP | \ - EFI_ACPI_6_4_SEALED_CASE | \ - EFI_ACPI_6_4_HEADLESS | \ - EFI_ACPI_6_4_USE_PLATFORM_CLOCK | \ - EFI_ACPI_6_4_FORCE_APIC_CLUSTER_MODEL | \ - EFI_ACPI_6_4_FORCE_APIC_PHYSICAL_DESTINATION_MODE | \ - EFI_ACPI_6_4_HW_REDUCED_ACPI | \ - EFI_ACPI_6_4_LOW_POWER_S0_IDLE_CAPABLE) + EFI_ACPI_6_5_WBINVD | \ + EFI_ACPI_6_5_PWR_BUTTON | \ + EFI_ACPI_6_5_SLP_BUTTON | \ + EFI_ACPI_6_5_FIX_RTC | \ + EFI_ACPI_6_5_DCK_CAP | \ + EFI_ACPI_6_5_RESET_REG_SUP | \ + EFI_ACPI_6_5_SEALED_CASE | \ + EFI_ACPI_6_5_HEADLESS | \ + EFI_ACPI_6_5_USE_PLATFORM_CLOCK | \ + EFI_ACPI_6_5_FORCE_APIC_CLUSTER_MODEL | \ + EFI_ACPI_6_5_FORCE_APIC_PHYSICAL_DESTINATION_MODE | \ + EFI_ACPI_6_5_HW_REDUCED_ACPI | \ + EFI_ACPI_6_5_LOW_POWER_S0_IDLE_CAPABLE) =20 #pragma pack(1) =20 -/** The AcpiFadt is a template EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE +/** The AcpiFadt is a template EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE structure used for generating the FADT Table. Note: fields marked with "{Template}" will be updated dynamically. */ STATIC -EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE AcpiFadt =3D { +EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE AcpiFadt =3D { ACPI_HEADER ( - EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, - EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE, - EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_REVISION + EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE, + EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_REVISION ), // UINT32 FirmwareCtrl 0, @@ -91,7 +91,7 @@ EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE AcpiFadt =3D { // UINT8 Reserved0 EFI_ACPI_RESERVED_BYTE, // UINT8 PreferredPmProfile - EFI_ACPI_6_4_PM_PROFILE_UNSPECIFIED, // {Template}: Power Management Pr= ofile + EFI_ACPI_6_5_PM_PROFILE_UNSPECIFIED, // {Template}: Power Management Pr= ofile // UINT16 SciInt 0, // UINT32 SmiCmd @@ -160,37 +160,37 @@ EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE AcpiFadt = =3D { 0, // UINT32 Flags FADT_FLAGS, - // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ResetReg + // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ResetReg NULL_GAS, // UINT8 ResetValue 0, // UINT16 ArmBootArch - EFI_ACPI_6_4_ARM_PSCI_COMPLIANT, // {Template}: ARM Boot Architecture F= lags + EFI_ACPI_6_5_ARM_PSCI_COMPLIANT, // {Template}: ARM Boot Architecture F= lags // UINT8 MinorRevision - EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, // {Template} + EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, // {Template} // UINT64 XFirmwareCtrl 0, // UINT64 XDsdt 0, - // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk + // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk NULL_GAS, - // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk + // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk NULL_GAS, - // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk + // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk NULL_GAS, - // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk + // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk NULL_GAS, - // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk + // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk NULL_GAS, - // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk + // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk NULL_GAS, - // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XGpe0Blk + // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XGpe0Blk NULL_GAS, - // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XGpe1Blk + // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XGpe1Blk NULL_GAS, - // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE SleepControlReg + // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE SleepControlReg NULL_GAS, - // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE SleepStatusReg + // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE SleepStatusReg NULL_GAS, // UINT64 HypervisorVendorIdentity EFI_ACPI_RESERVED_QWORD // {Template}: Hypervisor Vendor ID @@ -535,7 +535,7 @@ BuildFadtTable ( This, (EFI_ACPI_DESCRIPTION_HEADER *)&AcpiFadt, AcpiTableInfo, - sizeof (EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE) + sizeof (EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE) ); if (EFI_ERROR (Status)) { DEBUG (( @@ -557,7 +557,7 @@ BuildFadtTable ( if (((AcpiTableInfo->MinorRevision & 0xF) >=3D EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION) && ((AcpiTableInfo->MinorRevision & 0xF) <=3D - EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION)) + EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION)) { AcpiFadt.MinorVersion =3D AcpiTableInfo->MinorRevision; } else { @@ -566,7 +566,7 @@ BuildFadtTable ( "WARNING: FADT: Unsupported FADT Minor Revision 0x%x specified, " \ "defaulting to FADT Minor Revision 0x%x\n", AcpiTableInfo->MinorRevision, - EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION + EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION )); } } @@ -642,9 +642,9 @@ ACPI_TABLE_GENERATOR FadtGenerator =3D { // Generator Description L"ACPI.STD.FADT.GENERATOR", // ACPI Table Signature - EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, // ACPI Table Revision supported by this Generator - EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_REVISION, + EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_REVISION, // Minimum supported ACPI Table Revision EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_REVISION, // Creator ID --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: npwpa772amSdyaGowvrgQLGox1787277AA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1694609407271100003 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" ACPI 6.5 introduces a new filed to the MADT GICC structure to specify the TRBE interrupt. The TRBE interrupt is a Processor Private interrupt (PPI) and is used to specify a platform-specific interrupt to signal TRBE events. Therefore, update the MADT GICC structure parser to parse the new TRBE interrupt field. Also, add validations to check that the TRBE interrupt is within the PPI interrupt range. Signed-off-by: Sami Mujawar Reviewed-by: Pierre Gondois Reviewed-by: Zhichao Gao --- Notes: v2: - No code change from v1 patch series. [SAMI] ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c | 4= 8 +++++++++++++++++++- 1 file changed, 46 insertions(+), 2 deletions(-) diff --git a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/Madt= Parser.c b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPa= rser.c index 41edcb9ffd1da90893c04e8284ea3317a9e3b45a..3a4f246347f8ad3489fda083e32= 68e73baa9bc92 100644 --- a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c +++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c @@ -1,7 +1,7 @@ /** @file MADT table parser =20 - Copyright (c) 2016 - 2020, ARM Limited. All rights reserved. + Copyright (c) 2016 - 2023, ARM Limited. All rights reserved. Copyright (c) 2022, AMD Incorporated. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -97,6 +97,48 @@ ValidateSpeOverflowInterrupt ( } } =20 +/** + This function validates the TRBE Interrupt in the GICC. + + @param [in] Ptr Pointer to the start of the field data. + @param [in] Context Pointer to context specific information e.g. this + could be a pointer to the ACPI table header. +**/ +STATIC +VOID +EFIAPI +ValidateTrbeInterrupt ( + IN UINT8 *Ptr, + IN VOID *Context + ) +{ + UINT16 TrbeInterrupt; + + TrbeInterrupt =3D *(UINT16 *)Ptr; + + // SPE not supported by this processor + if (TrbeInterrupt =3D=3D 0) { + return; + } + + if ((TrbeInterrupt < ARM_PPI_ID_MIN) || + ((TrbeInterrupt > ARM_PPI_ID_MAX) && + (TrbeInterrupt < ARM_PPI_ID_EXTENDED_MIN)) || + (TrbeInterrupt > ARM_PPI_ID_EXTENDED_MAX)) + { + IncrementErrorCount (); + Print ( + L"\nERROR: TRBE Interrupt ID of %d is not in the allowed PPI ID " + L"ranges of %d-%d or %d-%d (for GICv3.1 or later).", + TrbeInterrupt, + ARM_PPI_ID_MIN, + ARM_PPI_ID_MAX, + ARM_PPI_ID_EXTENDED_MIN, + ARM_PPI_ID_EXTENDED_MAX + ); + } +} + /** An ACPI_PARSER array describing the GICC Interrupt Controller Structure. **/ @@ -122,7 +164,9 @@ STATIC CONST ACPI_PARSER GicCParser[] =3D { NULL }, { L"Reserved", 1, 77, L"0x%x", NULL, NULL, NULL= , NULL }, { L"SPE overflow Interrupt", 2, 78, L"0x%x", NULL, NULL, - ValidateSpeOverflowInterrupt, NULL } + ValidateSpeOverflowInterrupt, NULL }, + { L"TRBE Interrupt", 2, 80, L"0x%x", NULL, NULL, + ValidateTrbeInterrupt, NULL } }; =20 /** --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: 4g0B8h0yvLx4riiKN3J5Zh9yx1787277AA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1694609402180100023 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add an Embedded Trace (ET) info object that can be used to provide information about Embedded Trace Extension (ETE) or Embedded Trace Module (ETM) available on a platform. Although ETE and ETM share the same HID, ETE has a system register interfaces, unlike ETM which requires memory mapped registers. Since this patch aims to support ETE it does not describe any memory mapped registers. However, required support for ETM can be added in the future. Signed-off-by: Sami Mujawar Reviewed-by: Pierre Gondois --- Notes: v2: - No code change from v1 patch series. [SAMI] DynamicTablesPkg/Include/ArmNameSpaceObjects.h | 25 +++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTables= Pkg/Include/ArmNameSpaceObjects.h index ca02970d7a177968c77ba7ae1a859b81d0904ff8..8c00bdac20bb1323d8dbd17f671= e0e61886ad269 100644 --- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h +++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h @@ -1,6 +1,6 @@ /** @file =20 - Copyright (c) 2017 - 2022, Arm Limited. All rights reserved.
+ Copyright (c) 2017 - 2023, Arm Limited. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -71,6 +71,7 @@ typedef enum ArmObjectID { EArmObjPccSubspaceType3Info, ///< 46 - P= cc Subspace Type 3 Info EArmObjPccSubspaceType4Info, ///< 47 - P= cc Subspace Type 4 Info EArmObjPccSubspaceType5Info, ///< 48 - P= cc Subspace Type 5 Info + EArmObjEtInfo, ///< 49 - E= mbedded Trace Extension/Module Info EArmObjMax } EARM_OBJECT_ID; =20 @@ -210,6 +211,12 @@ typedef struct CmArmGicCInfo { generating MADT revision 5 or lower. */ UINT16 TrbeInterrupt; + + /** Optional field: Reference Token for the Embedded Trace device info f= or + this processing element. + i.e. a token referencing a CM_ARM_ET_INFO object. + */ + CM_OBJECT_TOKEN EtToken; } CM_ARM_GICC_INFO; =20 /** A structure that describes the @@ -1304,6 +1311,22 @@ typedef struct CmArmPccSubspaceType5Info { PCC_MAILBOX_REGISTER_INFO ErrorStatusReg; } CM_ARM_PCC_SUBSPACE_TYPE5_INFO; =20 +/** An enum describing the Arm Embedded Trace device type. +*/ +typedef enum ArmEtType { + ArmEtTypeEtm, ///< Embedded Trace module. + ArmEtTypeEte, ///< Embedded Trace Extension. + ArmEtTypeMax +} ARM_ET_TYPE; + +/** A structure that describes the Embedded Trace Extension/Module. + + ID: EArmObjEtInfo +*/ +typedef struct CmArmEtInfo { + ARM_ET_TYPE EtType; +} CM_ARM_ET_INFO; + #pragma pack() =20 #endif // ARM_NAMESPACE_OBJECTS_H_ --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: NlUcmdlpOUjq1XHOQm8mxxqlx1787277AA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1694609399145100017 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" An Embedded Trace (ET) info object is used to provide information about an Embedded Trace Extension (ETE) or an Embedded Trace Module (ETM) available on a platform. The CM_ARM_ET_INFO object has already been added to the Arm namespace objects list by a previous patch. Therefore, update the CM Object parser to add support for parsing the CM_ARM_ET_INFO object. Signed-off-by: Sami Mujawar Reviewed-by: Pierre Gondois --- Notes: v2: - No code change from v1 patch series. [SAMI] DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectP= arser.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationMa= nagerObjectParser.c b/DynamicTablesPkg/Library/Common/TableHelperLib/Config= urationManagerObjectParser.c index c88586a74945878636955fc8a166a94f7323fcde..145732a21b0704729714168aa42= 0d9988471f512 100644 --- a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerOb= jectParser.c +++ b/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerOb= jectParser.c @@ -638,6 +638,12 @@ STATIC CONST CM_OBJ_PARSER CmArmPccSubspaceType5InfoP= arser[] =3D { ARRAY_SIZE (CmArmMailboxRegisterInfoParser) }, }; =20 +/** A parser for EArmObjEtInfo. +*/ +STATIC CONST CM_OBJ_PARSER CmArmEtInfo[] =3D { + { "EtType", sizeof (ARM_ET_TYPE), "0x%x", NULL } +}; + /** A parser for Arm namespace objects. */ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] =3D { @@ -734,6 +740,8 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectPar= ser[] =3D { ARRAY_SIZE (CmArmPccSubspaceType34InfoParser) }, { "EArmObjPccSubspaceType5Info", CmArmPccSubspaceType5InfoParser, ARRAY_SIZE (CmArmPccSubspaceType5InfoParser) }, + { "EArmObjEtInfo", CmArmEtInfo, + ARRAY_SIZE (CmArmEtInfo) }, { "EArmObjMax", NULL, = 0 }, }; =20 --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: NuHpzKlOfhxmaOm8dEP6Ldg0x1787277AA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1694609411368100019 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Coresight Embedded Trace Extension (ETE) feature can be detected by the platform firmware by examining the debug feature register ID_AA64DFR0_EL1.TraceVer field. The platform configuration manager can then describe the ETE by creating CM_ARM_ET_INFO object(s) and referencing these in CM_ARM_GICC_INFO.EtToken. The 'Table 3: Compatible IDs for architected CoreSight components' in the 'ACPI for CoreSight 1.2 Platform Design Document' specifies the HID value for Coresight ETE and CoreSight Embedded Trace Macrocell (ETM) v4.x as ARMH C500. Therefore, update the SsdtCpuTopologyGenerator to add an ETE device to the CPU node in the AML CPU hierarchy so that an OS can utilise this information. Note: Although ETE and ETM share the same HID, ETE has a system register interfaces, unlike ETM which requires memory mapped registers. Since this patch aims to support ETE, the AML description does not describe any memory mapped registers. However, support for ETM can be added in the future. Signed-off-by: Sami Mujawar Reviewed-by: Pierre Gondois --- Notes: v2: - No code change from v1 patch series. [SAMI] DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopolog= yGenerator.c | 186 +++++++++++++++++++- DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopolog= yGenerator.h | 11 +- 2 files changed, 195 insertions(+), 2 deletions(-) diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/Ss= dtCpuTopologyGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTop= ologyLibArm/SsdtCpuTopologyGenerator.c index 6fb131b664820adca63c9efa6d8b0e17fc64284e..6fbba12a010bf987797f0901a03= 2735e8e0be598 100644 --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTo= pologyGenerator.c +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTo= pologyGenerator.c @@ -1,11 +1,17 @@ /** @file SSDT Cpu Topology Table Generator. =20 - Copyright (c) 2021, Arm Limited. All rights reserved.
+ Copyright (c) 2021 - 2023, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 @par Reference(s): - ACPI 6.3 Specification - January 2019 - s8.4 Declaring Processors + - ACPI for CoreSight version 1.2 Platform Design Document + (https://developer.arm.com/documentation/den0067/a/?lang=3Den) + + @par Glossary: + - ETE - Embedded Trace Extension. + - ETM - Embedded Trace Macrocell. **/ =20 #include @@ -35,6 +41,7 @@ Requirements: - EArmObjProcHierarchyInfo (OPTIONAL) along with - EArmObjCmRef (OPTIONAL) - EArmObjLpiInfo (OPTIONAL) + - GetEArmObjEtInfo (OPTIONAL) */ =20 /** This macro expands to a function that retrieves the GIC @@ -86,6 +93,16 @@ GET_OBJECT_LIST ( CM_ARM_CPC_INFO ); =20 +/** + This macro expands to a function that retrieves the ET device + information from the Configuration Manager. +*/ +GET_OBJECT_LIST ( + EObjNameSpaceArm, + EArmObjEtInfo, + CM_ARM_ET_INFO + ); + /** Initialize the TokenTable. =20 One entry should be allocated for each CM_ARM_PROC_HIERARCHY_INFO @@ -326,6 +343,144 @@ CreateAmlCpcNode ( return Status; } =20 +/** Create an embedded trace device and add it to the Cpu Node in the + AML namespace. + + This generates the following ASL code: + Device (E002) + { + Name (_UID, 2) + Name (_HID, "ARMHC500") + } + + Note: Currently we only support generating ETE nodes. Unlike ETM, + ETE has a system register interface and therefore does not need + the MMIO range to be described. + + @param [in] Generator The SSDT Cpu Topology generator. + @param [in] ParentNode Parent node to attach the Cpu node to. + @param [in] CpuName Value used to generate the node name. + @param [out] EtNodePtr If not NULL, return the created Cpu node. + + @retval EFI_SUCCESS Success. + @retval EFI_INVALID_PARAMETER Invalid parameter. + @retval EFI_OUT_OF_RESOURCES Failed to allocate memory. +**/ +STATIC +EFI_STATUS +EFIAPI +CreateAmlEtd ( + IN ACPI_CPU_TOPOLOGY_GENERATOR *Generator, + IN AML_NODE_HANDLE ParentNode, + IN UINT32 CpuName, + OUT AML_OBJECT_NODE_HANDLE *EtNodePtr OPTIONAL + ) +{ + EFI_STATUS Status; + AML_OBJECT_NODE_HANDLE EtNode; + CHAR8 AslName[AML_NAME_SEG_SIZE + 1]; + + ASSERT (Generator !=3D NULL); + ASSERT (ParentNode !=3D NULL); + + Status =3D WriteAslName ('E', CpuName, AslName); + if (EFI_ERROR (Status)) { + ASSERT (0); + return Status; + } + + Status =3D AmlCodeGenDevice (AslName, ParentNode, &EtNode); + if (EFI_ERROR (Status)) { + ASSERT (0); + return Status; + } + + Status =3D AmlCodeGenNameInteger ( + "_UID", + CpuName, + EtNode, + NULL + ); + if (EFI_ERROR (Status)) { + ASSERT (0); + return Status; + } + + Status =3D AmlCodeGenNameString ( + "_HID", + ACPI_HID_ET_DEVICE, + EtNode, + NULL + ); + if (EFI_ERROR (Status)) { + ASSERT (0); + return Status; + } + + // If requested, return the handle to the EtNode. + if (EtNodePtr !=3D NULL) { + *EtNodePtr =3D EtNode; + } + + return Status; +} + +/** Create and add an Embedded trace device to the Cpu Node. + + @param [in] Generator The SSDT Cpu Topology generator. + @param [in] CfgMgrProtocol Pointer to the Configuration Manager + Protocol Interface. + @param [in] GicCInfo Pointer to the CM_ARM_GICC_INFO obje= ct + describing the Cpu. + @param [in] CpuName Value used to generate the CPU node = name. + @param [in] Node CPU Node to which the ET device node= is + attached. + + @retval EFI_SUCCESS The function completed successfully. + @retval EFI_UNSUPPORTED Feature Unsupported. + @retval EFI_INVALID_PARAMETER Invalid parameter. + @retval EFI_OUT_OF_RESOURCES Failed to allocate memory. +**/ +STATIC +EFI_STATUS +EFIAPI +CreateAmlEtNode ( + IN ACPI_CPU_TOPOLOGY_GENERATOR *Generator, + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol, + IN CM_ARM_GICC_INFO *GicCInfo, + IN UINT32 CpuName, + IN AML_OBJECT_NODE_HANDLE *Node + ) +{ + EFI_STATUS Status; + CM_ARM_ET_INFO *EtInfo; + + Status =3D GetEArmObjEtInfo ( + CfgMgrProtocol, + GicCInfo->EtToken, + &EtInfo, + NULL + ); + if (EFI_ERROR (Status)) { + ASSERT (0); + return Status; + } + + // Currently we only support creation of a ETE Node. + if (EtInfo->EtType !=3D ArmEtTypeEte) { + return EFI_UNSUPPORTED; + } + + Status =3D CreateAmlEtd ( + Generator, + Node, + CpuName, + NULL + ); + ASSERT_EFI_ERROR (Status); + return Status; +} + /** Create and add an _LPI method to Cpu/Cluster Node. =20 For instance, transform an AML node from: @@ -694,6 +849,21 @@ CreateAmlCpuFromProcHierarchy ( } } =20 + // Add an Embedded Trace node if present. + if (GicCInfo->EtToken !=3D CM_NULL_TOKEN) { + Status =3D CreateAmlEtNode ( + Generator, + CfgMgrProtocol, + GicCInfo, + CpuName, + CpuNode + ); + if (EFI_ERROR (Status)) { + ASSERT_EFI_ERROR (Status); + return Status; + } + } + return Status; } =20 @@ -1135,6 +1305,20 @@ CreateTopologyFromGicC ( break; } } + + if (GicCInfo[Index].EtToken !=3D CM_NULL_TOKEN) { + Status =3D CreateAmlEtNode ( + Generator, + CfgMgrProtocol, + &GicCInfo[Index], + Index, + CpuNode + ); + if (EFI_ERROR (Status)) { + ASSERT_EFI_ERROR (Status); + return Status; + } + } } // for =20 return Status; diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/Ss= dtCpuTopologyGenerator.h b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTop= ologyLibArm/SsdtCpuTopologyGenerator.h index 48e4455490e9a211e8d4e0a18adcf079fd5d2d24..0c7a0b0601ab221bc416ecb4be4= 36c0dafca1824 100644 --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTo= pologyGenerator.h +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTo= pologyGenerator.h @@ -1,11 +1,17 @@ /** @file SSDT Cpu Topology Table Generator. =20 - Copyright (c) 2021, Arm Limited. All rights reserved.
+ Copyright (c) 2021 - 2023, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 @par Reference(s): - ACPI 6.3 Specification - January 2019 - s8.4 Declaring Processors + - ACPI for CoreSight version 1.2 Platform Design Document + (https://developer.arm.com/documentation/den0067/a/?lang=3Den) + + @par Glossary: + - ETE - Embedded Trace Extension. + - ETM - Embedded Trace Macrocell. **/ =20 #ifndef SSDT_CPU_TOPOLOGY_GENERATOR_H_ @@ -49,6 +55,9 @@ /// HID for a processor device. #define ACPI_HID_PROCESSOR_DEVICE "ACPI0007" =20 +/// HID for a ETM/ETE device. +#define ACPI_HID_ET_DEVICE "ARMHC500" + /// HID for a processor container device. #define ACPI_HID_PROCESSOR_CONTAINER_DEVICE "ACPI0010" =20 --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: zmBbTq3cqzC9P85WMuijD1v1x1787277AA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1694609403208100025 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The CpcToken has been incorrectly referenced in the CreateTopologyFromGicC() and always points to the CPC token in the first GICC Info object. Therefore, fix this by correctly indexing into the GicCInfo object array. Signed-off-by: Sami Mujawar Reviewed-by: Pierre Gondois --- Notes: v2: - No code change from v1 patch series. [SAMI] DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopolog= yGenerator.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/Ss= dtCpuTopologyGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTop= ologyLibArm/SsdtCpuTopologyGenerator.c index 6fbba12a010bf987797f0901a032735e8e0be598..8228c7845ac0c26ca0f319fd86a= bf89bb3bfaf50 100644 --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTo= pologyGenerator.c +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTo= pologyGenerator.c @@ -1298,7 +1298,7 @@ CreateTopologyFromGicC ( =20 // If a CPC info is associated with the // GicCinfo, create an _CPC method returning them. - if (GicCInfo->CpcToken !=3D CM_NULL_TOKEN) { + if (GicCInfo[Index].CpcToken !=3D CM_NULL_TOKEN) { Status =3D CreateAmlCpcNode (Generator, CfgMgrProtocol, &GicCInfo[In= dex], CpuNode); if (EFI_ERROR (Status)) { ASSERT_EFI_ERROR (Status); --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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