[edk2-devel] [PATCH v2 07/11] ShellPkg: Acpiview: Update MADT parser for TRBE interrupt

Sami Mujawar posted 11 patches 5 months, 2 weeks ago
There is a newer version of this series
[edk2-devel] [PATCH v2 07/11] ShellPkg: Acpiview: Update MADT parser for TRBE interrupt
Posted by Sami Mujawar 5 months, 2 weeks ago
ACPI 6.5 introduces a new filed to the MADT GICC
structure to specify the TRBE interrupt. The TRBE
interrupt is a Processor Private interrupt (PPI)
and is used to specify a platform-specific
interrupt to signal TRBE events.

Therefore, update the MADT GICC structure parser
to parse the new TRBE interrupt field. Also, add
validations to check that the TRBE interrupt is
within the PPI interrupt range.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---

Notes:
    v2:
     - No code change from v1 patch series.      [SAMI]

 ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c | 48 +++++++++++++++++++-
 1 file changed, 46 insertions(+), 2 deletions(-)

diff --git a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c
index 41edcb9ffd1da90893c04e8284ea3317a9e3b45a..3a4f246347f8ad3489fda083e3268e73baa9bc92 100644
--- a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c
+++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c
@@ -1,7 +1,7 @@
 /** @file
   MADT table parser
 
-  Copyright (c) 2016 - 2020, ARM Limited. All rights reserved.
+  Copyright (c) 2016 - 2023, ARM Limited. All rights reserved.
   Copyright (c) 2022, AMD Incorporated. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -97,6 +97,48 @@ ValidateSpeOverflowInterrupt (
   }
 }
 
+/**
+  This function validates the TRBE Interrupt in the GICC.
+
+  @param [in] Ptr     Pointer to the start of the field data.
+  @param [in] Context Pointer to context specific information e.g. this
+                      could be a pointer to the ACPI table header.
+**/
+STATIC
+VOID
+EFIAPI
+ValidateTrbeInterrupt (
+  IN UINT8  *Ptr,
+  IN VOID   *Context
+  )
+{
+  UINT16  TrbeInterrupt;
+
+  TrbeInterrupt = *(UINT16 *)Ptr;
+
+  // SPE not supported by this processor
+  if (TrbeInterrupt == 0) {
+    return;
+  }
+
+  if ((TrbeInterrupt < ARM_PPI_ID_MIN) ||
+      ((TrbeInterrupt > ARM_PPI_ID_MAX) &&
+       (TrbeInterrupt < ARM_PPI_ID_EXTENDED_MIN)) ||
+      (TrbeInterrupt > ARM_PPI_ID_EXTENDED_MAX))
+  {
+    IncrementErrorCount ();
+    Print (
+      L"\nERROR: TRBE Interrupt ID of %d is not in the allowed PPI ID "
+      L"ranges of %d-%d or %d-%d (for GICv3.1 or later).",
+      TrbeInterrupt,
+      ARM_PPI_ID_MIN,
+      ARM_PPI_ID_MAX,
+      ARM_PPI_ID_EXTENDED_MIN,
+      ARM_PPI_ID_EXTENDED_MAX
+      );
+  }
+}
+
 /**
   An ACPI_PARSER array describing the GICC Interrupt Controller Structure.
 **/
@@ -122,7 +164,9 @@ STATIC CONST ACPI_PARSER  GicCParser[] = {
     NULL },
   { L"Reserved",                         1, 77, L"0x%x",  NULL, NULL, NULL, NULL },
   { L"SPE overflow Interrupt",           2, 78, L"0x%x",  NULL, NULL,
-    ValidateSpeOverflowInterrupt, NULL }
+    ValidateSpeOverflowInterrupt, NULL },
+  { L"TRBE Interrupt",                   2, 80, L"0x%x",  NULL, NULL,
+    ValidateTrbeInterrupt, NULL }
 };
 
 /**
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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Re: [edk2-devel] [PATCH v2 07/11] ShellPkg: Acpiview: Update MADT parser for TRBE interrupt
Posted by Gao, Zhichao 5 months, 1 week ago
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>

Thanks,
Zhichao

> -----Original Message-----
> From: Sami Mujawar <sami.mujawar@arm.com>
> Sent: Wednesday, September 13, 2023 8:50 PM
> To: devel@edk2.groups.io
> Cc: Sami Mujawar <sami.mujawar@arm.com>; Gao, Zhichao
> <zhichao.gao@intel.com>; pierre.gondois@arm.com;
> Anshuman.Khandual@arm.com; Matteo.Carlini@arm.com;
> Akanksha.Jain2@arm.com; Sibel.Allinson@arm.com; jeshuas@nvidia.com;
> nd@arm.com
> Subject: [PATCH v2 07/11] ShellPkg: Acpiview: Update MADT parser for TRBE
> interrupt
> 
> ACPI 6.5 introduces a new filed to the MADT GICC structure to specify the
> TRBE interrupt. The TRBE interrupt is a Processor Private interrupt (PPI) and is
> used to specify a platform-specific interrupt to signal TRBE events.
> 
> Therefore, update the MADT GICC structure parser to parse the new TRBE
> interrupt field. Also, add validations to check that the TRBE interrupt is within
> the PPI interrupt range.
> 
> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
> ---
> 
> Notes:
>     v2:
>      - No code change from v1 patch series.      [SAMI]
> 
> 
> ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.
> c | 48 +++++++++++++++++++-
>  1 file changed, 46 insertions(+), 2 deletions(-)
> 
> diff --git
> a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPars
> er.c
> b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPars
> er.c
> index
> 41edcb9ffd1da90893c04e8284ea3317a9e3b45a..3a4f246347f8ad3489fda083e3
> 268e73baa9bc92 100644
> ---
> a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPars
> er.c
> +++
> b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPars
> +++ er.c
> @@ -1,7 +1,7 @@
>  /** @file
>    MADT table parser
> 
> -  Copyright (c) 2016 - 2020, ARM Limited. All rights reserved.
> +  Copyright (c) 2016 - 2023, ARM Limited. All rights reserved.
>    Copyright (c) 2022, AMD Incorporated. All rights reserved.
>    SPDX-License-Identifier: BSD-2-Clause-Patent
> 
> @@ -97,6 +97,48 @@ ValidateSpeOverflowInterrupt (
>    }
>  }
> 
> +/**
> +  This function validates the TRBE Interrupt in the GICC.
> +
> +  @param [in] Ptr     Pointer to the start of the field data.
> +  @param [in] Context Pointer to context specific information e.g. this
> +                      could be a pointer to the ACPI table header.
> +**/
> +STATIC
> +VOID
> +EFIAPI
> +ValidateTrbeInterrupt (
> +  IN UINT8  *Ptr,
> +  IN VOID   *Context
> +  )
> +{
> +  UINT16  TrbeInterrupt;
> +
> +  TrbeInterrupt = *(UINT16 *)Ptr;
> +
> +  // SPE not supported by this processor  if (TrbeInterrupt == 0) {
> +    return;
> +  }
> +
> +  if ((TrbeInterrupt < ARM_PPI_ID_MIN) ||
> +      ((TrbeInterrupt > ARM_PPI_ID_MAX) &&
> +       (TrbeInterrupt < ARM_PPI_ID_EXTENDED_MIN)) ||
> +      (TrbeInterrupt > ARM_PPI_ID_EXTENDED_MAX))
> +  {
> +    IncrementErrorCount ();
> +    Print (
> +      L"\nERROR: TRBE Interrupt ID of %d is not in the allowed PPI ID "
> +      L"ranges of %d-%d or %d-%d (for GICv3.1 or later).",
> +      TrbeInterrupt,
> +      ARM_PPI_ID_MIN,
> +      ARM_PPI_ID_MAX,
> +      ARM_PPI_ID_EXTENDED_MIN,
> +      ARM_PPI_ID_EXTENDED_MAX
> +      );
> +  }
> +}
> +
>  /**
>    An ACPI_PARSER array describing the GICC Interrupt Controller Structure.
>  **/
> @@ -122,7 +164,9 @@ STATIC CONST ACPI_PARSER  GicCParser[] = {
>      NULL },
>    { L"Reserved",                         1, 77, L"0x%x",  NULL, NULL, NULL, NULL },
>    { L"SPE overflow Interrupt",           2, 78, L"0x%x",  NULL, NULL,
> -    ValidateSpeOverflowInterrupt, NULL }
> +    ValidateSpeOverflowInterrupt, NULL },
> +  { L"TRBE Interrupt",                   2, 80, L"0x%x",  NULL, NULL,
> +    ValidateTrbeInterrupt, NULL }
>  };
> 
>  /**
> --
> 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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