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X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR08MB8985 X-MS-Exchange-Transport-CrossTenantHeadersStripped: AM7EUR03FT059.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: 2f20e5c6-952b-4015-1c80-08db5b8e3bcc X-Microsoft-Antispam-Message-Info: zNU6O/0fItmVU8aiihPfmWteTex7DuEnyjJPjfRqlb7dXdUznHWr9F+0ZB1wP0JVbZSSmc73RNbyoHCAbkBYAr/U9SA6f/YBSmqgLQ5VJXIBOAab3lvRhucFOsRnStwJBwA7Wt9xCdpzL/Oc4BNC6CelTaMryEpCZywYjKZdFP1BQXvRBRyqLsE7O3bHCB4U8Aed9QcTrUW+3MUgqR1VBS7qVteC+6+6HedD0OcLGMie4Z/+G1l8YkfGc2Mgy9ucKgF0x4a4Gcj7XmT5K+QoMA/T6GAb2lAOw/B2fRKSqcsUE3YqUE++iXW6y77BKbbUKIz5Z5xLzkGilaOH0Ij/v/WpAxrkqGIpPzOkR3xsWZxDJxOgplda4j1ge34XOeOw1K3z25oXBBrDjGzqcLjRrfhxgl/XeUEoI2j1N454wJuKDJSt9UIn8DYs9uMRyX/zGFKmDAGGGKRnE1BoRVBWbnNRUDhbLqmoeI6wGArkEEluNeDtiFOcWkQc9QtIFa1/x69kTWwMX8WP3nNWmG0DVl19GoDj/8LyPTzSWygchT4DxQDan5loipFD5S0eAR+tC4f5IlEN5FsQSxAW5vLsHk/Ags9owQzA67Q43/THF1Urj6lLDbCSXFFFKJOfKL1mpJNEwhiFSU9dlZoXmmmUTCHbo/5Tn1rlL4CR8qBXhQsxcTWbDtx430I+93QPY+clPAF2IlTPJlajaSq4BywUEo05e7bRL4mT1sVnv8OvuwFmXM4+lyWNN8TAsiJI46/E X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 May 2023 13:04:39.4535 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: eefe0750-97a5-4f48-9c3b-08db5b8e4489 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT059.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAVPR08MB9209 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com X-Gm-Message-State: 2WdjS8zmB2tgNkWprJxZo2olx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1684847085; bh=G71gxk6+oduuDniSnGnWnzOth+FUUOggFRji9IwkDIE=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=WDyCYngpYa5HpxKpAtSL646+jfytus6EVSNSADFMRHYQZsq3hNVOe3KJ7dCLmn4dC6w pgaGgD3Py3/17hfIzM5qsdo21cuVdTlvYxTU+BryYh9ljyCAu0xJscvioUMhEPP8xnOwV Xzgid0XtYYIc+hiZGlYKbt7wzYMYYET7QUA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1684847087832100007 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The data type used by variables representing the GicDistributorBase has been inconsistently used in the ArmGic driver and the library. The PCD defined for the GIC Distributor base address is UINT64. However, the data types for the variables used is UINTN, INTN, and at some places UINT32. Therefore, update the data types to use UINTN and add necessary typecasts when reading values from the PCD. This should then be consistent across AArch32 and AArch64 builds. Signed-off-by: Sami Mujawar --- ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c | 4 ++-- ArmPkg/Drivers/ArmGic/ArmGicLib.c | 12 ++++++------ ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c | 4 ++-- ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c | 4 ++-- ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c | 4 ++-- ArmPkg/Include/Library/ArmGicLib.h | 18 +++++++++--------- 6 files changed, 23 insertions(+), 23 deletions(-) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c b/ArmPkg/Drivers/ArmGi= c/ArmGicCommonDxe.c index d560c42fc9f3d5e86c2aece504102f43cb841877..9ac073db36ce92fc14de71e9a26= 4059afd63d729 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c @@ -1,6 +1,6 @@ /*++ =20 -Copyright (c) 2013-2017, ARM Ltd. All rights reserved.
+Copyright (c) 2013-2021, Arm Ltd. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -61,7 +61,7 @@ GicGetDistributorIcfgBaseAndBit ( =20 RegIndex =3D Source / ARM_GIC_ICDICFR_F_STRIDE; // NOTE: truncation i= s significant Field =3D Source % ARM_GIC_ICDICFR_F_STRIDE; - *RegAddress =3D PcdGet64 (PcdGicDistributorBase) + *RegAddress =3D (UINTN)PcdGet64 (PcdGicDistributorBase) + ARM_GIC_ICDICFR + (ARM_GIC_ICDICFR_BYTES * RegIndex); *Config1Bit =3D ((Field * ARM_GIC_ICDICFR_F_WIDTH) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmG= icLib.c index dd3670c7ccbb18586bb28f4ac02514055471529f..6e44e89390fcdaa89302d6505f7= 5c43c84ce3535 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c @@ -117,7 +117,7 @@ ArmGicGetInterfaceIdentification ( UINTN EFIAPI ArmGicGetMaxNumInterrupts ( - IN INTN GicDistributorBase + IN UINTN GicDistributorBase ) { UINTN ItLines; @@ -133,10 +133,10 @@ ArmGicGetMaxNumInterrupts ( VOID EFIAPI ArmGicSendSgiTo ( - IN INTN GicDistributorBase, - IN INTN TargetListFilter, - IN INTN CPUTargetList, - IN INTN SgiId + IN UINTN GicDistributorBase, + IN INTN TargetListFilter, + IN INTN CPUTargetList, + IN INTN SgiId ) { MmioWrite32 ( @@ -390,7 +390,7 @@ ArmGicIsInterruptEnabled ( VOID EFIAPI ArmGicDisableDistributor ( - IN INTN GicDistributorBase + IN UINTN GicDistributorBase ) { // Disable Gic Distributor diff --git a/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c b/ArmPkg/Drivers/ArmGi= c/ArmGicNonSecLib.c index aa4f0e2123929e0a86626b0f068d474065ca67fb..c17cbe041e8a9ceb8c8c3a6b953= ff88b75f6f206 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2011-2015, ARM Limited. All rights reserved. +* Copyright (c) 2011-2021, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -13,7 +13,7 @@ VOID EFIAPI ArmGicEnableDistributor ( - IN INTN GicDistributorBase + IN UINTN GicDistributorBase ) { ARM_GIC_ARCH_REVISION Revision; diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c b/ArmPkg/Drivers/Arm= Gic/GicV2/ArmGicV2Dxe.c index 25290342bde4de907bef050d6f1bdd6e03f8dccc..b7d67d830e46b663e4054990e74= 56660fb22cda9 100644 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c +++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c @@ -2,7 +2,7 @@ =20 Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.
Portions copyright (c) 2010, Apple Inc. All rights reserved.
-Portions copyright (c) 2011-2017, ARM Ltd. All rights reserved.
+Portions copyright (c) 2011-2021, Arm Ltd. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -401,7 +401,7 @@ GicV2DxeInitialize ( ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid= ); =20 mGicInterruptInterfaceBase =3D PcdGet64 (PcdGicInterruptInterfaceBase); - mGicDistributorBase =3D PcdGet64 (PcdGicDistributorBase); + mGicDistributorBase =3D (UINTN)PcdGet64 (PcdGicDistributorBase); mGicNumInterrupts =3D ArmGicGetMaxNumInterrupts (mGicDistributo= rBase); =20 for (Index =3D 0; Index < mGicNumInterrupts; Index++) { diff --git a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c b/ArmPkg/Drivers/Arm= Gic/GicV3/ArmGicV3Dxe.c index b1f0cd48c752666e8b01eb5a25f8639e49213119..30c3fcbc3eee8e4f41f68a669cb= c59650c12ca89 100644 --- a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c +++ b/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2011-2018, ARM Limited. All rights reserved. +* Copyright (c) 2011-2021, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -381,7 +381,7 @@ GicV3DxeInitialize ( // the system. ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid= ); =20 - mGicDistributorBase =3D PcdGet64 (PcdGicDistributorBase); + mGicDistributorBase =3D (UINTN)PcdGet64 (PcdGicDistributorBase); mGicRedistributorsBase =3D PcdGet64 (PcdGicRedistributorsBase); mGicNumInterrupts =3D ArmGicGetMaxNumInterrupts (mGicDistributorBas= e); =20 diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/Ar= mGicLib.h index 4ab670967598f21852e46f72116bf4c78ca7dd44..72dbd1ca8d626c69d9bb8727d77= fd34b4ab3af28 100644 --- a/ArmPkg/Include/Library/ArmGicLib.h +++ b/ArmPkg/Include/Library/ArmGicLib.h @@ -121,7 +121,7 @@ VOID EFIAPI ArmGicSetupNonSecure ( IN UINTN MpId, - IN INTN GicDistributorBase, + IN UINTN GicDistributorBase, IN INTN GicInterruptInterfaceBase ); =20 @@ -148,28 +148,28 @@ ArmGicDisableInterruptInterface ( VOID EFIAPI ArmGicEnableDistributor ( - IN INTN GicDistributorBase + IN UINTN GicDistributorBase ); =20 VOID EFIAPI ArmGicDisableDistributor ( - IN INTN GicDistributorBase + IN UINTN GicDistributorBase ); =20 UINTN EFIAPI ArmGicGetMaxNumInterrupts ( - IN INTN GicDistributorBase + IN UINTN GicDistributorBase ); =20 VOID EFIAPI ArmGicSendSgiTo ( - IN INTN GicDistributorBase, - IN INTN TargetListFilter, - IN INTN CPUTargetList, - IN INTN SgiId + IN UINTN GicDistributorBase, + IN INTN TargetListFilter, + IN INTN CPUTargetList, + IN INTN SgiId ); =20 /* @@ -251,7 +251,7 @@ VOID EFIAPI ArmGicV2SetupNonSecure ( IN UINTN MpId, - IN INTN GicDistributorBase, + IN UINTN GicDistributorBase, IN INTN GicInterruptInterfaceBase ); =20 --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C X-Received: from nebula.arm.com (40.67.248.234) by AM7EUR03FT004.mail.protection.outlook.com (100.127.140.210) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6433.14 via Frontend Transport; Tue, 23 May 2023 13:04:28 +0000 X-Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX04.Arm.com (10.251.24.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Tue, 23 May 2023 13:04:23 +0000 X-Received: from E114225.Arm.com (10.1.196.36) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server id 15.1.2507.23 via Frontend Transport; Tue, 23 May 2023 13:04:23 +0000 From: "Sami Mujawar" To: CC: Sami Mujawar , , , , , , , , , , Subject: [edk2-devel] [PATCH v1 02/12] ArmPkg: Fix data type used for GicInterruptInterfaceBase Date: Tue, 23 May 2023 14:04:11 +0100 Message-ID: <20230523130421.10804-3-sami.mujawar@arm.com> In-Reply-To: <20230523130421.10804-1-sami.mujawar@arm.com> References: <20230523130421.10804-1-sami.mujawar@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT004:EE_|DB8PR08MB5497:EE_|DBAEUR03FT028:EE_|AS8PR08MB9244:EE_ X-MS-Office365-Filtering-Correlation-Id: fe800745-caf2-4d06-c03c-08db5b8e4774 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com X-Gm-Message-State: qSc2EEL8OIcvDStqsesTbOzPx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1684847089; bh=Kqab62FrtY3dbPRQ6LeUjMGKuBhnQqiJ/kRdPFSpYv0=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=fM/gYuWue4UNR4dIABz0SWcI/81ugNivYXjPkaR+HqEtdOfHdMBYFcvXQDg0h1mIFgO aroY4oxeeCn3taZKb9yh+oqpWyCj/sKW0GeuvvxT/Y6/rb8KsrEpwTdmDIr55x3QDxEaP 4xNrWJaZyGkrTV8ZnRCTqEc3ctyDP63oky4= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1684847090533100011 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The data type used by variables representing the GicInterruptInterfaceBase has been inconsistently used in the ArmGic driver and the library. The PCD defined for the GIC Interrupt interface base address is UINT64. However, the data types for the variables used is UINTN, INTN, and at some places UINT32. Therefore, update the data types to use UINTN and add necessary typecasts when reading values from the PCD. This should then be consistent across AArch32 and AArch64 builds. Signed-off-by: Sami Mujawar Reviewed-by: Ard Biesheuvel --- ArmPkg/Drivers/ArmGic/ArmGicLib.c | 13 ++++++++++--- ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c | 2 +- ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c | 6 +++--- ArmPkg/Include/Library/ArmGicLib.h | 18 +++++++++--------- 4 files changed, 23 insertions(+), 16 deletions(-) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmG= icLib.c index 6e44e89390fcdaa89302d6505f75c43c84ce3535..78edc7e76a087caa5b91d896f9b= d316d6530a668 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c @@ -104,10 +104,17 @@ GicGetCpuRedistributorBase ( return 0; } =20 +/** + Return the GIC CPU Interrupt Interface ID. + + @param GicInterruptInterfaceBase Base address of the GIC Interrupt Inte= rface. + + @retval CPU Interface Identification information. +**/ UINTN EFIAPI ArmGicGetInterfaceIdentification ( - IN INTN GicInterruptInterfaceBase + IN UINTN GicInterruptInterfaceBase ) { // Read the GIC Identification Register @@ -400,7 +407,7 @@ ArmGicDisableDistributor ( VOID EFIAPI ArmGicEnableInterruptInterface ( - IN INTN GicInterruptInterfaceBase + IN UINTN GicInterruptInterfaceBase ) { ARM_GIC_ARCH_REVISION Revision; @@ -418,7 +425,7 @@ ArmGicEnableInterruptInterface ( VOID EFIAPI ArmGicDisableInterruptInterface ( - IN INTN GicInterruptInterfaceBase + IN UINTN GicInterruptInterfaceBase ) { ARM_GIC_ARCH_REVISION Revision; diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c b/ArmPkg/Drivers/Arm= Gic/GicV2/ArmGicV2Dxe.c index b7d67d830e46b663e4054990e7456660fb22cda9..b952c3ae31c060ecbb43c0800d3= 4e57664a8262a 100644 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c +++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c @@ -400,7 +400,7 @@ GicV2DxeInitialize ( // the system. ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid= ); =20 - mGicInterruptInterfaceBase =3D PcdGet64 (PcdGicInterruptInterfaceBase); + mGicInterruptInterfaceBase =3D (UINTN)PcdGet64 (PcdGicInterruptInterface= Base); mGicDistributorBase =3D (UINTN)PcdGet64 (PcdGicDistributorBase); mGicNumInterrupts =3D ArmGicGetMaxNumInterrupts (mGicDistributo= rBase); =20 diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c b/ArmPkg/Drive= rs/ArmGic/GicV2/ArmGicV2NonSecLib.c index 85c2a920a54a1acaccb98a94b5591ce36d20697c..832f21644233655ef2f359f1e17= 5071d2a493b7c 100644 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c +++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2011-2014, ARM Limited. All rights reserved. +* Copyright (c) 2011-2021, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -13,7 +13,7 @@ VOID EFIAPI ArmGicV2EnableInterruptInterface ( - IN INTN GicInterruptInterfaceBase + IN UINTN GicInterruptInterfaceBase ) { /* @@ -26,7 +26,7 @@ ArmGicV2EnableInterruptInterface ( VOID EFIAPI ArmGicV2DisableInterruptInterface ( - IN INTN GicInterruptInterfaceBase + IN UINTN GicInterruptInterfaceBase ) { // Disable Gic Interface diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/Ar= mGicLib.h index 72dbd1ca8d626c69d9bb8727d77fd34b4ab3af28..41bbf1da6a6cbb683df4bb30c4b= 1a1762dc7814f 100644 --- a/ArmPkg/Include/Library/ArmGicLib.h +++ b/ArmPkg/Include/Library/ArmGicLib.h @@ -113,7 +113,7 @@ UINTN EFIAPI ArmGicGetInterfaceIdentification ( - IN INTN GicInterruptInterfaceBase + IN UINTN GicInterruptInterfaceBase ); =20 // GIC Secure interfaces @@ -122,7 +122,7 @@ EFIAPI ArmGicSetupNonSecure ( IN UINTN MpId, IN UINTN GicDistributorBase, - IN INTN GicInterruptInterfaceBase + IN UINTN GicInterruptInterfaceBase ); =20 VOID @@ -136,13 +136,13 @@ ArmGicSetSecureInterrupts ( VOID EFIAPI ArmGicEnableInterruptInterface ( - IN INTN GicInterruptInterfaceBase + IN UINTN GicInterruptInterfaceBase ); =20 VOID EFIAPI ArmGicDisableInterruptInterface ( - IN INTN GicInterruptInterfaceBase + IN UINTN GicInterruptInterfaceBase ); =20 VOID @@ -203,8 +203,8 @@ ArmGicEndOfInterrupt ( UINTN EFIAPI ArmGicSetPriorityMask ( - IN INTN GicInterruptInterfaceBase, - IN INTN PriorityMask + IN UINTN GicInterruptInterfaceBase, + IN INTN PriorityMask ); =20 VOID @@ -252,19 +252,19 @@ EFIAPI ArmGicV2SetupNonSecure ( IN UINTN MpId, IN UINTN GicDistributorBase, - IN INTN GicInterruptInterfaceBase + IN UINTN GicInterruptInterfaceBase ); =20 VOID EFIAPI ArmGicV2EnableInterruptInterface ( - IN INTN GicInterruptInterfaceBase + IN UINTN GicInterruptInterfaceBase ); =20 VOID EFIAPI ArmGicV2DisableInterruptInterface ( - IN INTN GicInterruptInterfaceBase + IN UINTN GicInterruptInterfaceBase ); =20 UINTN --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C X-Received: from nebula.arm.com (40.67.248.234) by AM7EUR03FT033.mail.protection.outlook.com (100.127.140.129) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6433.14 via Frontend Transport; Tue, 23 May 2023 13:04:29 +0000 X-Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX04.Arm.com (10.251.24.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Tue, 23 May 2023 13:04:24 +0000 X-Received: from E114225.Arm.com (10.1.196.36) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server id 15.1.2507.23 via Frontend Transport; Tue, 23 May 2023 13:04:24 +0000 From: "Sami Mujawar" To: CC: Sami Mujawar , , , , , , , , , , Subject: [edk2-devel] [PATCH v1 03/12] ArmPkg: Fix ArmGicSendSgiTo() parameters Date: Tue, 23 May 2023 14:04:12 +0100 Message-ID: <20230523130421.10804-4-sami.mujawar@arm.com> In-Reply-To: <20230523130421.10804-1-sami.mujawar@arm.com> References: <20230523130421.10804-1-sami.mujawar@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT033:EE_|VE1PR08MB5725:EE_|AM7EUR03FT050:EE_|DU2PR08MB7341:EE_ X-MS-Office365-Filtering-Correlation-Id: 4fae2f2b-6807-430a-2717-08db5b8e4505 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com X-Gm-Message-State: FvFIilwlrzJU9T2qiHI9tcGxx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1684847091; bh=FPsn7l8FLEroHnSIQ2WDiihy6U0QApmVhG8/TVQJnok=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=ZnYrulGwe85x2rJc7WRujjc+RR6sjP5dVX0SqHS1S0r2yxihQsqM4osUbIayyAr7c4V MfplyKMArhmfcT6VyyHqfW8tbUaP3O+ufH6QHfedxvVufI17aEgD3fIOi/0QQTbRSmayC 9q3uzgnjiCbBA5TPyqIdN//LugsETn2uCBA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1684847094495100004 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Software Generated Interrupt Register (GICD_SGIR) is a 32 bit register with the following bit assignment: TargetListFilter, bits [25:24] CPUTargetList, bits [23:16] NSATT, bit [15] SGIINTID, bits [3:0] Therefore, modify the TargetListFilter, CPUTargetList, SGI Interrupt ID parameters of the ArmGicSendSgiTo () to use UINT8 instead of INTN. Signed-off-by: Sami Mujawar --- ArmPkg/Drivers/ArmGic/ArmGicLib.c | 6 +++--- ArmPkg/Include/Library/ArmGicLib.h | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmG= icLib.c index 78edc7e76a087caa5b91d896f9bd316d6530a668..2a5e22e7b68f7c44adbf8a3f26b= 2b7ec04849b96 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c @@ -141,9 +141,9 @@ VOID EFIAPI ArmGicSendSgiTo ( IN UINTN GicDistributorBase, - IN INTN TargetListFilter, - IN INTN CPUTargetList, - IN INTN SgiId + IN UINT8 TargetListFilter, + IN UINT8 CPUTargetList, + IN UINT8 SgiId ) { MmioWrite32 ( diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/Ar= mGicLib.h index 41bbf1da6a6cbb683df4bb30c4b1a1762dc7814f..1b879708f84315035723d77c530= 1279c8130bd51 100644 --- a/ArmPkg/Include/Library/ArmGicLib.h +++ b/ArmPkg/Include/Library/ArmGicLib.h @@ -167,9 +167,9 @@ VOID EFIAPI ArmGicSendSgiTo ( IN UINTN GicDistributorBase, - IN INTN TargetListFilter, - IN INTN CPUTargetList, - IN INTN SgiId + IN UINT8 TargetListFilter, + IN UINT8 CPUTargetList, + IN UINT8 SgiId ); =20 /* --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com X-Gm-Message-State: 4RfNxPgYuUDSYwQsVKPw2Vvyx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1684847095; bh=klCTBtmIIEfSygY+ye20KGymuC/WBIFNl1VK11WYOOs=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=smAwI6LuNFy13Ve3crhnz2ir/yt2cKKsA0XOKt6lcRIkQErrEcC4pKyyk6eCNFuEBBX +0wtOc+BT/P9PnoKPOGNZaS/RbemlE6vt4rQGa4TA+cG/N/D32vaLOsOPMQk1pjjGVYPH 0+ahcFeNihCWng1AznGHy/Do6UoR87XhaJg= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1684847096433100007 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" According to edk2 coding standard specification, Non-Boolean comparisons must use a compare operator (=3D=3D, !=3D, >, < >=3D, <=3D). See Section 5.7.2.1 at https://edk2-docs.gitbook.io/ edk-ii-c-coding-standards-specification/5_source_files/ 57_c_programming Therefore, fix the comparison in ArmGicEnableDistributor() Signed-off-by: Sami Mujawar --- ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c b/ArmPkg/Drivers/ArmGi= c/ArmGicNonSecLib.c index c17cbe041e8a9ceb8c8c3a6b953ff88b75f6f206..1ca66a40940434d6d89e243650f= 3e81aa3f588b5 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c @@ -26,7 +26,10 @@ ArmGicEnableDistributor ( if (Revision =3D=3D ARM_GIC_ARCH_REVISION_2) { MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1); } else { - if (MmioRead32 (GicDistributorBase + ARM_GIC_ICDDCR) & ARM_GIC_ICDDCR_= ARE) { + if ((MmioRead32 ( + GicDistributorBase + ARM_GIC_ICDDCR + ) & ARM_GIC_ICDDCR_ARE) !=3D 0) + { MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x2); } else { MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1); --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com X-Gm-Message-State: u3qBdoxlyeeFOMSCcJgEyi9fx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1684847095; bh=qkYb4FqPvK4CjdxlXiQvdEzFXWA0pRHkK9cuq5V7DwY=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=djZqiPIlxC0XyIS6fOOjb7RyzurUOvANWvxU5k+AXuMP5CpPaOTaStb08Rkxbp07wxm j5g21oHWVBK4UX89C8H2rhz0DM5dqoRflWutnrHqTtEsMry8wgX3GiyVEdxR7HMgDMx0p C+RMwDhBjY7OM7krFm9nq62AM57LlYgvOGg= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1684847096472100009 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The CPU Interface Identification Register (GICC_IIDR) is a 32-bit register. Since ArmGicGetInterfaceIdentification () returns the value read from the GICC_IIDR register, update the return type for this function to UINT32. Signed-off-by: Sami Mujawar --- ArmPkg/Drivers/ArmGic/ArmGicLib.c | 2 +- ArmPkg/Include/Library/ArmGicLib.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmG= icLib.c index 2a5e22e7b68f7c44adbf8a3f26b2b7ec04849b96..df61e3aad4a7899eaa888cb248a= d2a285c7f317d 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c @@ -111,7 +111,7 @@ GicGetCpuRedistributorBase ( =20 @retval CPU Interface Identification information. **/ -UINTN +UINT32 EFIAPI ArmGicGetInterfaceIdentification ( IN UINTN GicInterruptInterfaceBase diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/Ar= mGicLib.h index 1b879708f84315035723d77c5301279c8130bd51..49ea3422270bec90fa161593c14= c7095b7598c53 100644 --- a/ArmPkg/Include/Library/ArmGicLib.h +++ b/ArmPkg/Include/Library/ArmGicLib.h @@ -110,7 +110,7 @@ // Bit Mask for #define ARM_GIC_ICCIAR_ACKINTID 0x3FF =20 -UINTN +UINT32 EFIAPI ArmGicGetInterfaceIdentification ( IN UINTN GicInterruptInterfaceBase --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com X-Gm-Message-State: iTSnkmdJf1mfACXhlno3TBw0x1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1684847084; bh=nc5CrE3LM8uESGU51Itg9phgyTqSwsKOpBFSVKS14dc=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=Au/AtpnPVtNG+xGeYxq3po7VksDfTDlc7yoilnLreFM8E137ktoeLC0nKYdYNYMjNNT MaAp4qEWjrA4+rX26zHtUDieLKIEa6LYICmzoxZnI3cOUHp8NhNIwkjjCLyuvHsNEZHFC gIBYYqkmFub3DaU0q/kFgde0Br269dj3/+A= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1684847085864100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Although the maximum interrupt ID on GicV2 is 10bit and for GicV3/4 is 24bit, and that the IAR and EOIR registers of the Gic CPU interface are 32 bit; the typedef HARDWARE_INTERRUPT_SOURCE is defined as UINTN in EmbeddedPkg\Include\Protocol\HardwareInterrupt.h Therefore, use UINTN for Gic Interrupt variables and use appropriate typecasts wherever needed. Signed-off-by: Sami Mujawar --- ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c b/ArmPkg/Drivers/Arm= Gic/GicV2/ArmGicV2Dxe.c index b952c3ae31c060ecbb43c0800d34e57664a8262a..fb40f56ff9231f3a28c3d90939b= fd25ac3432f89 100644 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c +++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c @@ -162,7 +162,7 @@ GicV2IrqInterruptHandler ( IN EFI_SYSTEM_CONTEXT SystemContext ) { - UINT32 GicInterrupt; + UINTN GicInterrupt; HARDWARE_INTERRUPT_HANDLER InterruptHandler; =20 GicInterrupt =3D ArmGicV2AcknowledgeInterrupt (mGicInterruptInterfaceBas= e); @@ -349,8 +349,8 @@ GicV2ExitBootServicesEvent ( IN VOID *Context ) { - UINTN Index; - UINT32 GicInterrupt; + UINTN Index; + UINTN GicInterrupt; =20 // Disable all the interrupts for (Index =3D 0; Index < mGicNumInterrupts; Index++) { --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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Tue, 23 May 2023 13:04:26 +0000 From: "Sami Mujawar" To: CC: Sami Mujawar , , , , , , , , , , Subject: [edk2-devel] [PATCH v1 07/12] ArmPkg: Fix return value for ArmGicV2AcknowledgeInterrupt Date: Tue, 23 May 2023 14:04:16 +0100 Message-ID: <20230523130421.10804-8-sami.mujawar@arm.com> In-Reply-To: <20230523130421.10804-1-sami.mujawar@arm.com> References: <20230523130421.10804-1-sami.mujawar@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT059:EE_|AS8PR08MB9480:EE_|DBAEUR03FT048:EE_|DBBPR08MB6123:EE_ X-MS-Office365-Filtering-Correlation-Id: a6d9c0a1-1061-443b-65ce-08db5b8e4612 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: GPCFtrBYAl6Prv3t4xVg4Oq9vq8M2PBTS+cEen0NgtXDq4awHXKjs33Gm+opoo6tlUzlXyvxNGyjF3uBArgioIVVzxSjllyK7SfP/cdV612UjzbgBfTT4ozwS7Mov1UsH5TLT+BURuAi2ZhEf91U8VGC5yOiABRCs6ewfW32yQfI6ZnkuJhmCqLoQWUJBJkuhsaerTEWvytvvro4tBLIiJEBw2Qn13emGqkd5poI5fS5HACPm0uOgpoH/gs0g4fih/JBHli22UZw4dui2KH5o5XrjetKqyJxN3gA6jWE5IsiPYPnEuoxulKqoJ7O6buG8HFtq2ERlqOGTjqsTZnae7wsgW+BHX7ZJASVgxpYtjIQARsMQnkXsJ5/GB7Zsf7KNgdCkJL90gbaj0YrdWy2TnJ5oLkFaXY149g7AleJHutWygSko2pjREXq8eLAO42DzcaPAhTjDAK2mCqy1XCAZjIGihdGf2gtxKko2bL6txnCw3uTc1KjC9mKW2YlyPTyebVBzY7AHMcRLOEBgR2G51eyBQGiZWQekcFBVNcvsyK6/xbBOKOOrQvqxnMoItEoD40sdhCAILzJZvZZklxkA2ijCRQJrc9LDCponJeTez6+Bu0hXUKZQ7t2abULpDz/W2CNfNlOM8Tcm5yoZ8pdxZR3TyKDFkxDc70HVe9krXS+VGOT6q0At5XdBFV69Ggy9P9JX0OlKU6gWn5SWUl1rPxDvTbW1om3VjcMFpwJRi7qC5+pt7kknwYsbSr5zNtXYdwFqm4rNc6VC8WscWVdNA== X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(136003)(396003)(376002)(39860400002)(346002)(451199021)(36840700001)(46966006)(40470700004)(54906003)(82310400005)(41300700001)(7696005)(478600001)(19627235002)(316002)(4326008)(70586007)(6916009)(6666004)(70206006)(86362001)(5660300002)(8936002)(8676002)(44832011)(2906002)(1076003)(26005)(356005)(81166007)(82740400003)(186003)(4744005)(40460700003)(426003)(336012)(83380400001)(40480700001)(2616005)(36756003)(36860700001)(47076005)(36900700001);DIR:OUT;SFP:1101; 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com X-Gm-Message-State: 5oOhGAWdXiRanuTSd5blnwwMx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1684847092; bh=QO5cQxrl6+x/bWJbRIziBMurXBzlQ8hIve5MUJnx1/Y=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=guFAjc65rlaAz1dnQhi1ZkTWK3Jayz8dh1xhG2LL3F4zFbL+UB9TPHb1Js48ddFy/D3 9aiMHV31QVz53+vlhKI6mqXS3tsDlZPeljyoG//grn/Jv5lOrQUqaKSZNt/VkMZfrHv/o k8wxDAtI3I1gg0gy6DV8p+c0SUT4Fbxvnpc= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1684847093805100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The IAR register of the Gic CPU interface is 32 bit, while the value returned by ArmGicV2AcknowledgeInterrupt() is UINTN. Therefore, typecast the return value to UINTN before returning. Signed-off-by: Sami Mujawar --- ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c b/ArmPkg/Drivers/Arm= Gic/GicV2/ArmGicV2Lib.c index f403bec367b5254c248e620e56471904e520f9f2..80115b243afabd5e4faad88089a= f738b19ce4cd1 100644 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c +++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c @@ -16,7 +16,7 @@ ArmGicV2AcknowledgeInterrupt ( ) { // Read the Interrupt Acknowledge Register - return MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR); + return (UINTN)MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR); } =20 VOID --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com X-Gm-Message-State: UcWdLjF5tOb3tcAtKxmSJX4ox1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1684847084; bh=DHOexlWAluX0SeryU/hdipc68k+dIGN2ke8Q+v1wbzs=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=MdzJm/M38k1budQzSsTowwEbqznbvoBvUQ0B0IvAn0bzkuRWEyWNC+0gNNN1w9WNEiy riN1vmr6JOSd+k97cSgOuRz7WhX5r/guNY2rPNYGAccefKyUe+kweTJLlZPR/NfQ3WDxY PUu86HmJ15O0gRmtI0BWQfcP9KYIjVjFR+g= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1684847086012100002 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The EIOR register of the Gic CPU interface is a 32 bit register. However, the HARDWARE_INTERRUPT_SOURCE used to represent the interrupt source (Interrupt ID) is typedefed as UINTN, see EmbeddedPkg\Include\Protocol\HardwareInterrupt.h Therfore, typecast the interrupt ID (Source) value to UINT32 before setting the EOIR register. Also, add an assert to check that the value does not exceed 32 bits. Signed-off-by: Sami Mujawar --- ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c b/ArmPkg/Drivers/Arm= Gic/GicV2/ArmGicV2Lib.c index 80115b243afabd5e4faad88089af738b19ce4cd1..e98cd9705616e7a8dfc7aaba7c8= 0b176f8f6d0c9 100644 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c +++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c @@ -7,6 +7,7 @@ **/ =20 #include +#include #include =20 UINTN @@ -26,5 +27,6 @@ ArmGicV2EndOfInterrupt ( IN UINTN Source ) { - MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Source); + ASSERT (Source < MAX_UINT32); + MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, (UINT32)Source= ); } --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com X-Gm-Message-State: SmMOQjBYuoTjoOycCl8b2XBjx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1684847093; bh=ye74D/FRB6lnRTEXEWtsfNDXrsFJ6o0m2Al5laVebiE=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=hfbeT3cfZH+7prFmx+Ze9a6bm/V+YEotqpTvVAaXs3mxfDdRuxbVFE4sN/LW8CgULhs T3gcmHL02VhfIi1qf3wGEzkerfUPuu7mVgFQ4/d60YDXQYP7TRo0pu0YPoHx0zhGG4wSt UfkbYvsvmbhinPvDBz4IcOUY47H4oIS5zzg= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1684847094477100003 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The IrqInterruptHandler () and ExitBootServicesEvent () function declarations were unused. Therefore, remove these declarations. Signed-off-by: Sami Mujawar --- ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c b/ArmPkg/Drivers/ArmGi= c/ArmGicCommonDxe.c index 9ac073db36ce92fc14de71e9a264059afd63d729..26c3a06761d197c0047f9eee357= 25b488ec2a132 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c @@ -8,20 +8,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent =20 #include "ArmGicDxe.h" =20 -VOID -EFIAPI -IrqInterruptHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_SYSTEM_CONTEXT SystemContext - ); - -VOID -EFIAPI -ExitBootServicesEvent ( - IN EFI_EVENT Event, - IN VOID *Context - ); - // Making this global saves a few bytes in image size EFI_HANDLE gHardwareInterruptHandle =3D NULL; =20 --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com X-Gm-Message-State: dkgtKSShAlJc0tQhmNfSkQP8x1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1684847095; bh=e7ax0zzvDPdwzg03RDPNlM6IG2acKxBvVLOgryr+8jk=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=edFyhrSjgc3sZP4bLCv5YPBtboDYm1G22zcmCLRq6CapvglDbaoFpkzgLj+++p6klHt /dOGstB1T3BFBQwkA5Zc5WY1/QydR9acSKpOa4Woao11ue7JQeTPM1ujPK31AcCS5cXox 69BN4EYnaZkwP1tlHyV4ZWjEEwEO9XxCM8Q= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1684847096476100010 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" GICD_SGIR is a 32-bit register, of which INTID is bits [3:0] and Bits [14:4] is RES0. Since SgiId parameter in the function ArmGicSendSgiTo () is UINT8, mask unused bits of SgiId before writing to the GICD_SGIR register to prevent accidental setting of the RES0 bits. Signed-off-by: Sami Mujawar Reviewed-by: Ard Biesheuvel --- ArmPkg/Drivers/ArmGic/ArmGicLib.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmG= icLib.c index df61e3aad4a7899eaa888cb248ad2a285c7f317d..0127cca3bf0567bc80702f415e9= cbb9bd2709fbc 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2011-2021, Arm Limited. All rights reserved. +* Copyright (c) 2011-2023, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -148,7 +148,9 @@ ArmGicSendSgiTo ( { MmioWrite32 ( GicDistributorBase + ARM_GIC_ICDSGIR, - ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | Sg= iId + ((TargetListFilter & 0x3) << 24) | + ((CPUTargetList & 0xFF) << 16) | + (SgiId & 0xF) ); } =20 --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com X-Gm-Message-State: oYMGvESvTe0GMp2Oq215vJE8x1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1684847087; bh=ZJ5zsBuiHdlP1RXF3N8r9HY7X28MzXjJxXbQGOX30z8=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=RjEW4i/nI8WI088eWaAD2It1lcPiQNzF68xS8ntbeuC5AVC01qD2qZb7NATI8Lervex beGU7MeCa1tpeHkRTqOx0y/E/TZ29bBlcbABmta2tj4bx0t0uB5gsg0irMUhnX0fDWFve BP1o4lIwosJb7sbgzunvWUNVhkqiuJvVnFo= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1684847088475100009 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" According to the GIC architecture version 3 and 4 specification, the maximum number of INTID bits supported in the CPU interface is 24. Considering this the RegShift variable is not required to be more than 8 bits. Therefore, make the RegShift variable type to UINT8. Also add necessary typecasts when calculating the RegOffset and RegShift values. Signed-off-by: Sami Mujawar --- ArmPkg/Drivers/ArmGic/ArmGicLib.c | 24 ++++++++++---------- ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c | 8 +++---- 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmG= icLib.c index 0127cca3bf0567bc80702f415e9cbb9bd2709fbc..8f3315d76f6f2b28a551d734009= 38430ff3e23c7 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c @@ -228,13 +228,13 @@ ArmGicSetInterruptPriority ( ) { UINT32 RegOffset; - UINTN RegShift; + UINT8 RegShift; ARM_GIC_ARCH_REVISION Revision; UINTN GicCpuRedistributorBase; =20 // Calculate register offset and bit position - RegOffset =3D Source / 4; - RegShift =3D (Source % 4) * 8; + RegOffset =3D (UINT32)(Source / 4); + RegShift =3D (UINT8)((Source % 4) * 8); =20 Revision =3D ArmGicGetSupportedArchRevision (); if ((Revision =3D=3D ARM_GIC_ARCH_REVISION_2) || @@ -272,13 +272,13 @@ ArmGicEnableInterrupt ( ) { UINT32 RegOffset; - UINTN RegShift; + UINT8 RegShift; ARM_GIC_ARCH_REVISION Revision; UINTN GicCpuRedistributorBase; =20 // Calculate enable register offset and bit position - RegOffset =3D Source / 32; - RegShift =3D Source % 32; + RegOffset =3D (UINT32)(Source / 32); + RegShift =3D (UINT8)(Source % 32); =20 Revision =3D ArmGicGetSupportedArchRevision (); if ((Revision =3D=3D ARM_GIC_ARCH_REVISION_2) || @@ -317,13 +317,13 @@ ArmGicDisableInterrupt ( ) { UINT32 RegOffset; - UINTN RegShift; + UINT8 RegShift; ARM_GIC_ARCH_REVISION Revision; UINTN GicCpuRedistributorBase; =20 // Calculate enable register offset and bit position - RegOffset =3D Source / 32; - RegShift =3D Source % 32; + RegOffset =3D (UINT32)(Source / 32); + RegShift =3D (UINT8)(Source % 32); =20 Revision =3D ArmGicGetSupportedArchRevision (); if ((Revision =3D=3D ARM_GIC_ARCH_REVISION_2) || @@ -361,14 +361,14 @@ ArmGicIsInterruptEnabled ( ) { UINT32 RegOffset; - UINTN RegShift; + UINT8 RegShift; ARM_GIC_ARCH_REVISION Revision; UINTN GicCpuRedistributorBase; UINT32 Interrupts; =20 // Calculate enable register offset and bit position - RegOffset =3D Source / 32; - RegShift =3D Source % 32; + RegOffset =3D (UINT32)(Source / 32); + RegShift =3D (UINT8)(Source % 32); =20 Revision =3D ArmGicGetSupportedArchRevision (); if ((Revision =3D=3D ARM_GIC_ARCH_REVISION_2) || diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c b/ArmPkg/Drivers/Arm= Gic/GicV2/ArmGicV2Dxe.c index fb40f56ff9231f3a28c3d90939bfd25ac3432f89..ba43150fe57015994573d82c88d= 6a8d9f3174533 100644 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c +++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c @@ -2,7 +2,7 @@ =20 Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.
Portions copyright (c) 2010, Apple Inc. All rights reserved.
-Portions copyright (c) 2011-2021, Arm Ltd. All rights reserved.
+Portions copyright (c) 2011-2023, Arm Ltd. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -393,7 +393,7 @@ GicV2DxeInitialize ( EFI_STATUS Status; UINTN Index; UINT32 RegOffset; - UINTN RegShift; + UINT8 RegShift; UINT32 CpuTarget; =20 // Make sure the Interrupt Controller Protocol is not already installed = in @@ -408,8 +408,8 @@ GicV2DxeInitialize ( GicV2DisableInterruptSource (&gHardwareInterruptV2Protocol, Index); =20 // Set Priority - RegOffset =3D Index / 4; - RegShift =3D (Index % 4) * 8; + RegOffset =3D (UINT32)(Index / 4); + RegShift =3D (UINT8)((Index % 4) * 8); MmioAndThenOr32 ( mGicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset), ~(0xff << RegShift), --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C X-Received: from nebula.arm.com (40.67.248.234) by AM7EUR03FT051.mail.protection.outlook.com (100.127.140.64) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6433.14 via Frontend Transport; Tue, 23 May 2023 13:04:33 +0000 X-Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX04.Arm.com (10.251.24.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Tue, 23 May 2023 13:04:29 +0000 X-Received: from E114225.Arm.com (10.1.196.36) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server id 15.1.2507.23 via Frontend Transport; Tue, 23 May 2023 13:04:29 +0000 From: "Sami Mujawar" To: CC: Sami Mujawar , , , , , , , , , , Subject: [edk2-devel] [PATCH v1 12/12] ArmPkg: Fix ArmGicAcknowledgeInterrupt () for GICv3 Date: Tue, 23 May 2023 14:04:21 +0100 Message-ID: <20230523130421.10804-13-sami.mujawar@arm.com> In-Reply-To: <20230523130421.10804-1-sami.mujawar@arm.com> References: <20230523130421.10804-1-sami.mujawar@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT051:EE_|PA4PR08MB5919:EE_|AM7EUR03FT011:EE_|AS8PR08MB7307:EE_ X-MS-Office365-Filtering-Correlation-Id: 2c791ca6-9609-4284-58cc-08db5b8e49f4 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; 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X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR08MB5919 X-MS-Exchange-Transport-CrossTenantHeadersStripped: AM7EUR03FT011.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: aeba318f-c9ae-4b34-abcd-08db5b8e4116 X-Microsoft-Antispam-Message-Info: 9MPq+zQWktE9sIzEcODDETxgLuhvZzgpkITUPPbmBvPEik+r+sUIorRG68mN4VRSGTp+cROBdEQTo2tbB4JOed1G3iYSAAx3RARLNOq6yhyXmef9cqw5a3mHdcpkBpwk8+S/xAZuRuASD/ik3YZEocgf4COcJcLFxRrmGvrxRiGReum/QdQPKwbv0t7iTs/uFRV83aM109LeDhxWkcNICTthsq/tTDymN/NEbF+EsxPC9c091fqRMWqdM9STgRxbSOnueFRccn7Bh1VLNoYRBoR95EUn89imw28QyXbMlD2k2yhfy09E5E6wz4JLa5R/c8Wzuv3WVtiNb/PzJXEtQE+HDzJybqXoAG8eSDxbQOR4X3vmSPqnlhTR0ftXgwsWmdbgsfy9dDyp6fOiyzZderrG168ey1mbD2/1h4ZAe2tnVhLzlUOgrprzCdeXGAGI8cs7DhArSLBDHWOarWozjZTeEdZp3nHwxd6crpEbNV6SXpJ/DqKKPGrEKTVbp2q82BYd4vIQdc30PMF76qXC27M0YWeBs6R2+VbxS/NuYqbN8JH+rd/PbkCTzEJO7c87B902Cwrj/1t3wS6lvBZ1Ee7AqxLp6NF7RmI3O/lpUs+aNsNQO1PMF71Xtdp4F9qkqGDIyOCyiLn4UZlkkP939B0jhXFMbeoHiknVUQWNmfANDa/j4e9nHybiaZGaZ3Ay/CFXBMrrrN+BDURtz60WH5aeP3tkEyi7pyXR7mo8tMxKlvRuyxFxX+1kUFH6CMMM X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 May 2023 13:04:48.6666 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2c791ca6-9609-4284-58cc-08db5b8e49f4 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT011.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB7307 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com X-Gm-Message-State: 8BmATQzU78vEINNbakqUE1qJx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1684847094; bh=s1HY/5mJgkTH9JHD7RGNxxoyNXdHFp+vwo2VjKMV18c=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=mNmRA9yjX3SgDw+zmtKZ28UtJpPJCjG/856NonoDqpmaYZmjugXJmdoAQ9dkqqGN28N wwXzpiDy2j/gC/PHX3i4QYR4FAbItPtbbVJFxzNvbKQMB8cfWsv0YZN3I05ICxMRcc3Sx Ji5TWJjYheRmZAv/iCLR0r3PwSHzpNZ+vGk= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1684847096466100008 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The ArmGicAcknowledgeInterrupt () returns the value returned by the Interrupt Acknowledge Register and the InterruptID separately in an out parameter. The function documents the following: 'InterruptId is returned separately from the register value because in the GICv2 the register value contains the CpuId and InterruptId while in the GICv3 the register value is only the InterruptId.' This function skips setting the InterruptId in the out parameter for GICv3. Although the return value from the function is the InterruptId for GICv3, this breaks the function usage model as the caller expects the InterruptId in the out parameter for the function. e.g. The caller may end up using the InterruptID which could potentially be an uninitialised variable value. Therefore, set the InterruptID in the function out parameter for GICv3 as well. Signed-off-by: Sami Mujawar Reviewed-by: Ard Biesheuvel --- ArmPkg/Drivers/ArmGic/ArmGicLib.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmG= icLib.c index 8f3315d76f6f2b28a551d73400938430ff3e23c7..7f4bb248fc7225bf63f0aea7204= 86092b30ced10 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c @@ -176,19 +176,17 @@ ArmGicAcknowledgeInterrupt ( ) { UINTN Value; + UINTN IntId; ARM_GIC_ARCH_REVISION Revision; =20 + ASSERT (InterruptId !=3D NULL); Revision =3D ArmGicGetSupportedArchRevision (); if (Revision =3D=3D ARM_GIC_ARCH_REVISION_2) { Value =3D ArmGicV2AcknowledgeInterrupt (GicInterruptInterfaceBase); - // InterruptId is required for the caller to know if a valid or spurio= us - // interrupt has been read - ASSERT (InterruptId !=3D NULL); - if (InterruptId !=3D NULL) { - *InterruptId =3D Value & ARM_GIC_ICCIAR_ACKINTID; - } + IntId =3D Value & ARM_GIC_ICCIAR_ACKINTID; } else if (Revision =3D=3D ARM_GIC_ARCH_REVISION_3) { Value =3D ArmGicV3AcknowledgeInterrupt (); + IntId =3D Value; } else { ASSERT_EFI_ERROR (EFI_UNSUPPORTED); // Report Spurious interrupt which is what the above controllers would @@ -196,6 +194,12 @@ ArmGicAcknowledgeInterrupt ( Value =3D 1023; } =20 + if (InterruptId !=3D NULL) { + // InterruptId is required for the caller to know if a valid or spurio= us + // interrupt has been read + *InterruptId =3D IntId; + } + return Value; } =20 --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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