From nobody Fri Apr 19 13:19:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+105160+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+105160+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1684829473; cv=none; d=zohomail.com; s=zohoarc; b=MPdkB/X6XnNrRrgyPDk1v0Vkq2eYT/Rv6XIkcGSgLCTynLfc4Fk3Af/OrazXOe8vp+qaZbZmNlut0o5AOpzJkMwFEblVvCoZkKxhkJQ1IzN9AY5UR4B4QbZWNza10761w5M2w+ccKPSkh2D4HkgoBE4L2NdsKb/DL4XczMFxtVE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1684829473; h=Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=yZj3KILL8q0dZSJUBakN7sQf2oz0+8RZo9NJ59Of0Jc=; b=QAIyTDg/tN/k9h1VhgA0JeRw79HqlAHe8sSXH8ncqdyWVe8AvLStXRl4z+OeppvA3/ZNIMKBL/HZcAuNUU0BHMryy6rcVRhCkzAD/F1jcdKtdMuoyrP7vXwv7DDt0oP2UETTraTY1a1KeI3AA5FxYbwi+8kE7SxYCB9JMnarz4Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+105160+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1684829473808786.3048193566838; Tue, 23 May 2023 01:11:13 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id rlmgYY1788612xr6GcRFncJM; Tue, 23 May 2023 01:11:13 -0700 X-Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mx.groups.io with SMTP id smtpd.web11.16322.1684829472701219872 for ; Tue, 23 May 2023 01:11:12 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10718"; a="352020358" X-IronPort-AV: E=Sophos;i="6.00,185,1681196400"; d="scan'208";a="352020358" X-Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2023 01:11:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10718"; a="654276288" X-IronPort-AV: E=Sophos;i="6.00,185,1681196400"; d="scan'208";a="654276288" X-Received: from shwdesssddpdwei.ccr.corp.intel.com ([10.239.157.28]) by orsmga003.jf.intel.com with ESMTP; 23 May 2023 01:11:10 -0700 From: "Sheng Wei" To: devel@edk2.groups.io Cc: Ray Ni , Rangasai V Chaganty , Jenny Huang , Robert Kowalewski Subject: [edk2-devel] [PATCH] IntelSiliconPkg/IntelVTdDmarPei: Fix build error when disable optimization Date: Tue, 23 May 2023 16:11:07 +0800 Message-Id: <20230523081107.376-1-w.sheng@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,w.sheng@intel.com X-Gm-Message-State: jkCsU7uvN0TpMmyZeOVHtD7Jx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1684829473; bh=pgZPeJ8GGT8/QstXE9f83k0KgCMlzw8dUFhZPlzZUkI=; h=Cc:Date:From:Reply-To:Subject:To; b=U+EiWnSOdu8daqLpFfkoYd0CLO8uX3BkcLVtr26KLSnRMa/DnQTzFI7HcnltXCMvfPZ lwDoRgmYlTCLmmSCq1naSXyQw4xqLn3ggP4u6ExTgQSa7GyOpf681MoONUD0KbVMG6fNP Hzw7+PHIB+FQsQsAE2TzK3QK8mX5JbiuJek= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1684829475487100001 Content-Type: text/plain; charset="utf-8" MSFT:*_*_*_CC_FLAGS =3D /Od will disable build optimization. Signed-off-by: Sheng Wei Cc: Ray Ni Cc: Rangasai V Chaganty Cc: Jenny Huang Cc: Robert Kowalewski --- .../VTd/IntelVTdDmarPei/IntelVTdDmar.c | 43 +++++++++++++------ 1 file changed, 31 insertions(+), 12 deletions(-) diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/Inte= lVTdDmar.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/Inte= lVTdDmar.c index ae9135010..e1b867973 100644 --- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/IntelVTdDma= r.c +++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/IntelVTdDma= r.c @@ -242,6 +242,7 @@ SubmitQueuedInvalidationDescriptor ( VTD_IQA_REG IqaReg; VTD_IQT_REG IqtReg; VTD_IQH_REG IqhReg; + UINT64 IQBassAddress; =20 if (Desc =3D=3D NULL) { return EFI_INVALID_PARAMETER; @@ -249,19 +250,29 @@ SubmitQueuedInvalidationDescriptor ( =20 VtdUnitBaseAddress =3D VTdUnitInfo->VtdUnitBaseAddress; IqaReg.Uint64 =3D MmioRead64 (VtdUnitBaseAddress + R_IQA_REG); - if (IqaReg.Bits.IQA =3D=3D 0) { + // + // Get IQA_REG.IQA (Invalidation Queue Base Address) + // + IQBassAddress =3D RShiftU64 (IqaReg.Uint64, 12); + if (IQBassAddress =3D=3D 0) { DEBUG ((DEBUG_ERROR,"Invalidation Queue Buffer not ready [0x%lx]\n", I= qaReg.Uint64)); return EFI_NOT_READY; } IqtReg.Uint64 =3D MmioRead64 (VtdUnitBaseAddress + R_IQT_REG); =20 - if (IqaReg.Bits.DW =3D=3D 0) { + // + // Check IQA_REG.DW (Descriptor Width) + // + if ((IqaReg.Uint64 & BIT11) =3D=3D 0) { // // 128-bit descriptor // QueueSize =3D (UINTN) (1 << (IqaReg.Bits.QS + 8)); - Qi128Desc =3D (QI_DESC *) (UINTN) (IqaReg.Bits.IQA << VTD_PAGE_SHIFT); - QueueTail =3D (UINTN) IqtReg.Bits128Desc.QT; + Qi128Desc =3D (QI_DESC *) (UINTN) LShiftU64 (IQBassAddress, VTD_PAGE_S= HIFT); + // + // Get IQT_REG.QT for 128-bit descriptors + // + QueueTail =3D (UINTN) (RShiftU64 (IqtReg.Uint64, 4) & 0x7FFF); Qi128Desc +=3D QueueTail; Qi128Desc->Low =3D Desc->Uint64[0]; Qi128Desc->High =3D Desc->Uint64[1]; @@ -274,14 +285,18 @@ SubmitQueuedInvalidationDescriptor ( Desc->Uint64[0], Desc->Uint64[1])); =20 - IqtReg.Bits128Desc.QT =3D QueueTail; + IqtReg.Uint64 &=3D ~(0x7FFF << 4); + IqtReg.Uint64 |=3D LShiftU64 (QueueTail, 4); } else { // // 256-bit descriptor // QueueSize =3D (UINTN) (1 << (IqaReg.Bits.QS + 7)); - Qi256Desc =3D (QI_256_DESC *) (UINTN) (IqaReg.Bits.IQA << VTD_PAGE_SHI= FT); - QueueTail =3D (UINTN) IqtReg.Bits256Desc.QT; + Qi256Desc =3D (QI_256_DESC *) (UINTN) LShiftU64 (IQBassAddress, VTD_PA= GE_SHIFT); + // + // Get IQT_REG.QT for 256-bit descriptors + // + QueueTail =3D (UINTN) (RShiftU64 (IqtReg.Uint64, 5) & 0x3FFF); Qi256Desc +=3D QueueTail; Qi256Desc->Uint64[0] =3D Desc->Uint64[0]; Qi256Desc->Uint64[1] =3D Desc->Uint64[1]; @@ -298,7 +313,8 @@ SubmitQueuedInvalidationDescriptor ( Desc->Uint64[2], Desc->Uint64[3])); =20 - IqtReg.Bits256Desc.QT =3D QueueTail; + IqtReg.Uint64 &=3D ~(0x3FFF << 5); + IqtReg.Uint64 |=3D LShiftU64 (QueueTail, 5); } =20 // @@ -315,10 +331,13 @@ SubmitQueuedInvalidationDescriptor ( } =20 IqhReg.Uint64 =3D MmioRead64 (VtdUnitBaseAddress + R_IQH_REG); - if (IqaReg.Bits.DW =3D=3D 0) { - QueueHead =3D (UINTN) IqhReg.Bits128Desc.QH; + // + // Check IQA_REG.DW (Descriptor Width) and get IQH_REG.QH + // + if ((IqaReg.Uint64 & BIT11) =3D=3D 0) { + QueueHead =3D (UINTN) (RShiftU64 (IqhReg.Uint64, 4) & 0x7FFF); } else { - QueueHead =3D (UINTN) IqhReg.Bits256Desc.QH; + QueueHead =3D (UINTN) (RShiftU64 (IqhReg.Uint64, 5) & 0x3FFF); } } while (QueueTail !=3D QueueHead); =20 @@ -410,7 +429,7 @@ InvalidateIOTLB ( // Queued Invalidation // CapReg.Uint64 =3D MmioRead64 (VTdUnitInfo->VtdUnitBaseAddress + R_CAP_= REG); - QiDesc.Uint64[0] =3D QI_IOTLB_DID(0) | QI_IOTLB_DR(CAP_READ_DRAIN(CapR= eg.Uint64)) | QI_IOTLB_DW(CAP_WRITE_DRAIN(CapReg.Uint64)) | QI_IOTLB_GRAN(1= ) | QI_IOTLB_TYPE; + QiDesc.Uint64[0] =3D QI_IOTLB_DID(0) | (CapReg.Bits.DRD ? QI_IOTLB_DR(= 1) : QI_IOTLB_DR(0)) | (CapReg.Bits.DWD ? QI_IOTLB_DW(1) : QI_IOTLB_DW(0)) = | QI_IOTLB_GRAN(1) | QI_IOTLB_TYPE; QiDesc.Uint64[1] =3D QI_IOTLB_ADDR(0) | QI_IOTLB_IH(0) | QI_IOTLB_AM(0= ); QiDesc.Uint64[2] =3D 0; QiDesc.Uint64[3] =3D 0; --=20 2.26.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#105160): https://edk2.groups.io/g/devel/message/105160 Mute This Topic: https://groups.io/mt/99082903/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-