From nobody Tue Feb 10 12:39:58 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+104257+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+104257+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1683533827; cv=none; d=zohomail.com; s=zohoarc; b=excIF6d1GmWudttxtCl1Ug3OY1Ad3ZtxbC6991PUDNkEKzdF0MPJVrUobaiB6y2UvqqT6rhfIgiLzw26G4RcjCQpXVDbj6hQN56s3cqw9kTQYPGXLPsu/KHDR+F3lcZ/uptYZr6yg/7iy2ZdcP93Y650C2LjPIiLUkc2iTSTD8s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1683533827; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=CLNcy/pKC+O6XXkOPGLGHgJhZCbI4NeumimFXz/xDs0=; b=V8xHH1p0hayXTKm29N9ItxhpIBnKw4zIRbrRFpyd4OhHzdFW9JNkEguQRYoKTcJC+Ss4SgzoHWkMBcGnzCp79D2hzJtfcMFXOTFYBJaLg7i25xOinVx8A9gs5hamocU1nFnZMCjKoXKXxtpDizr4rkPa89hKv7TD9250fZU9mZM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+104257+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1683533827375997.7785602036842; Mon, 8 May 2023 01:17:07 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id tVWhYY1788612xOkRLeRiG8a; Mon, 08 May 2023 01:17:07 -0700 X-Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web11.102321.1683533825808374340 for ; Mon, 08 May 2023 01:17:06 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10703"; a="329948369" X-IronPort-AV: E=Sophos;i="5.99,258,1677571200"; d="scan'208";a="329948369" X-Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2023 01:17:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10703"; a="731219025" X-IronPort-AV: E=Sophos;i="5.99,258,1677571200"; d="scan'208";a="731219025" X-Received: from shwdesfp01.ccr.corp.intel.com ([10.239.158.151]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2023 01:17:03 -0700 From: "Zhiguang Liu" To: devel@edk2.groups.io Cc: Zhiguang Liu , Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann , Debkumar De , Catharine West Subject: [edk2-devel] [PATCH v5 1/5] UefiCpuPkg/ResetVector: Rename macros about page table. Date: Mon, 8 May 2023 16:15:00 +0800 Message-Id: <20230508081504.1067-2-zhiguang.liu@intel.com> In-Reply-To: <20230508081504.1067-1-zhiguang.liu@intel.com> References: <20230508081504.1067-1-zhiguang.liu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,zhiguang.liu@intel.com X-Gm-Message-State: c3gDRP3IMyVBxaEudeJuhfTlx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1683533827; bh=+z3o9pqTlai4ztzf8/QLvaY4YuJZrvJt5epCihJbYHU=; h=Cc:Date:From:Reply-To:Subject:To; b=kAsXEzw0zXrdXEntUf2vUtBhfJLQ35bSUgjj0VYa3qKToaYtxDHOyfUhOqqcplUYWFK H4IZYZHXOz4QaHKwb+1YsgjUp3djmbiX998Vej34jZtm8aO0wLWnetFLjWZk9T1XvtDkL 5MzILvo09mVaSFKbsZKLwEZXOG1O32ouY3E= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1683533828790100001 Content-Type: text/plain; charset="utf-8" This patch only renames macro, with no code logic impacted. Two purpose to rename macro: 1. Align some macro name in PageTables1G.asm and PageTables2M.asm, so that these two files can be easily combined later. 2. Some Macro names such as PDP are not accurate, since 4 level page entry also uses this macro. PAGE_NLE (no leaf entry) is better Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Gerd Hoffmann Cc: Debkumar De Cc: Catharine West Signed-off-by: Zhiguang Liu --- .../ResetVector/Vtf0/X64/PageTables1G.asm | 26 +++++++++----- .../ResetVector/Vtf0/X64/PageTables2M.asm | 35 +++++++++++-------- 2 files changed, 39 insertions(+), 22 deletions(-) diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm b/UefiCpuPkg/= ResetVector/Vtf0/X64/PageTables1G.asm index 19bd3d5a92..20a61f949c 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm +++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm @@ -2,7 +2,7 @@ ; @file ; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x8000000000 (512= GB) ; -; Copyright (c) 2021, Intel Corporation. All rights reserved.
+; Copyright (c) 2021 - 2023, Intel Corporation. All rights reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent ; Linear-Address Translation to a 1-GByte Page ; @@ -12,11 +12,18 @@ BITS 64 =20 %define ALIGN_TOP_TO_4K_FOR_PAGING =20 -%define PAGE_PDP_ATTR (PAGE_ACCESSED + \ +; +; Page table non-leaf entry attribute +; +%define PAGE_NLE_ATTR (PAGE_ACCESSED + \ PAGE_READ_WRITE + \ PAGE_PRESENT) =20 -%define PAGE_PDP_1G_ATTR (PAGE_ACCESSED + \ +; +; Page table big leaf entry attribute: +; PDPTE 1GB entry or PDE 2MB entry +; +%define PAGE_BLE_ATTR (PAGE_ACCESSED + \ PAGE_READ_WRITE + \ PAGE_DIRTY + \ PAGE_PRESENT + \ @@ -25,10 +32,13 @@ BITS 64 %define PGTBLS_OFFSET(x) ((x) - TopLevelPageDirectory) %define PGTBLS_ADDR(x) (ADDR_OF(TopLevelPageDirectory) + (x)) =20 -%define PDP(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \ - PAGE_PDP_ATTR) +; +; Page table non-leaf entry +; +%define PAGE_NLE(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \ + PAGE_NLE_ATTR) =20 -%define PDP_1G(x) ((x << 30) + PAGE_PDP_1G_ATTR) +%define PAGE_PDPTE_1GB(x) ((x << 30) + PAGE_BLE_ATTR) =20 ALIGN 16 =20 @@ -37,7 +47,7 @@ TopLevelPageDirectory: ; ; Top level Page Directory Pointers (1 * 512GB entry) ; - DQ PDP(0x1000) + DQ PAGE_NLE(0x1000) =20 TIMES 0x1000-PGTBLS_OFFSET($) DB 0 ; @@ -45,7 +55,7 @@ TopLevelPageDirectory: ; %assign i 0 %rep 512 - DQ PDP_1G(i) + DQ PAGE_PDPTE_1GB(i) %assign i i+1 %endrep TIMES 0x2000-PGTBLS_OFFSET($) DB 0 diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm b/UefiCpuPkg/= ResetVector/Vtf0/X64/PageTables2M.asm index b97df384ac..1221b023fe 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm +++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm @@ -2,7 +2,7 @@ ; @file ; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x100000000 (4GB) ; -; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.
+; Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent ; ;-------------------------------------------------------------------------= ----- @@ -11,29 +11,36 @@ BITS 64 =20 %define ALIGN_TOP_TO_4K_FOR_PAGING =20 -%define PAGE_2M_PDE_ATTR (PAGE_SIZE + \ +; +; Page table big leaf entry attribute: +; PDPTE 1GB entry or PDE 2MB entry +; +%define PAGE_BLE_ATTR (PAGE_SIZE + \ PAGE_ACCESSED + \ PAGE_DIRTY + \ PAGE_READ_WRITE + \ PAGE_PRESENT) =20 -%define PAGE_PDP_ATTR (PAGE_ACCESSED + \ - PAGE_READ_WRITE + \ - PAGE_PRESENT) +; +; Page table non-leaf entry attribute +; +%define PAGE_NLE_ATTR (PAGE_ACCESSED + \ + PAGE_READ_WRITE + \ + PAGE_PRESENT) =20 %define PGTBLS_OFFSET(x) ((x) - TopLevelPageDirectory) %define PGTBLS_ADDR(x) (ADDR_OF(TopLevelPageDirectory) + (x)) =20 -%define PDP(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \ - PAGE_PDP_ATTR) -%define PTE_2MB(x) ((x << 21) + PAGE_2M_PDE_ATTR) +%define PAGE_NLE(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \ + PAGE_NLE_ATTR) +%define PAGE_PDE_2MB(x) ((x << 21) + PAGE_BLE_ATTR) =20 TopLevelPageDirectory: =20 ; ; Top level Page Directory Pointers (1 * 512GB entry) ; - DQ PDP(0x1000) + DQ PAGE_NLE(0x1000) =20 =20 ; @@ -41,10 +48,10 @@ TopLevelPageDirectory: ; TIMES 0x1000-PGTBLS_OFFSET($) DB 0 =20 - DQ PDP(0x2000) - DQ PDP(0x3000) - DQ PDP(0x4000) - DQ PDP(0x5000) + DQ PAGE_NLE(0x2000) + DQ PAGE_NLE(0x3000) + DQ PAGE_NLE(0x4000) + DQ PAGE_NLE(0x5000) =20 ; ; Page Table Entries (2048 * 2MB entries =3D> 4GB) @@ -53,7 +60,7 @@ TopLevelPageDirectory: =20 %assign i 0 %rep 0x800 - DQ PTE_2MB(i) + DQ PAGE_PDE_2MB(i) %assign i i+1 %endrep =20 --=20 2.31.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#104257): https://edk2.groups.io/g/devel/message/104257 Mute This Topic: https://groups.io/mt/98757006/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-