From nobody Tue Feb 10 02:43:46 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+103533+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+103533+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1682406205; cv=none; d=zohomail.com; s=zohoarc; b=cXXtGa9zBU6jX5jUzCIqC311eknxrC2RTO2ReNYEjtjIr95y87glf7KzF4+aeKG7ZBnpiDT19vV6tUxJstE2YVFjHyYdiYPq46BHFKfyJB4ISbLUKYQmeUqz7DxGlz1sN8tXoSC25brxOXOG2+xeyIatJ9k0fjPB6ZcZvweTnYg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1682406205; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=sDlo1YmAmef9ULiaKDtdG993xAui9ycKP/nj7U5n71Q=; b=Fu9yP4ZPY3dl++HThMnCbhGqyaHKx4RYofULwi3NVJKPDXvvmwjGArui3sqWFriU6HNoeYgGZPKr+85wkSxLIIL3fYdZWBYcGRgSev0OviQYxRaw7BLESCkLQuP9OnyQXMduD9hzThv1K/XCkgPXsmaWmANFgEFR3Tk37FRUt2k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+103533+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1682406205216547.7332172083728; Tue, 25 Apr 2023 00:03:25 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id PwNKYY1788612xGkVktBpNO2; Tue, 25 Apr 2023 00:03:24 -0700 X-Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mx.groups.io with SMTP id smtpd.web10.73794.1682406195842322329 for ; Tue, 25 Apr 2023 00:03:24 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10690"; a="374623079" X-IronPort-AV: E=Sophos;i="5.99,224,1677571200"; d="scan'208";a="374623079" X-Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2023 00:03:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10690"; a="867781673" X-IronPort-AV: E=Sophos;i="5.99,224,1677571200"; d="scan'208";a="867781673" X-Received: from shwdesfp01.ccr.corp.intel.com ([10.239.158.151]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2023 00:03:22 -0700 From: "Zhiguang Liu" To: devel@edk2.groups.io Cc: Zhiguang Liu , Nate DeSimone , Ray Ni Subject: [edk2-devel] [PATCH 5/5] SimicsX58SktPkg: Remove unused Smm related modules Date: Tue, 25 Apr 2023 15:03:04 +0800 Message-Id: <20230425070304.2120-6-zhiguang.liu@intel.com> In-Reply-To: <20230425070304.2120-1-zhiguang.liu@intel.com> References: <20230425070304.2120-1-zhiguang.liu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,zhiguang.liu@intel.com X-Gm-Message-State: T7zsFR0gYrsaMyRV8JyMjWUTx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1682406204; bh=wK/SdSA1/rT/BN+3FDc5YMB1B7hN0ViDneDxJoOT8J4=; h=Cc:Date:From:Reply-To:Subject:To; b=ArZ8ZiDV07h3yOKeqD38IwclBmCjDmXBkovSlTAMGoOI9NaQKcLcHNpDAvQDMevjRsc lsFhfRe6olLHbYoznx0g6YQiC/pXbg7nuOgtVLYK5KAhzw8+K3MMrIhyvVEUHuuFpu3E1 PSNjmEpyC+x0DMmG8VjoDfliDTdlKX1GDEY= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1682406206842100015 Content-Type: text/plain; charset="utf-8" In last two commit, I replace the two SMM related modules, and now no platform will use these two moduels. Remove them Cc: Nate DeSimone Cc: Ray Ni Signed-off-by: Zhiguang Liu Reviewed-by: Ray Ni --- .../Smm/Access/SmmAccess2Dxe.c | 148 -------- .../Smm/Access/SmmAccess2Dxe.inf | 54 --- .../SimicsX58SktPkg/Smm/Access/SmmAccessPei.c | 338 ------------------ .../Smm/Access/SmmAccessPei.inf | 62 ---- .../Smm/Access/SmramInternal.c | 200 ----------- .../Smm/Access/SmramInternal.h | 82 ----- 6 files changed, 884 deletions(-) delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.= inf delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.i= nf delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.c delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.h diff --git a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c b/Sil= icon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c deleted file mode 100644 index 5d3b2c14aa..0000000000 --- a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c +++ /dev/null @@ -1,148 +0,0 @@ -/** @file - A DXE_DRIVER providing SMRAM access by producing EFI_SMM_ACCESS2_PROTOCO= L. - - X58 TSEG is expected to have been verified and set up by the SmmAccessPei - driver. - - Copyright (C) 2013, 2015, Red Hat, Inc.
- Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#include -#include -#include -#include - -#include "SmramInternal.h" - -/** - Opens the SMRAM area to be accessible by a boot-service driver. - - This function "opens" SMRAM so that it is visible while not inside of SM= M. - The function should return EFI_UNSUPPORTED if the hardware does not supp= ort - hiding of SMRAM. The function should return EFI_DEVICE_ERROR if the SMRAM - configuration is locked. - - @param[in] This The EFI_SMM_ACCESS2_PROTOCOL instance. - - @retval EFI_SUCCESS The operation was successful. - @retval EFI_UNSUPPORTED The system does not support opening and closin= g of - SMRAM. - @retval EFI_DEVICE_ERROR SMRAM cannot be opened, perhaps because it is - locked. -**/ -STATIC -EFI_STATUS -EFIAPI -SmmAccess2DxeOpen ( - IN EFI_SMM_ACCESS2_PROTOCOL *This - ) -{ - return SmramAccessOpen (&This->LockState, &This->OpenState); -} - -/** - Inhibits access to the SMRAM. - - This function "closes" SMRAM so that it is not visible while outside of = SMM. - The function should return EFI_UNSUPPORTED if the hardware does not supp= ort - hiding of SMRAM. - - @param[in] This The EFI_SMM_ACCESS2_PROTOCOL instance. - - @retval EFI_SUCCESS The operation was successful. - @retval EFI_UNSUPPORTED The system does not support opening and closin= g of - SMRAM. - @retval EFI_DEVICE_ERROR SMRAM cannot be closed. -**/ -STATIC -EFI_STATUS -EFIAPI -SmmAccess2DxeClose ( - IN EFI_SMM_ACCESS2_PROTOCOL *This - ) -{ - return SmramAccessClose (&This->LockState, &This->OpenState); -} - -/** - Inhibits access to the SMRAM. - - This function prohibits access to the SMRAM region. This function is us= ually - implemented such that it is a write-once operation. - - @param[in] This The EFI_SMM_ACCESS2_PROTOCOL instance. - - @retval EFI_SUCCESS The device was successfully locked. - @retval EFI_UNSUPPORTED The system does not support locking of SMRAM. -**/ -STATIC -EFI_STATUS -EFIAPI -SmmAccess2DxeLock ( - IN EFI_SMM_ACCESS2_PROTOCOL *This - ) -{ - return SmramAccessLock (&This->LockState, &This->OpenState); -} - -/** - Queries the memory controller for the possible regions that will support - SMRAM. - - @param[in] This The EFI_SMM_ACCESS2_PROTOCOL instance. - @param[in,out] SmramMapSize A pointer to the size, in bytes, of the - SmramMemoryMap buffer. - @param[in,out] SmramMap A pointer to the buffer in which firmware - places the current memory map. - - @retval EFI_SUCCESS The chipset supported the given resource. - @retval EFI_BUFFER_TOO_SMALL The SmramMap parameter was too small. The - current buffer size needed to hold the mem= ory - map is returned in SmramMapSize. -**/ -STATIC -EFI_STATUS -EFIAPI -SmmAccess2DxeGetCapabilities ( - IN CONST EFI_SMM_ACCESS2_PROTOCOL *This, - IN OUT UINTN *SmramMapSize, - IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap - ) -{ - return SmramAccessGetCapabilities (This->LockState, This->OpenState, - SmramMapSize, SmramMap); -} - -// -// LockState and OpenState will be filled in by the entry point. -// -STATIC EFI_SMM_ACCESS2_PROTOCOL mAccess2 =3D { - &SmmAccess2DxeOpen, - &SmmAccess2DxeClose, - &SmmAccess2DxeLock, - &SmmAccess2DxeGetCapabilities -}; - -// -// Entry point of this driver. -// -EFI_STATUS -EFIAPI -SmmAccess2DxeEntryPoint ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - // - // This module should only be included if SMRAM support is required. - // - ASSERT (FeaturePcdGet (PcdSmmSmramRequire)); - - GetStates (&mAccess2.LockState, &mAccess2.OpenState); - return gBS->InstallMultipleProtocolInterfaces (&ImageHandle, - &gEfiSmmAccess2ProtocolGuid, &mAccess2, - NULL); -} diff --git a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.inf b/S= ilicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.inf deleted file mode 100644 index eb8c8f93dd..0000000000 --- a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.inf +++ /dev/null @@ -1,54 +0,0 @@ -## @file -# A DXE_DRIVER providing SMRAM access by producing EFI_SMM_ACCESS2_PROTOCO= L. -# -# X58 TSEG is expected to have been verified and set up by the SmmAccessPei -# driver. -# -# Copyright (C) 2013, 2015, Red Hat, Inc. -# Copyright (C) 2019, Intel Corporation. All rights reserved.
-# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -## - -[Defines] - INF_VERSION =3D 0x00010005 - BASE_NAME =3D SmmAccess2Dxe - FILE_GUID =3D AC95AD3D-4366-44BF-9A62-E4B29D7A2206 - MODULE_TYPE =3D DXE_DRIVER - VERSION_STRING =3D 1.0 - PI_SPECIFICATION_VERSION =3D 0x00010400 - ENTRY_POINT =3D SmmAccess2DxeEntryPoint - -# -# The following information is for reference only and not required by the = build tools. -# -# VALID_ARCHITECTURES =3D IA32 X64 -# - -[Sources] - SmmAccess2Dxe.c - SmramInternal.c - SmramInternal.h - -[Packages] - MdeModulePkg/MdeModulePkg.dec - MdePkg/MdePkg.dec - SimicsX58SktPkg/SktPkg.dec - SimicsIch10Pkg/Ich10Pkg.dec - -[LibraryClasses] - DebugLib - PcdLib - PciLib - UefiBootServicesTableLib - UefiDriverEntryPoint - -[Protocols] - gEfiSmmAccess2ProtocolGuid ## PRODUCES - -[FeaturePcd] - gSimicsX58PkgTokenSpaceGuid.PcdSmmSmramRequire - -[Depex] - TRUE diff --git a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c b/Sili= con/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c deleted file mode 100644 index d489cc7513..0000000000 --- a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c +++ /dev/null @@ -1,338 +0,0 @@ -/** @file - A PEIM with the following responsibilities: - - - verify & configure the X58 TSEG in the entry point, - - provide SMRAM access by producing PEI_SMM_ACCESS_PPI, - - set aside the SMM_S3_RESUME_STATE object at the bottom of TSEG, and ex= pose - it via the gEfiAcpiVariableGuid GUID HOB. - - This PEIM runs from RAM, so we can write to variables with static storage - duration. - - Copyright (C) 2013, 2015, Red Hat, Inc.
- Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include "SmramInternal.h" - -// -// PEI_SMM_ACCESS_PPI implementation. -// - -/** - Opens the SMRAM area to be accessible by a PEIM driver. - - This function "opens" SMRAM so that it is visible while not inside of SM= M. - The function should return EFI_UNSUPPORTED if the hardware does not supp= ort - hiding of SMRAM. The function should return EFI_DEVICE_ERROR if the SMRAM - configuration is locked. - - @param PeiServices General purpose services available to eve= ry - PEIM. - @param This The pointer to the SMM Access Interface. - @param DescriptorIndex The region of SMRAM to Open. - - @retval EFI_SUCCESS The region was successfully opened. - @retval EFI_DEVICE_ERROR The region could not be opened because lo= cked - by chipset. - @retval EFI_INVALID_PARAMETER The descriptor index was out of bounds. - -**/ -STATIC -EFI_STATUS -EFIAPI -SmmAccessPeiOpen ( - IN EFI_PEI_SERVICES **PeiServices, - IN PEI_SMM_ACCESS_PPI *This, - IN UINTN DescriptorIndex - ) -{ - if (DescriptorIndex >=3D DescIdxCount) { - return EFI_INVALID_PARAMETER; - } - - // - // According to current practice, DescriptorIndex is not considered at a= ll, - // beyond validating it. - // - return SmramAccessOpen (&This->LockState, &This->OpenState); -} - -/** - Inhibits access to the SMRAM. - - This function "closes" SMRAM so that it is not visible while outside of = SMM. - The function should return EFI_UNSUPPORTED if the hardware does not supp= ort - hiding of SMRAM. - - @param PeiServices General purpose services available to e= very - PEIM. - @param This The pointer to the SMM Access Interface. - @param DescriptorIndex The region of SMRAM to Close. - - @retval EFI_SUCCESS The region was successfully closed. - @retval EFI_DEVICE_ERROR The region could not be closed because - locked by chipset. - @retval EFI_INVALID_PARAMETER The descriptor index was out of bounds. - -**/ -STATIC -EFI_STATUS -EFIAPI -SmmAccessPeiClose ( - IN EFI_PEI_SERVICES **PeiServices, - IN PEI_SMM_ACCESS_PPI *This, - IN UINTN DescriptorIndex - ) -{ - if (DescriptorIndex >=3D DescIdxCount) { - return EFI_INVALID_PARAMETER; - } - - // - // According to current practice, DescriptorIndex is not considered at a= ll, - // beyond validating it. - // - return SmramAccessClose (&This->LockState, &This->OpenState); -} - -/** - Inhibits access to the SMRAM. - - This function prohibits access to the SMRAM region. This function is us= ually - implemented such that it is a write-once operation. - - @param PeiServices General purpose services available to e= very - PEIM. - @param This The pointer to the SMM Access Interface. - @param DescriptorIndex The region of SMRAM to Close. - - @retval EFI_SUCCESS The region was successfully locked. - @retval EFI_DEVICE_ERROR The region could not be locked because at - least one range is still open. - @retval EFI_INVALID_PARAMETER The descriptor index was out of bounds. - -**/ -STATIC -EFI_STATUS -EFIAPI -SmmAccessPeiLock ( - IN EFI_PEI_SERVICES **PeiServices, - IN PEI_SMM_ACCESS_PPI *This, - IN UINTN DescriptorIndex - ) -{ - if (DescriptorIndex >=3D DescIdxCount) { - return EFI_INVALID_PARAMETER; - } - - // - // According to current practice, DescriptorIndex is not considered at a= ll, - // beyond validating it. - // - return SmramAccessLock (&This->LockState, &This->OpenState); -} - -/** - Queries the memory controller for the possible regions that will support - SMRAM. - - @param PeiServices General purpose services available to every - PEIM. - @param This The pointer to the SmmAccessPpi Interface. - @param SmramMapSize The pointer to the variable containing siz= e of - the buffer to contain the description - information. - @param SmramMap The buffer containing the data describing = the - Smram region descriptors. - - @retval EFI_BUFFER_TOO_SMALL The user did not provide a sufficient buff= er. - @retval EFI_SUCCESS The user provided a sufficiently-sized buf= fer. - -**/ -STATIC -EFI_STATUS -EFIAPI -SmmAccessPeiGetCapabilities ( - IN EFI_PEI_SERVICES **PeiServices, - IN PEI_SMM_ACCESS_PPI *This, - IN OUT UINTN *SmramMapSize, - IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap - ) -{ - return SmramAccessGetCapabilities (This->LockState, This->OpenState, Smr= amMapSize, SmramMap); -} - -// -// LockState and OpenState will be filled in by the entry point. -// -STATIC PEI_SMM_ACCESS_PPI mAccess =3D { - &SmmAccessPeiOpen, - &SmmAccessPeiClose, - &SmmAccessPeiLock, - &SmmAccessPeiGetCapabilities -}; - - -STATIC EFI_PEI_PPI_DESCRIPTOR mPpiList[] =3D { - { - EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST, - &gPeiSmmAccessPpiGuid, &mAccess - } -}; - - -// -// Utility functions. -// -STATIC -UINT8 -CmosRead8 ( - IN UINT8 Index - ) -{ - IoWrite8 (0x70, Index); - return IoRead8 (0x71); -} - -STATIC -UINT32 -GetSystemMemorySizeBelow4gb ( - VOID - ) -{ - UINT32 Cmos0x34; - UINT32 Cmos0x35; - - Cmos0x34 =3D CmosRead8 (0x34); - Cmos0x35 =3D CmosRead8 (0x35); - - return ((Cmos0x35 << 8 | Cmos0x34) << 16) + SIZE_16MB; -} - - -// -// Entry point of this driver. -// -EFI_STATUS -EFIAPI -SmmAccessPeiEntryPoint ( - IN EFI_PEI_FILE_HANDLE FileHandle, - IN CONST EFI_PEI_SERVICES **PeiServices - ) -{ - UINT16 HostBridgeDevId; - UINT32 EsmramcVal; - UINT32 TopOfLowRam, TopOfLowRamMb; - EFI_STATUS Status; - UINTN SmramMapSize; - EFI_SMRAM_DESCRIPTOR SmramMap[DescIdxCount]; - - // - // This module should only be included if SMRAM support is required. - // - ASSERT (FeaturePcdGet (PcdSmmSmramRequire)); - - // - // Verify if we're running on a X58 machine type. - // - HostBridgeDevId =3D PciRead16 (SIMICS_HOSTBRIDGE_DID); - if (HostBridgeDevId !=3D INTEL_ICH10_DEVICE_ID) { - DEBUG ((EFI_D_ERROR, "%a: no SMRAM with host bridge DID=3D0x%04x; only= " - "DID=3D0x%04x (X58) is supported\n", __FUNCTION__, HostBridgeDevId, - INTEL_ICH10_DEVICE_ID)); - goto WrongConfig; - } - - // - // Confirm if Simics supports SMRAM. - // - // With no support for it, the ESMRAMC (Extended System Management RAM - // Control) register reads as zero. If there is support, the cache-enable - // bits are hard-coded as 1 by Simics. - // - - TopOfLowRam =3D GetSystemMemorySizeBelow4gb (); - ASSERT ((TopOfLowRam & (SIZE_1MB - 1)) =3D=3D 0); - TopOfLowRamMb =3D TopOfLowRam >> 20; - DEBUG((EFI_D_INFO, "TopOfLowRam =3D0x%x; TopOfLowRamMb =3D0x%x \n", TopO= fLowRam, TopOfLowRamMb)); - - - // - // Set Top of Low Usable DRAM. - // - PciWrite32 (DRAMC_REGISTER_X58(MCH_TOLUD), TopOfLowRam); - DEBUG((EFI_D_INFO, "MCH_TOLUD =3D0x%x; \n", PciRead32(DRAMC_REGISTER_X58= (MCH_TOLUD)))); - - // - // Set TSEG Memory Base. - // - EsmramcVal =3D (TopOfLowRamMb - FixedPcdGet8(PcdX58TsegMbytes)) << MCH_T= SEGMB_MB_SHIFT; - // - // Set TSEG size, and disable TSEG visibility outside of SMM. Note that = the - // T_EN bit has inverse meaning; when T_EN is set, then TSEG visibility = is - // *restricted* to SMM. - // - EsmramcVal &=3D ~(UINT32)MCH_ESMRAMC_TSEG_MASK; - EsmramcVal |=3D FixedPcdGet8 (PcdX58TsegMbytes) =3D=3D 8 ? MCH_ESMRAMC_T= SEG_8MB : - FixedPcdGet8 (PcdX58TsegMbytes) =3D=3D 2 ? MCH_ESMRAMC_TSE= G_2MB : - MCH_ESMRAMC_TSEG_1MB; - EsmramcVal |=3D MCH_ESMRAMC_T_EN; - PciWrite32(DRAMC_REGISTER_X58(MCH_TSEGMB), EsmramcVal); - DEBUG((EFI_D_INFO, "MCH_TSEGMB =3D0x%x; \n", PciRead32(DRAMC_REGISTER_X5= 8(MCH_TSEGMB)))); - DEBUG((EFI_D_INFO, "MCH_TSEGMB_1 =3D0x%x; MCH_TSEGMB_2 =3D0x%x;\n", ((To= pOfLowRamMb - FixedPcdGet8(PcdX58TsegMbytes)) << MCH_TSEGMB_MB_SHIFT), Esmr= amcVal)); - - // - // Create the GUID HOB and point it to the first SMRAM range. - // - GetStates (&mAccess.LockState, &mAccess.OpenState); - SmramMapSize =3D sizeof SmramMap; - Status =3D SmramAccessGetCapabilities (mAccess.LockState, mAccess.OpenSt= ate, &SmramMapSize, SmramMap); - ASSERT_EFI_ERROR (Status); - - DEBUG_CODE_BEGIN (); - { - UINTN Count; - UINTN Idx; - - Count =3D SmramMapSize / sizeof SmramMap[0]; - DEBUG ((EFI_D_VERBOSE, "%a: SMRAM map follows, %d entries\n", __FUNCTI= ON__, (INT32)Count)); - DEBUG ((EFI_D_VERBOSE, "% 20a % 20a % 20a % 20a\n", "PhysicalStart(0x)= ", - "PhysicalSize(0x)", "CpuStart(0x)", "RegionState(0x)")); - for (Idx =3D 0; Idx < Count; ++Idx) { - DEBUG ((EFI_D_VERBOSE, "% 20Lx % 20Lx % 20Lx % 20Lx\n", - SmramMap[Idx].PhysicalStart, SmramMap[Idx].PhysicalSize, - SmramMap[Idx].CpuStart, SmramMap[Idx].RegionState)); - } - } - DEBUG_CODE_END (); - - // - // We're done. The next step should succeed, but even if it fails, we ca= n't - // roll back the above BuildGuidHob() allocation, because PEI doesn't su= pport - // releasing memory. - // - return PeiServicesInstallPpi (mPpiList); - -WrongConfig: - // - // We really don't want to continue in this case. - // - ASSERT (FALSE); - CpuDeadLoop (); - return EFI_UNSUPPORTED; -} diff --git a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.inf b/Si= licon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.inf deleted file mode 100644 index 3c71e64fe9..0000000000 --- a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.inf +++ /dev/null @@ -1,62 +0,0 @@ -## @file -# A PEIM with the following responsibilities: -# -# - provide SMRAM access by producing PEI_SMM_ACCESS_PPI, -# - verify & configure the X58 TSEG in the entry point, -# - set aside the SMM_S3_RESUME_STATE object at the bottom of TSEG, and ex= pose -# it via the gEfiAcpiVariableGuid GUIDed HOB. -# -# Copyright (C) 2013, 2015, Red Hat, Inc. -# Copyright (C) 2019, Intel Corporation. All rights reserved.
-# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -## - -[Defines] - INF_VERSION =3D 0x00010005 - BASE_NAME =3D SmmAccessPei - FILE_GUID =3D 6C0E75B4-B0B9-44D1-8210-3377D7B4E066 - MODULE_TYPE =3D PEIM - VERSION_STRING =3D 1.0 - ENTRY_POINT =3D SmmAccessPeiEntryPoint - -# -# The following information is for reference only and not required by the = build tools. -# -# VALID_ARCHITECTURES =3D IA32 X64 -# - -[Sources] - SmmAccessPei.c - SmramInternal.c - SmramInternal.h - -[Packages] - MdeModulePkg/MdeModulePkg.dec - MdePkg/MdePkg.dec - SimicsX58SktPkg/SktPkg.dec - SimicsIch10Pkg/Ich10Pkg.dec - -[LibraryClasses] - BaseLib - BaseMemoryLib - DebugLib - HobLib - IoLib - PcdLib - PciLib - PeiServicesLib - PeimEntryPoint - -[FeaturePcd] - gSimicsX58PkgTokenSpaceGuid.PcdSmmSmramRequire - -[FixedPcd] - gSimicsX58PkgTokenSpaceGuid.PcdX58TsegMbytes - -[Ppis] - gPeiSmmAccessPpiGuid ## PRODUCES - -[Depex] - gEfiPeiMemoryDiscoveredPpiGuid diff --git a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.c b/Sil= icon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.c deleted file mode 100644 index 4b5a92f602..0000000000 --- a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.c +++ /dev/null @@ -1,200 +0,0 @@ -/** @file - Functions and types shared by the SMM accessor PEI and DXE modules. - - Copyright (C) 2015, Red Hat, Inc. - Copyright (C) 2019, Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#include -#include -#include -#include - -#include "SmramInternal.h" - -BOOLEAN gLockState; -BOOLEAN gOpenState; - -/** - Read the MCH_SMRAM and ESMRAMC registers, and update the LockState and - OpenState fields in the PEI_SMM_ACCESS_PPI / EFI_SMM_ACCESS2_PROTOCOL ob= ject, - from the D_LCK and T_EN bits. - - PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL member functions can rel= y on - the LockState and OpenState fields being up-to-date on entry, and they n= eed - to restore the same invariant on exit, if they touch the bits in questio= n. - - @param[out] LockState Reflects the D_LCK bit on output; TRUE iff SMRAM = is - locked. - @param[out] OpenState Reflects the inverse of the T_EN bit on output; T= RUE - iff SMRAM is open. -**/ -VOID -GetStates ( - OUT BOOLEAN *LockState, - OUT BOOLEAN *OpenState -) -{ - UINT8 EsmramcVal; - - EsmramcVal =3D PciRead8(DRAMC_REGISTER_X58(MCH_TSEGMB)); - - *OpenState =3D !(EsmramcVal & MCH_ESMRAMC_T_EN); - *LockState =3D !*OpenState; - - *OpenState =3D gOpenState; - *LockState =3D gLockState; -} - -// -// The functions below follow the PEI_SMM_ACCESS_PPI and -// EFI_SMM_ACCESS2_PROTOCOL member declarations. The PeiServices and This -// pointers are removed (TSEG doesn't depend on them), and so is the -// DescriptorIndex parameter (TSEG doesn't support range-wise locking). -// -// The LockState and OpenState members that are common to both -// PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL are taken and updated in -// isolation from the rest of the (non-shared) members. -// - -EFI_STATUS -SmramAccessOpen ( - OUT BOOLEAN *LockState, - OUT BOOLEAN *OpenState - ) -{ - - // - // Open TSEG by clearing T_EN. - // - PciAnd8(DRAMC_REGISTER_X58(MCH_TSEGMB), - (UINT8)((~(UINT32)MCH_ESMRAMC_T_EN) & 0xff)); - - gOpenState =3D TRUE; - gLockState =3D !gOpenState; - - GetStates (LockState, OpenState); - if (!*OpenState) { - return EFI_DEVICE_ERROR; - } - return EFI_SUCCESS; -} - -EFI_STATUS -SmramAccessClose ( - OUT BOOLEAN *LockState, - OUT BOOLEAN *OpenState - ) -{ - // - // Close TSEG by setting T_EN. - // - PciOr8(DRAMC_REGISTER_X58(MCH_TSEGMB), MCH_ESMRAMC_T_EN); - - gOpenState =3D FALSE; - gLockState =3D !gOpenState; - - GetStates (LockState, OpenState); - if (*OpenState) { - return EFI_DEVICE_ERROR; - } - return EFI_SUCCESS; -} - -EFI_STATUS -SmramAccessLock ( - OUT BOOLEAN *LockState, - IN OUT BOOLEAN *OpenState - ) -{ - if (*OpenState) { - return EFI_DEVICE_ERROR; - } - - // - // Close & lock TSEG by setting T_EN and D_LCK. - // - PciOr8 (DRAMC_REGISTER_X58(MCH_TSEGMB), MCH_ESMRAMC_T_EN); - - gOpenState =3D FALSE; - gLockState =3D !gOpenState; - - GetStates (LockState, OpenState); - if (*OpenState || !*LockState) { - return EFI_DEVICE_ERROR; - } - return EFI_SUCCESS; -} - -EFI_STATUS -SmramAccessGetCapabilities ( - IN BOOLEAN LockState, - IN BOOLEAN OpenState, - IN OUT UINTN *SmramMapSize, - IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap - ) -{ - UINTN OriginalSize; - UINT32 TsegMemoryBaseMb, TsegMemoryBase; - UINT64 CommonRegionState; - UINT8 TsegSizeBits; - - OriginalSize =3D *SmramMapSize; - *SmramMapSize =3D DescIdxCount * sizeof *SmramMap; - if (OriginalSize < *SmramMapSize) { - return EFI_BUFFER_TOO_SMALL; - } - - // - // Read the TSEG Memory Base register. - // - TsegMemoryBaseMb =3D PciRead32(DRAMC_REGISTER_X58(MCH_TSEGMB)); - - TsegMemoryBaseMb =3D 0xDF800000; - - TsegMemoryBase =3D (TsegMemoryBaseMb >> MCH_TSEGMB_MB_SHIFT) << 20; - - // - // Precompute the region state bits that will be set for all regions. - // - CommonRegionState =3D (OpenState ? EFI_SMRAM_OPEN : EFI_SMRAM_CLOSED) | - (LockState ? EFI_SMRAM_LOCKED : 0) | - EFI_CACHEABLE; - - // - // The first region hosts an SMM_S3_RESUME_STATE object. It is located a= t the - // start of TSEG. We round up the size to whole pages, and we report it = as - // EFI_ALLOCATED, so that the SMM_CORE stays away from it. - // - SmramMap[DescIdxSmmS3ResumeState].PhysicalStart =3D TsegMemoryBase; - SmramMap[DescIdxSmmS3ResumeState].CpuStart =3D TsegMemoryBase; - SmramMap[DescIdxSmmS3ResumeState].PhysicalSize =3D - EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (sizeof (SMM_S3_RESUME_STATE))); - SmramMap[DescIdxSmmS3ResumeState].RegionState =3D - CommonRegionState | EFI_ALLOCATED; - - // - // Get the TSEG size bits from the ESMRAMC register. - // - TsegSizeBits =3D PciRead8 (DRAMC_REGISTER_X58(MCH_TSEGMB)) & - MCH_ESMRAMC_TSEG_MASK; - - TsegSizeBits =3D MCH_ESMRAMC_TSEG_8MB; - - // - // The second region is the main one, following the first. - // - SmramMap[DescIdxMain].PhysicalStart =3D - SmramMap[DescIdxSmmS3ResumeState].PhysicalStart + - SmramMap[DescIdxSmmS3ResumeState].PhysicalSize; - SmramMap[DescIdxMain].CpuStart =3D SmramMap[DescIdxMain].PhysicalStart; - SmramMap[DescIdxMain].PhysicalSize =3D - (TsegSizeBits =3D=3D MCH_ESMRAMC_TSEG_8MB ? SIZE_8MB : - TsegSizeBits =3D=3D MCH_ESMRAMC_TSEG_2MB ? SIZE_2MB : - SIZE_1MB) - SmramMap[DescIdxSmmS3ResumeState].PhysicalSize; - SmramMap[DescIdxMain].RegionState =3D CommonRegionState; - - return EFI_SUCCESS; -} diff --git a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.h b/Sil= icon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.h deleted file mode 100644 index 81180a9c8e..0000000000 --- a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.h +++ /dev/null @@ -1,82 +0,0 @@ -/** @file - Functions and types shared by the SMM accessor PEI and DXE modules. - - Copyright (C) 2015, Red Hat, Inc. - Copyright (C) 2019, Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#include - -// -// We'll have two SMRAM ranges. -// -// The first is a tiny one that hosts an SMM_S3_RESUME_STATE object, to be -// filled in by the CPU SMM driver during normal boot, for the PEI instanc= e of -// the LockBox library (which will rely on the object during S3 resume). -// -// The other SMRAM range is the main one, for the SMM core and the SMM dri= vers. -// -typedef enum { - DescIdxSmmS3ResumeState =3D 0, - DescIdxMain =3D 1, - DescIdxCount =3D 2 -} DESCRIPTOR_INDEX; - -/** - Read the MCH_SMRAM and ESMRAMC registers, and update the LockState and - OpenState fields in the PEI_SMM_ACCESS_PPI / EFI_SMM_ACCESS2_PROTOCOL ob= ject, - from the D_LCK and T_EN bits. - - PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL member functions can rel= y on - the LockState and OpenState fields being up-to-date on entry, and they n= eed - to restore the same invariant on exit, if they touch the bits in questio= n. - - @param[out] LockState Reflects the D_LCK bit on output; TRUE iff SMRAM = is - locked. - @param[out] OpenState Reflects the inverse of the T_EN bit on output; T= RUE - iff SMRAM is open. -**/ -VOID -GetStates ( - OUT BOOLEAN *LockState, - OUT BOOLEAN *OpenState - ); - -// -// The functions below follow the PEI_SMM_ACCESS_PPI and -// EFI_SMM_ACCESS2_PROTOCOL member declarations. The PeiServices and This -// pointers are removed (TSEG doesn't depend on them), and so is the -// DescriptorIndex parameter (TSEG doesn't support range-wise locking). -// -// The LockState and OpenState members that are common to both -// PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL are taken and updated in -// isolation from the rest of the (non-shared) members. -// - -EFI_STATUS -SmramAccessOpen ( - OUT BOOLEAN *LockState, - OUT BOOLEAN *OpenState - ); - -EFI_STATUS -SmramAccessClose ( - OUT BOOLEAN *LockState, - OUT BOOLEAN *OpenState - ); - -EFI_STATUS -SmramAccessLock ( - OUT BOOLEAN *LockState, - IN OUT BOOLEAN *OpenState - ); - -EFI_STATUS -SmramAccessGetCapabilities ( - IN BOOLEAN LockState, - IN BOOLEAN OpenState, - IN OUT UINTN *SmramMapSize, - IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap - ); --=20 2.31.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103533): https://edk2.groups.io/g/devel/message/103533 Mute This Topic: https://groups.io/mt/98488195/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-