From nobody Mon Sep 16 19:49:01 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+101734+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+101734+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1679637650; cv=none; d=zohomail.com; s=zohoarc; b=MF0RC76yXvM/GORe/Tynih9q6n9dnknx1f13dVrJzfFc4Wg1+yHoy5s/eqxkXn4N+RvndaXfYqk2YUbqLMiQ3ERmc3ZbKHUhSuIYng+8SMu357M3ANeUAxBZV0oCI7EFT7Euu/0gRu0kyuWzvUDizDf1hDjCCYIYo82UarxCcMY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1679637650; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=b1eFvz79F85MZYx+JGoDykzI1iSM3eX2x3x0MiaSj4s=; b=glee8v1rlWRTcEI7SOO+Dsnenz1xme/1EEuyMx1ZMdNXmdEmXKTHHo8Dug+U7EtkqhpgLRTObMCHH5L135EsTzBGMCcV+VDcJsY4QujPz+icWcuojOwSZBC2muSJ8R2uIVGvTsQikerutHgH5nKEU6xUUOgh8BZMA2YAd8Bsrbo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+101734+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1679637650945830.8865425818393; Thu, 23 Mar 2023 23:00:50 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id KZ9fYY1788612xkuHCB53HBb; Thu, 23 Mar 2023 23:00:50 -0700 X-Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web11.94534.1679637641374533517 for ; Thu, 23 Mar 2023 23:00:49 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10658"; a="320093923" X-IronPort-AV: E=Sophos;i="5.98,286,1673942400"; d="scan'208";a="320093923" X-Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2023 23:00:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10658"; a="1012122077" X-IronPort-AV: E=Sophos;i="5.98,286,1673942400"; d="scan'208";a="1012122077" X-Received: from shwdeopenlab702.ccr.corp.intel.com ([10.239.55.92]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2023 23:00:48 -0700 From: "duntan" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann Subject: [edk2-devel] [Patch V5 09/22] UefiCpuPkg/CpuPageTableLib: Add manual test to check Mask and Attr Date: Fri, 24 Mar 2023 14:00:07 +0800 Message-Id: <20230324060020.940-10-dun.tan@intel.com> In-Reply-To: <20230324060020.940-1-dun.tan@intel.com> References: <20230324060020.940-1-dun.tan@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,dun.tan@intel.com X-Gm-Message-State: xdIZ5kx8GG01GBw4pIEuHblKx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1679637650; bh=/xP5td9w1XHKG5jXvL8T5T/C6eJWl9jJ+XojNRdDakY=; h=Cc:Date:From:Reply-To:Subject:To; b=VxvY2ffSEMFUiimsiwzRJ8EOIl0o1x2gTpwKfzZrZmtwpSCMCpiZB8f1YPefuRnMiTu jdRXEvO5frnwa1LWGFwRpZeANSwitE0QJBDJ++T20vNvC030RHU76G83VopqwAnaCmPb7 byYJtXDXlLvTueTsCGm428GGfiwmVkJaP9Y= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1679637651417100013 Content-Type: text/plain; charset="utf-8" Add manual test case to check input Mask and Attribute. The check steps are: 1.Create Page table to cover [0, 2G]. All fields of MapMask should be set. 2.Update Page table to set [2G - 8K,2G] from present to non-present. All fields of MapMask except present should not be set. 3.Still set [2G - 8K, 2G] as not present, this case is permitted. But set [2G - 8K, 2G] as RW is not permitted. 4.Update Page table to set [2G - 8K, 2G] as present and RW. All fields of MapMask should be set. Signed-off-by: Dun Tan Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Tested-by: Gerd Hoffmann Acked-by: Gerd Hoffmann Reviewed-by: Ray Ni --- UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUnitTestHost.c = | 129 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 127 insertions(+), 2 deletions(-) diff --git a/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUni= tTestHost.c b/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUn= itTestHost.c index 3014a03243..52fae1864a 100644 --- a/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUnitTestHo= st.c +++ b/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUnitTestHo= st.c @@ -1,7 +1,7 @@ /** @file Unit tests of the CpuPageTableLib instance of the CpuPageTableLib class =20 - Copyright (c) 2022, Intel Corporation. All rights reserved.
+ Copyright (c) 2022 - 2023, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -697,6 +697,131 @@ TestCaseManualChangeNx ( return UNIT_TEST_PASSED; } =20 +/** + Check if the input Mask and Attribute is as expected when creating new p= age table or + updating existing page table. + + @param[in] Context [Optional] An optional parameter that enables: + 1) test-case reuse with varied parameters and + 2) test-case re-entry for Target tests that need a + reboot. This parameter is a VOID* and it is the + responsibility of the test author to ensure that = the + contents are well understood by all test cases th= at may + consume it. + + @retval UNIT_TEST_PASSED The Unit test has completed and th= e test + case was successful. + @retval UNIT_TEST_ERROR_TEST_FAILED A test case assertion has failed. +**/ +UNIT_TEST_STATUS +EFIAPI +TestCaseToCheckMapMaskAndAttr ( + IN UNIT_TEST_CONTEXT Context + ) +{ + UINTN PageTable; + PAGING_MODE PagingMode; + VOID *Buffer; + UINTN PageTableBufferSize; + IA32_MAP_ATTRIBUTE MapAttribute; + IA32_MAP_ATTRIBUTE ExpectedMapAttribute; + IA32_MAP_ATTRIBUTE MapMask; + RETURN_STATUS Status; + IA32_MAP_ENTRY *Map; + UINTN MapCount; + + PagingMode =3D Paging4Level; + PageTableBufferSize =3D 0; + PageTable =3D 0; + Buffer =3D NULL; + MapAttribute.Uint64 =3D 0; + MapAttribute.Bits.Present =3D 1; + MapMask.Uint64 =3D 0; + MapMask.Bits.Present =3D 1; + // + // Create Page table to cover [0, 2G]. All fields of MapMask should be s= et. + // + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, SIZE_2GB, &MapAttribute, &MapMask); + UT_ASSERT_EQUAL (Status, RETURN_INVALID_PARAMETER); + MapMask.Uint64 =3D MAX_UINT64; + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTa= bleBufferSize, 0, SIZE_2GB, &MapAttribute, &MapMask); + UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL); + Buffer =3D AllocatePages (EFI_SIZE_TO_PAGES (PageTableBufferSize)); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, SIZE_2GB, &MapAttribute, &MapMask); + UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); + + // + // Update Page table to set [2G - 8K, 2G] from present to non-present. A= ll fields of MapMask except present should not be set. + // + PageTableBufferSize =3D 0; + MapAttribute.Uint64 =3D SIZE_2GB - SIZE_8KB; + MapMask.Uint64 =3D 0; + MapMask.Bits.Present =3D 1; + MapMask.Bits.ReadWrite =3D 1; + Status =3D PageTableMap (&PageTable, PagingMode, Buffer,= &PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute, &MapMa= sk); + UT_ASSERT_EQUAL (Status, RETURN_INVALID_PARAMETER); + MapMask.Bits.ReadWrite =3D 0; + Status =3D PageTableMap (&PageTable, PagingMode, Buffer,= &PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute, &MapMa= sk); + UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL); + Buffer =3D AllocatePages (EFI_SIZE_TO_PAGES (PageTableBufferSize)); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, SIZE_2GB, &MapAttribute, &MapMask); + UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); + + // + // Still set [2G - 8K, 2G] as not present, this case is permitted. But s= et [2G - 8K, 2G] as RW is not permitted. + // + PageTableBufferSize =3D 0; + MapAttribute.Uint64 =3D 0; + MapMask.Uint64 =3D 0; + MapMask.Bits.Present =3D 1; + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &= PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute, &MapMask= ); + UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); + MapAttribute.Bits.ReadWrite =3D 1; + MapMask.Bits.ReadWrite =3D 1; + Status =3D PageTableMap (&PageTable, PagingMode, Bu= ffer, &PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute, &= MapMask); + UT_ASSERT_EQUAL (Status, RETURN_INVALID_PARAMETER); + + // + // Update Page table to set [2G - 8K, 2G] as present and RW. All fields = of MapMask should be set. + // + PageTableBufferSize =3D 0; + MapAttribute.Uint64 =3D SIZE_2GB - SIZE_8KB; + MapAttribute.Bits.ReadWrite =3D 1; + MapAttribute.Bits.Present =3D 1; + MapMask.Uint64 =3D 0; + MapMask.Bits.ReadWrite =3D 1; + MapMask.Bits.Present =3D 1; + Status =3D PageTableMap (&PageTable, PagingMode, Bu= ffer, &PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute, &= MapMask); + UT_ASSERT_EQUAL (Status, RETURN_INVALID_PARAMETER); + MapMask.Uint64 =3D MAX_UINT64; + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTa= bleBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute, &MapMask); + UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); + + MapCount =3D 0; + Status =3D PageTableParse (PageTable, PagingMode, NULL, &MapCount); + UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL); + Map =3D AllocatePages (EFI_SIZE_TO_PAGES (MapCount* sizeof (IA32_MAP_= ENTRY))); + Status =3D PageTableParse (PageTable, PagingMode, Map, &MapCount); + UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); + + // + // There should be two ranges [0, 2G-8k] with RW =3D 0 and [2G-8k, 2G] w= ith RW =3D 1 + // + UT_ASSERT_EQUAL (MapCount, 2); + UT_ASSERT_EQUAL (Map[0].LinearAddress, 0); + UT_ASSERT_EQUAL (Map[0].Length, SIZE_2GB - SIZE_8KB); + ExpectedMapAttribute.Uint64 =3D 0; + ExpectedMapAttribute.Bits.Present =3D 1; + UT_ASSERT_EQUAL (Map[0].Attribute.Uint64, ExpectedMapAttribute.Uint64); + UT_ASSERT_EQUAL (Map[1].LinearAddress, SIZE_2GB - SIZE_8KB); + UT_ASSERT_EQUAL (Map[1].Length, SIZE_8KB); + ExpectedMapAttribute.Uint64 =3D SIZE_2GB - SIZE_8KB; + ExpectedMapAttribute.Bits.Present =3D 1; + ExpectedMapAttribute.Bits.ReadWrite =3D 1; + UT_ASSERT_EQUAL (Map[1].Attribute.Uint64, ExpectedMapAttribute.Uint64); + return UNIT_TEST_PASSED; +} + /** Initialize the unit test framework, suite, and unit tests for the sample unit tests and run the unit tests. @@ -746,7 +871,7 @@ UefiTestMain ( AddTestCase (ManualTestCase, "Check if the parent entry has different Re= adWrite attribute", "Manual Test Case5", TestCaseManualChangeReadWrite, NUL= L, NULL, NULL); AddTestCase (ManualTestCase, "Check if the parent entry has different Nx= attribute", "Manual Test Case6", TestCaseManualChangeNx, NULL, NULL, NULL); AddTestCase (ManualTestCase, "Check if the needed size is expected", "Ma= nual Test Case7", TestCaseManualSizeNotMatch, NULL, NULL, NULL); - + AddTestCase (ManualTestCase, "Check MapMask when creating new page table= or mapping not-present range", "Manual Test Case8", TestCaseToCheckMapMask= AndAttr, NULL, NULL, NULL); // // Populate the Random Test Cases. // --=20 2.31.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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