From nobody Mon Sep 16 19:20:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+101116+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+101116+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=kernel.org ARC-Seal: i=1; a=rsa-sha256; t=1678727887; cv=none; d=zohomail.com; s=zohoarc; b=bqmdxQhtuHDHGD8y4CjpcMc6EQOhkxK9a+nerPXa06v0WqliIN0dpeOQCxGs/pm5Ooz2nbF97e6/I6PwOzkNq3zSIJixh6jYqn+s7lqYTJUX6E/fZCWurSHZJ4s1RwhJ5IdZvaMgaYf5lBVeO4M6pzHh9eA+zXRxtdnUqSvyF68= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1678727887; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=aNm5BqEHxqLbSfenjbC6k9XoGGhMW8WQQlqRY9x3QtY=; b=BABxfdRulLfdjdZssrsHRIHdXTd6BjC1XSP6Dw7L5O7mnKJabbxsExdyLuKVs0F/Zy9ATpdy2X9JD/VP27Z4DdGmk5esD4enINimyvfNXFmFHT3iUEj9ARDFFzGJuxp8e7poagQD/sWs3cuAip9OXh7Qo5DgPIoS/eBnt2S2ees= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+101116+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 167872788757112.695551778220874; Mon, 13 Mar 2023 10:18:07 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id p0ONYY1788612xheS7mos5Kp; Mon, 13 Mar 2023 10:18:07 -0700 X-Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web10.25802.1678727886401728682 for ; Mon, 13 Mar 2023 10:18:06 -0700 X-Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id E94F961449; Mon, 13 Mar 2023 17:18:05 +0000 (UTC) X-Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2E258C4339C; Mon, 13 Mar 2023 17:18:03 +0000 (UTC) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Michael Kinney , Liming Gao , Jiewen Yao , Michael Kubacki , Sean Brogan , Rebecca Cran , Leif Lindholm , Sami Mujawar , Taylor Beebe Subject: [edk2-devel] [PATCH v5 12/38] ArmPkg/CpuDxe: Perform preliminary NX remap of free memory Date: Mon, 13 Mar 2023 18:16:48 +0100 Message-Id: <20230313171714.3866151-13-ardb@kernel.org> In-Reply-To: <20230313171714.3866151-1-ardb@kernel.org> References: <20230313171714.3866151-1-ardb@kernel.org> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ardb@kernel.org X-Gm-Message-State: hsjIHHPnA1rEm8ZAaOp6i3UUx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1678727887; bh=CwJEfnMnzL01fVNGHA1jE1kvUtjqradPkIQSGZCIkAo=; h=Cc:Date:From:Reply-To:Subject:To; b=AUyQQ+Z99OlfIZyubsIzq8/tB5LRM29lhXG2RN3ctJrl3XWwWgdCCjfuR8z+iGA5oty A+bCs3IZ8wKR3RQOJoNY5WOj7VGHfRfrRmCDkE0AEDBod7FZcBqy6V730u0kaVDsLgnH2 027GRBjNrismj8C04WFqvHTlzZMpc+nT1no= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1678727888045100010 Content-Type: text/plain; charset="utf-8" The DXE core implementation of PcdDxeNxMemoryProtectionPolicy already contains an assertion that EfiConventionalMemory and EfiBootServicesData are subjected to the same policy when it comes to the use of NX permissions. The reason for this is that we may otherwise end up with unbounded recursion in the page table code, given that allocating a page table would then involve a permission attribute change, and this could result in the need for a block entry to be split, which would trigger the allocation of a page table recursively. For the same reason, a shortcut exists in ApplyMemoryProtectionPolicy() where, instead of setting the memory attributes unconditionally, we compare the NX policies and avoid touching the page tables if they are the same for the old and the new memory types. Without this shortcut, we may end up in a situation where, as the CPU arch protocol DXE driver is ramping up, the same unbounded recursion is triggered, due to the fact that the NX policy for EfiConventionalMemory has not been applied yet. To break this cycle, let's remap all EfiConventionalMemory regions according to the NX policy for EfiBootServicesData before exposing the CPU arch protocol to the DXE core and other drivers. This ensures that creating EfiBootServicesData allocations does not result in memory attribute changes, and therefore no recursion. Signed-off-by: Ard Biesheuvel --- ArmPkg/ArmPkg.dec | 5 ++ ArmPkg/Drivers/CpuDxe/CpuDxe.c | 85 ++++++++++++++++++++ ArmPkg/Drivers/CpuDxe/CpuDxe.inf | 3 + 3 files changed, 93 insertions(+) diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec index f17ba913e6de..3f9f6bc3fd93 100644 --- a/ArmPkg/ArmPkg.dec +++ b/ArmPkg/ArmPkg.dec @@ -144,6 +144,11 @@ [PcdsFeatureFlag.common] # If PcdMonitorConduitHvc =3D TRUE, conduit =3D HVC gArmTokenSpaceGuid.PcdMonitorConduitHvc|FALSE|BOOLEAN|0x00000047 =20 + # Whether to remap all unused memory NX before installing the CPU arch + # protocol driver. This is needed on platforms that map all DRAM with RWX + # attributes initially, and can be disabled otherwise. + gArmTokenSpaceGuid.PcdRemapUnusedMemoryNx|TRUE|BOOLEAN|0x00000048 + [PcdsFeatureFlag.ARM] # Whether to map normal memory as non-shareable. FALSE is the safe choic= e, but # TRUE may be appropriate to fix performance problems if you don't care = about diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.c b/ArmPkg/Drivers/CpuDxe/CpuDxe.c index d04958e79e52..f820f3f62189 100644 --- a/ArmPkg/Drivers/CpuDxe/CpuDxe.c +++ b/ArmPkg/Drivers/CpuDxe/CpuDxe.c @@ -11,6 +11,8 @@ =20 #include =20 +#include + BOOLEAN mIsFlushingGCD; =20 /** @@ -227,6 +229,75 @@ InitializeDma ( CpuArchProtocol->DmaBufferAlignment =3D ArmCacheWritebackGranule (); } =20 +/** + Map all EfiConventionalMemory regions in the memory map with NX + attributes so that allocating or freeing EfiBootServicesData regions + does not result in changes to memory permission attributes. + +**/ +STATIC +VOID +RemapUnusedMemoryNx ( + VOID + ) +{ + UINT64 TestBit; + UINTN MemoryMapSize; + UINTN MapKey; + UINTN DescriptorSize; + UINT32 DescriptorVersion; + EFI_MEMORY_DESCRIPTOR *MemoryMap; + EFI_MEMORY_DESCRIPTOR *MemoryMapEntry; + EFI_MEMORY_DESCRIPTOR *MemoryMapEnd; + EFI_STATUS Status; + + TestBit =3D LShiftU64 (1, EfiBootServicesData); + if ((PcdGet64 (PcdDxeNxMemoryProtectionPolicy) & TestBit) =3D=3D 0) { + return; + } + + MemoryMapSize =3D 0; + MemoryMap =3D NULL; + + Status =3D gBS->GetMemoryMap ( + &MemoryMapSize, + MemoryMap, + &MapKey, + &DescriptorSize, + &DescriptorVersion + ); + ASSERT (Status =3D=3D EFI_BUFFER_TOO_SMALL); + do { + MemoryMap =3D (EFI_MEMORY_DESCRIPTOR *)AllocatePool (MemoryMapSize); + ASSERT (MemoryMap !=3D NULL); + Status =3D gBS->GetMemoryMap ( + &MemoryMapSize, + MemoryMap, + &MapKey, + &DescriptorSize, + &DescriptorVersion + ); + if (EFI_ERROR (Status)) { + FreePool (MemoryMap); + } + } while (Status =3D=3D EFI_BUFFER_TOO_SMALL); + + ASSERT_EFI_ERROR (Status); + + MemoryMapEntry =3D MemoryMap; + MemoryMapEnd =3D (EFI_MEMORY_DESCRIPTOR *)((UINT8 *)MemoryMap + Memory= MapSize); + while ((UINTN)MemoryMapEntry < (UINTN)MemoryMapEnd) { + if (MemoryMapEntry->Type =3D=3D EfiConventionalMemory) { + ArmSetMemoryRegionNoExec ( + MemoryMapEntry->PhysicalStart, + EFI_PAGES_TO_SIZE (MemoryMapEntry->NumberOfPages) + ); + } + + MemoryMapEntry =3D NEXT_MEMORY_DESCRIPTOR (MemoryMapEntry, DescriptorS= ize); + } +} + EFI_STATUS CpuDxeInitialize ( IN EFI_HANDLE ImageHandle, @@ -240,6 +311,20 @@ CpuDxeInitialize ( =20 InitializeDma (&mCpu); =20 + // + // Once we install the CPU arch protocol, the DXE core's memory + // protection routines will invoke them to manage the permissions of page + // allocations as they are created. Given that this includes pages + // allocated for page tables by this driver, we must ensure that unused + // memory is mapped with the same permissions as boot services data + // regions. Otherwise, we may end up with unbounded recursion, due to the + // fact that updating permissions on a newly allocated page table may tr= igger + // a block entry split, which triggers a page table allocation, etc etc + // + if (FeaturePcdGet (PcdRemapUnusedMemoryNx)) { + RemapUnusedMemoryNx (); + } + Status =3D gBS->InstallMultipleProtocolInterfaces ( &mCpuHandle, &gEfiCpuArchProtocolGuid, diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.inf b/ArmPkg/Drivers/CpuDxe/CpuDx= e.inf index e732e21cb94a..7d8132200e64 100644 --- a/ArmPkg/Drivers/CpuDxe/CpuDxe.inf +++ b/ArmPkg/Drivers/CpuDxe/CpuDxe.inf @@ -48,6 +48,7 @@ [LibraryClasses] DefaultExceptionHandlerLib DxeServicesTableLib HobLib + MemoryAllocationLib PeCoffGetEntryPointLib UefiDriverEntryPoint UefiLib @@ -64,9 +65,11 @@ [Guids] =20 [Pcd.common] gArmTokenSpaceGuid.PcdVFPEnabled + gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy =20 [FeaturePcd.common] gArmTokenSpaceGuid.PcdDebuggerExceptionSupport + gArmTokenSpaceGuid.PcdRemapUnusedMemoryNx =20 [Depex] gHardwareInterruptProtocolGuid OR gHardwareInterrupt2ProtocolGuid --=20 2.39.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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