From nobody Fri Dec 19 20:42:18 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100856+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100856+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1678270153; cv=none; d=zohomail.com; s=zohoarc; b=K94kTFoRqxSwENYs+mkKr/bWOlBft+0pffDjrA+rcGFQo6NpeGNoBYZvwVc44vi4pNBM+flFx+WecktHM3dsql6Xzdby10ty8Mlg6KtlnTUbWXLfgvlOIUmUA0GojrFYW2DqFeKSHiimDjxlH7qRKEJ1h/QLTI5HjsfiCXINwEE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1678270153; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=kcnGxgk8dNv4eZPEW5cTpAEOReSeOEYhZ9Opk8Tig9U=; b=g7fwciAdrVJ0YAmkue1MQXVFT8Ur6DYRokOZdsV78RtVU83h6F/mhy6QrxkztjkaIvS2rysr2bxIIf6zDleCBylzKE+3LyA53+VU7rqiJr/Fh6pAeu54H9A+5ObQIClMt6cOuDXAvfKm7ds0uqSreYsy5dQ90jF0QEys9ao+R2s= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100856+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1678270153144509.6937910668887; Wed, 8 Mar 2023 02:09:13 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id 9aZoYY1788612xjjZb3y63lB; Wed, 08 Mar 2023 02:09:12 -0800 X-Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mx.groups.io with SMTP id smtpd.web10.3470.1678270139326397803 for ; Wed, 08 Mar 2023 02:09:12 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10642"; a="338442747" X-IronPort-AV: E=Sophos;i="5.98,243,1673942400"; d="scan'208";a="338442747" X-Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Mar 2023 02:09:11 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10642"; a="745862729" X-IronPort-AV: E=Sophos;i="5.98,243,1673942400"; d="scan'208";a="745862729" X-Received: from shwdeopenlab702.ccr.corp.intel.com ([10.239.55.92]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Mar 2023 02:09:10 -0800 From: "duntan" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann Subject: [edk2-devel] [Patch V2 09/14] UefiCpuPkg/CpuPageTableLib: Add OUTPUT IsModified parameter. Date: Wed, 8 Mar 2023 18:07:53 +0800 Message-Id: <20230308100758.669-10-dun.tan@intel.com> In-Reply-To: <20230308100758.669-1-dun.tan@intel.com> References: <20230308100758.669-1-dun.tan@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,dun.tan@intel.com X-Gm-Message-State: CYV4pEjoNoI4VxMnoWOWdhmNx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1678270152; bh=CR4wT/CRiVbwC+yYPB2/uY4TRoSIpf2VumoRiH3X6Ek=; h=Cc:Date:From:Reply-To:Subject:To; b=wqirxHQhRXGUm8S2K9kehW7QQkOVdpmEQrUb1/WGusIXXNKDZMWjocl5OEi89eb3gR9 vKglTNZ/Z0KWP15uVe6XERhXGp3tlxIFXkiR6fIE98W/8wJjWtRERUFM3rB97u6ujyvh8 Y5A4oV/xxSinWlreMJr1dIilW8kzGDdLIUI= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1678270154569100001 Content-Type: text/plain; charset="utf-8" Add OUTPUT IsModified parameter in PageTableMap() to indicate if page table has been modified. With this parameter, caller can know if need to call FlushTlb when the page table is in CR3. Signed-off-by: Dun Tan Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Gerd Hoffmann --- UefiCpuPkg/Include/Library/CpuPageTableLib.h = | 4 +++- UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c = | 47 ++++++++++++++++++++++++++++++++++++++++------- UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUnitTestHost.c = | 66 +++++++++++++++++++++++++++++++++--------------------------------- UefiCpuPkg/Library/CpuPageTableLib/UnitTest/RandomTest.c = | 6 ++++-- UefiCpuPkg/Library/MpInitLib/X64/CreatePageTable.c = | 6 ++++-- 5 files changed, 84 insertions(+), 45 deletions(-) diff --git a/UefiCpuPkg/Include/Library/CpuPageTableLib.h b/UefiCpuPkg/Incl= ude/Library/CpuPageTableLib.h index 2dc9b7d18e..118dff20f4 100644 --- a/UefiCpuPkg/Include/Library/CpuPageTableLib.h +++ b/UefiCpuPkg/Include/Library/CpuPageTableLib.h @@ -74,6 +74,7 @@ typedef enum { Page table entries that map the linear ad= dress range are reset to 0 before set to the new attribute when a new physical base address is set. @param[in] Mask The mask used for attribute. The correspo= nding field in Attribute is ignored if that in Mask is 0. + @param[out] IsModified TRUE means page table is modified. FALSE = means page table is not modified. =20 @retval RETURN_UNSUPPORTED PagingMode is not supported. @retval RETURN_INVALID_PARAMETER PageTable, BufferSize, Attribute or Ma= sk is NULL. @@ -93,7 +94,8 @@ PageTableMap ( IN UINT64 LinearAddress, IN UINT64 Length, IN IA32_MAP_ATTRIBUTE *Attribute, - IN IA32_MAP_ATTRIBUTE *Mask + IN IA32_MAP_ATTRIBUTE *Mask, + OUT BOOLEAN *IsModified OPTIONAL ); =20 typedef struct { diff --git a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c b/UefiCpu= Pkg/Library/CpuPageTableLib/CpuPageTableMap.c index 56f762a15e..4e8ac9b981 100644 --- a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c +++ b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c @@ -262,6 +262,7 @@ CheckMaskAndAttrForNotPresentEntry ( Page table entries that map the linear= address range are reset to 0 before set to the new attribute when a new physical base address is se= t. @param[in] Mask The mask used for attribute. The corre= sponding field in Attribute is ignored if that in Mask is 0. + @param[out] IsModified TRUE means page table is modified. FAL= SE means page table is not modified. =20 @retval RETURN_SUCCESS PageTable is created/updated successfu= lly. **/ @@ -278,7 +279,8 @@ PageTableLibMapInLevel ( IN UINT64 Length, IN UINT64 Offset, IN IA32_MAP_ATTRIBUTE *Attribute, - IN IA32_MAP_ATTRIBUTE *Mask + IN IA32_MAP_ATTRIBUTE *Mask, + OUT BOOLEAN *IsModified OPTIONAL ) { RETURN_STATUS Status; @@ -302,6 +304,8 @@ PageTableLibMapInLevel ( IA32_MAP_ATTRIBUTE ChildMask; IA32_MAP_ATTRIBUTE CurrentMask; IA32_MAP_ATTRIBUTE LocalParentAttribute; + IA32_PAGING_ENTRY ParentPagingEntryContent; + IA32_PAGING_ENTRY PrevLeafPagingEntryContent; =20 ASSERT (Level !=3D 0); ASSERT ((Attribute !=3D NULL) && (Mask !=3D NULL)); @@ -314,8 +318,9 @@ PageTableLibMapInLevel ( NopAttribute.Bits.ReadWrite =3D 1; NopAttribute.Bits.UserSupervisor =3D 1; =20 - LocalParentAttribute.Uint64 =3D ParentAttribute->Uint64; - ParentAttribute =3D &LocalParentAttribute; + LocalParentAttribute.Uint64 =3D ParentAttribute->Uint64; + ParentAttribute =3D &LocalParentAttribute; + ParentPagingEntryContent.Uint64 =3D ParentPagingEntry->Uint64; =20 // // RegionLength: 256T (1 << 48) 512G (1 << 39), 1G (1 << 30), 2M (1 << 2= 1) or 4K (1 << 12). @@ -542,7 +547,17 @@ PageTableLibMapInLevel ( ASSERT (CreateNew || (Mask->Bits.Nx =3D=3D 0) || (Attribute->Bit= s.Nx =3D=3D 1)); } =20 + // + // Check if any leaf PagingEntry is modified. + // + PrevLeafPagingEntryContent.Uint64 =3D CurrentPagingEntry->Uint64; PageTableLibSetPle (Level, CurrentPagingEntry, Offset, Attribute, = &CurrentMask); + + if (PrevLeafPagingEntryContent.Uint64 !=3D CurrentPagingEntry->Uin= t64) { + if (IsModified !=3D NULL) { + *IsModified =3D TRUE; + } + } } } else { // @@ -565,7 +580,8 @@ PageTableLibMapInLevel ( Length, Offset, Attribute, - Mask + Mask, + IsModified ); if (RETURN_ERROR (Status)) { return Status; @@ -577,6 +593,15 @@ PageTableLibMapInLevel ( Index++; } =20 + // + // Check if ParentPagingEntry entry is modified. + // + if (ParentPagingEntryContent.Uint64 !=3D ParentPagingEntry->Uint64) { + if (IsModified !=3D NULL) { + *IsModified =3D TRUE; + } + } + return RETURN_SUCCESS; } =20 @@ -597,6 +622,7 @@ PageTableLibMapInLevel ( Page table entries that map the linear ad= dress range are reset to 0 before set to the new attribute when a new physical base address is set. @param[in] Mask The mask used for attribute. The correspo= nding field in Attribute is ignored if that in Mask is 0. + @param[out] IsModified TRUE means page table is modified. FALSE = means page table is not modified. =20 @retval RETURN_UNSUPPORTED PagingMode is not supported. @retval RETURN_INVALID_PARAMETER PageTable, BufferSize, Attribute or Ma= sk is NULL. @@ -616,7 +642,8 @@ PageTableMap ( IN UINT64 LinearAddress, IN UINT64 Length, IN IA32_MAP_ATTRIBUTE *Attribute, - IN IA32_MAP_ATTRIBUTE *Mask + IN IA32_MAP_ATTRIBUTE *Mask, + OUT BOOLEAN *IsModified OPTIONAL ) { RETURN_STATUS Status; @@ -661,6 +688,10 @@ PageTableMap ( return RETURN_INVALID_PARAMETER; } =20 + if (IsModified !=3D NULL) { + *IsModified =3D FALSE; + } + MaxLeafLevel =3D (IA32_PAGE_LEVEL)(UINT8)PagingMode; MaxLevel =3D (IA32_PAGE_LEVEL)(UINT8)(PagingMode >> 8); MaxLinearAddress =3D LShiftU64 (1, 12 + MaxLevel * 9); @@ -703,7 +734,8 @@ PageTableMap ( Length, 0, Attribute, - Mask + Mask, + NULL ); if (RETURN_ERROR (Status)) { return Status; @@ -735,7 +767,8 @@ PageTableMap ( Length, 0, Attribute, - Mask + Mask, + IsModified ); if (!RETURN_ERROR (Status)) { *PageTable =3D (UINTN)(TopPagingEntry.Uintn & IA32_PE_BASE_ADDRESS_MAS= K_40); diff --git a/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUni= tTestHost.c b/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUn= itTestHost.c index 6f27411d4b..3df6436af3 100644 --- a/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUnitTestHo= st.c +++ b/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUnitTestHo= st.c @@ -51,26 +51,26 @@ TestCaseForParameter ( // // If the input linear address is not 4K align, it should return invalid= parameter // - UT_ASSERT_EQUAL (PageTableMap (&PageTable, PagingMode, &Buffer, &PageTab= leBufferSize, 1, SIZE_4KB, &MapAttribute, &MapMask), RETURN_INVALID_PARAMET= ER); + UT_ASSERT_EQUAL (PageTableMap (&PageTable, PagingMode, &Buffer, &PageTab= leBufferSize, 1, SIZE_4KB, &MapAttribute, &MapMask, NULL), RETURN_INVALID_P= ARAMETER); =20 // // If the input PageTableBufferSize is not 4K align, it should return in= valid parameter // PageTableBufferSize =3D 10; - UT_ASSERT_EQUAL (PageTableMap (&PageTable, PagingMode, &Buffer, &PageTab= leBufferSize, 0, SIZE_4KB, &MapAttribute, &MapMask), RETURN_INVALID_PARAMET= ER); + UT_ASSERT_EQUAL (PageTableMap (&PageTable, PagingMode, &Buffer, &PageTab= leBufferSize, 0, SIZE_4KB, &MapAttribute, &MapMask, NULL), RETURN_INVALID_P= ARAMETER); =20 // // If the input PagingMode is Paging32bit, it should return invalid para= meter // PageTableBufferSize =3D 0; PagingMode =3D Paging32bit; - UT_ASSERT_EQUAL (PageTableMap (&PageTable, PagingMode, &Buffer, &PageTab= leBufferSize, 1, SIZE_4KB, &MapAttribute, &MapMask), RETURN_UNSUPPORTED); + UT_ASSERT_EQUAL (PageTableMap (&PageTable, PagingMode, &Buffer, &PageTab= leBufferSize, 1, SIZE_4KB, &MapAttribute, &MapMask, NULL), RETURN_UNSUPPORT= ED); =20 // // If the input MapMask is NULL, it should return invalid parameter // PagingMode =3D Paging5Level1GB; - UT_ASSERT_EQUAL (PageTableMap (&PageTable, PagingMode, &Buffer, &PageTab= leBufferSize, 1, SIZE_4KB, &MapAttribute, NULL), RETURN_INVALID_PARAMETER); + UT_ASSERT_EQUAL (PageTableMap (&PageTable, PagingMode, &Buffer, &PageTab= leBufferSize, 1, SIZE_4KB, &MapAttribute, NULL, NULL), RETURN_INVALID_PARAM= ETER); =20 return UNIT_TEST_PASSED; } @@ -119,10 +119,10 @@ TestCaseWhichNoNeedExtraSize ( // // Create page table to cover [0, 10M], it should have 5 PTE // - Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, (UINT64)SIZE_2MB * 5, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, (UINT64)SIZE_2MB * 5, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL); Buffer =3D AllocatePages (EFI_SIZE_TO_PAGES (PageTableBufferSize)); - Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, (UINT64)SIZE_2MB * 5, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, (UINT64)SIZE_2MB * 5, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); TestStatus =3D IsPageTableValid (PageTable, PagingMode); if (TestStatus !=3D UNIT_TEST_PASSED) { @@ -134,7 +134,7 @@ TestCaseWhichNoNeedExtraSize ( // We assume the fucntion doesn't need to change page table, return succ= ess and output BufferSize is 0 // Buffer =3D NULL; - Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, (UINT64)SIZE_4KB, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, (UINT64)SIZE_4KB, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (PageTableBufferSize, 0); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); TestStatus =3D IsPageTableValid (PageTable, PagingMode); @@ -148,7 +148,7 @@ TestCaseWhichNoNeedExtraSize ( // MapMask.Bits.Nx =3D 0; PageTableBufferSize =3D 0; - Status =3D PageTableMap (&PageTable, PagingMode, NULL, &Pag= eTableBufferSize, 0, (UINT64)SIZE_4KB, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, NULL, &Pag= eTableBufferSize, 0, (UINT64)SIZE_4KB, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); UT_ASSERT_EQUAL (PageTableBufferSize, 0); TestStatus =3D IsPageTableValid (PageTable, PagingMode); @@ -164,7 +164,7 @@ TestCaseWhichNoNeedExtraSize ( MapAttribute.Bits.Accessed =3D 1; MapMask.Bits.Accessed =3D 1; PageTableBufferSize =3D 0; - Status =3D PageTableMap (&PageTable, PagingMode, NUL= L, &PageTableBufferSize, (UINT64)SIZE_2MB, (UINT64)SIZE_2MB, &MapAttribute,= &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, NUL= L, &PageTableBufferSize, (UINT64)SIZE_2MB, (UINT64)SIZE_2MB, &MapAttribute,= &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); UT_ASSERT_EQUAL (PageTableBufferSize, 0); TestStatus =3D IsPageTableValid (PageTable, PagingMode); @@ -217,10 +217,10 @@ TestCase1Gmapto4K ( MapAttribute.Bits.Present =3D 1; MapMask.Bits.Present =3D 1; MapMask.Uint64 =3D MAX_UINT64; - Status =3D PageTableMap (&PageTable, PagingMode, Buff= er, &PageTableBufferSize, (UINT64)0, (UINT64)SIZE_1GB, &MapAttribute, &MapM= ask); + Status =3D PageTableMap (&PageTable, PagingMode, Buff= er, &PageTableBufferSize, (UINT64)0, (UINT64)SIZE_1GB, &MapAttribute, &MapM= ask, NULL); UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL); Buffer =3D AllocatePages (EFI_SIZE_TO_PAGES (PageTableBufferSize)); - Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, (UINT64)0, (UINT64)SIZE_1GB, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, (UINT64)0, (UINT64)SIZE_1GB, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); =20 // @@ -281,11 +281,11 @@ TestCaseManualChangeReadWrite ( // // Create Page table to cover [0,2G], with ReadWrite =3D 1 // - Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, SIZE_2GB, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, SIZE_2GB, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL); BackupPageTableBufferSize =3D PageTableBufferSize; Buffer =3D AllocatePages (EFI_SIZE_TO_PAGES (PageTabl= eBufferSize)); - Status =3D PageTableMap (&PageTable, PagingMode, Buff= er, &PageTableBufferSize, 0, SIZE_2GB, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buff= er, &PageTableBufferSize, 0, SIZE_2GB, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); IsPageTableValid (PageTable, PagingMode); =20 @@ -331,7 +331,7 @@ TestCaseManualChangeReadWrite ( // Call library to change ReadWrite to 0 for [0,2M] // MapAttribute.Bits.ReadWrite =3D 0; - Status =3D PageTableMap (&PageTable, PagingMode, NU= LL, &PageTableBufferSize, 0, SIZE_2MB, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, NU= LL, &PageTableBufferSize, 0, SIZE_2MB, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); IsPageTableValid (PageTable, PagingMode); MapCount =3D 0; @@ -360,7 +360,7 @@ TestCaseManualChangeReadWrite ( // MapAttribute.Bits.ReadWrite =3D 1; PageTableBufferSize =3D 0; - Status =3D PageTableMap (&PageTable, PagingMode, NU= LL, &PageTableBufferSize, 0, SIZE_2MB, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, NU= LL, &PageTableBufferSize, 0, SIZE_2MB, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); IsPageTableValid (PageTable, PagingMode); MapCount =3D 0; @@ -434,10 +434,10 @@ TestCaseManualSizeNotMatch ( // // Create Page table to cover [2M-4K, 4M], with ReadWrite =3D 1 // - Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, SIZE_2MB - SIZE_4KB, SIZE_4KB + SIZE_2MB, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, SIZE_2MB - SIZE_4KB, SIZE_4KB + SIZE_2MB, &MapAttribute, &MapMask, N= ULL); UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL); Buffer =3D AllocatePages (EFI_SIZE_TO_PAGES (PageTableBufferSize)); - Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, SIZE_2MB - SIZE_4KB, SIZE_4KB + SIZE_2MB, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, SIZE_2MB - SIZE_4KB, SIZE_4KB + SIZE_2MB, &MapAttribute, &MapMask, N= ULL); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); IsPageTableValid (PageTable, PagingMode); =20 @@ -493,7 +493,7 @@ TestCaseManualSizeNotMatch ( MapAttribute.Bits.ReadWrite =3D 1; PageTableBufferSize =3D 0; MapAttribute.Bits.PageTableBaseAddress =3D (SIZE_2MB - SIZE_4KB) >> 12; - Status =3D PageTableMap (&PageTable, Pag= ingMode, Buffer, &PageTableBufferSize, SIZE_2MB - SIZE_4KB, SIZE_4KB * 2, &= MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, Pag= ingMode, Buffer, &PageTableBufferSize, SIZE_2MB - SIZE_4KB, SIZE_4KB * 2, &= MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); return UNIT_TEST_PASSED; } @@ -540,10 +540,10 @@ TestCaseManualNotMergeEntry ( // // Create Page table to cover [0,4M], and [4M, 1G] is not present // - Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, (UINT64)0, (UINT64)SIZE_2MB * 2, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, (UINT64)0, (UINT64)SIZE_2MB * 2, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL); Buffer =3D AllocatePages (EFI_SIZE_TO_PAGES (PageTableBufferSize)); - Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, (UINT64)0, (UINT64)SIZE_2MB * 2, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, (UINT64)0, (UINT64)SIZE_2MB * 2, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); TestStatus =3D IsPageTableValid (PageTable, PagingMode); if (TestStatus !=3D UNIT_TEST_PASSED) { @@ -555,7 +555,7 @@ TestCaseManualNotMergeEntry ( // It looks like the chioce is not bad, but sometime, we need to keep so= me small entry // PageTableBufferSize =3D 0; - Status =3D PageTableMap (&PageTable, PagingMode, NULL, &Pag= eTableBufferSize, (UINT64)0, (UINT64)SIZE_1GB, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, NULL, &Pag= eTableBufferSize, (UINT64)0, (UINT64)SIZE_1GB, &MapAttribute, &MapMask, NUL= L); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); TestStatus =3D IsPageTableValid (PageTable, PagingMode); if (TestStatus !=3D UNIT_TEST_PASSED) { @@ -564,7 +564,7 @@ TestCaseManualNotMergeEntry ( =20 MapAttribute.Bits.Accessed =3D 1; PageTableBufferSize =3D 0; - Status =3D PageTableMap (&PageTable, PagingMode, NUL= L, &PageTableBufferSize, (UINT64)0, (UINT64)SIZE_2MB, &MapAttribute, &MapMa= sk); + Status =3D PageTableMap (&PageTable, PagingMode, NUL= L, &PageTableBufferSize, (UINT64)0, (UINT64)SIZE_2MB, &MapAttribute, &MapMa= sk, NULL); // // If it didn't use a big 1G entry to cover whole range, only change [0,= 2M] for some attribute won't need extra memory // @@ -619,10 +619,10 @@ TestCaseManualChangeNx ( // // Create Page table to cover [0,2G], with Nx =3D 0 // - Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, (UINT64)0, (UINT64)SIZE_1GB * 2, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, (UINT64)0, (UINT64)SIZE_1GB * 2, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL); Buffer =3D AllocatePages (EFI_SIZE_TO_PAGES (PageTableBufferSize)); - Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, (UINT64)0, (UINT64)SIZE_1GB * 2, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, (UINT64)0, (UINT64)SIZE_1GB * 2, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); TestStatus =3D IsPageTableValid (PageTable, PagingMode); if (TestStatus !=3D UNIT_TEST_PASSED) { @@ -666,7 +666,7 @@ TestCaseManualChangeNx ( // // Call library to change Nx to 0 for [0,1G] // - Status =3D PageTableMap (&PageTable, PagingMode, NULL, &PageTableBufferS= ize, (UINT64)0, (UINT64)SIZE_1GB, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, NULL, &PageTableBufferS= ize, (UINT64)0, (UINT64)SIZE_1GB, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); TestStatus =3D IsPageTableValid (PageTable, PagingMode); if (TestStatus !=3D UNIT_TEST_PASSED) { @@ -741,13 +741,13 @@ TestCaseToCheckMapMaskAndAttr ( // // Create Page table to cover [0, 1G]. All fields of MapMask should be s= et. // - Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, SIZE_1GB, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, SIZE_1GB, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_INVALID_PARAMETER); MapMask.Uint64 =3D MAX_UINT64; - Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTa= bleBufferSize, 0, SIZE_1GB, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTa= bleBufferSize, 0, SIZE_1GB, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL); Buffer =3D AllocatePages (EFI_SIZE_TO_PAGES (PageTableBufferSize)); - Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, SIZE_1GB, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, SIZE_1GB, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); =20 // @@ -758,13 +758,13 @@ TestCaseToCheckMapMaskAndAttr ( MapAttribute.Bits.Present =3D 1; MapMask.Uint64 =3D 0; MapMask.Bits.Present =3D 1; - Status =3D PageTableMap (&PageTable, PagingMode, Buff= er, &PageTableBufferSize, SIZE_1GB, SIZE_1GB - SIZE_8KB, &MapAttribute, &Ma= pMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buff= er, &PageTableBufferSize, SIZE_1GB, SIZE_1GB - SIZE_8KB, &MapAttribute, &Ma= pMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_INVALID_PARAMETER); MapMask.Uint64 =3D MAX_UINT64; - Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTa= bleBufferSize, SIZE_1GB, SIZE_1GB - SIZE_8KB, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTa= bleBufferSize, SIZE_1GB, SIZE_1GB - SIZE_8KB, &MapAttribute, &MapMask, NULL= ); UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL); Buffer =3D AllocatePages (EFI_SIZE_TO_PAGES (PageTableBufferSize)); - Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, SIZE_1GB, SIZE_1GB - SIZE_8KB, &MapAttribute, &MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, SIZE_1GB, SIZE_1GB - SIZE_8KB, &MapAttribute, &MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); =20 // @@ -774,10 +774,10 @@ TestCaseToCheckMapMaskAndAttr ( MapAttribute.Uint64 =3D SIZE_2GB - SIZE_8KB; MapAttribute.Bits.ReadWrite =3D 1; MapMask.Uint64 =3D MAX_UINT64; - Status =3D PageTableMap (&PageTable, PagingMode, Bu= ffer, &PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute, &= MapMask); + Status =3D PageTableMap (&PageTable, PagingMode, Bu= ffer, &PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute, &= MapMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_INVALID_PARAMETER); MapAttribute.Bits.Present =3D 1; - Status =3D PageTableMap (&PageTable, PagingMode, Buff= er, &PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute, &Ma= pMask); + Status =3D PageTableMap (&PageTable, PagingMode, Buff= er, &PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute, &Ma= pMask, NULL); UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); =20 MapCount =3D 0; diff --git a/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/RandomTest.c b/Uef= iCpuPkg/Library/CpuPageTableLib/UnitTest/RandomTest.c index 8293e3d8eb..b2965d61fb 100644 --- a/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/RandomTest.c +++ b/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/RandomTest.c @@ -698,7 +698,8 @@ SingleMapEntryTest ( MapEntrys->Maps[MapsIndex].LinearAddress, MapEntrys->Maps[MapsIndex].Length, &MapEntrys->Maps[MapsIndex].Attribute, - &MapEntrys->Maps[MapsIndex].Mask + &MapEntrys->Maps[MapsIndex].Mask, + NULL ); =20 // @@ -736,7 +737,8 @@ SingleMapEntryTest ( MapEntrys->Maps[MapsIndex].LinearAddress, MapEntrys->Maps[MapsIndex].Length, &MapEntrys->Maps[MapsIndex].Attribute, - &MapEntrys->Maps[MapsIndex].Mask + &MapEntrys->Maps[MapsIndex].Mask, + NULL ); } =20 diff --git a/UefiCpuPkg/Library/MpInitLib/X64/CreatePageTable.c b/UefiCpuPk= g/Library/MpInitLib/X64/CreatePageTable.c index 7cf91ed9c4..c10121ede5 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/CreatePageTable.c +++ b/UefiCpuPkg/Library/MpInitLib/X64/CreatePageTable.c @@ -60,7 +60,8 @@ CreatePageTable ( Address, Length, &MapAttribute, - &MapMask + &MapMask, + NULL ); ASSERT (Status =3D=3D EFI_BUFFER_TOO_SMALL); DEBUG ((DEBUG_INFO, "AP Page Table Buffer Size =3D %x\n", PageTableBuffe= rSize)); @@ -75,7 +76,8 @@ CreatePageTable ( Address, Length, &MapAttribute, - &MapMask + &MapMask, + NULL ); ASSERT_EFI_ERROR (Status); return PageTable; --=20 2.31.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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