From nobody Sat May 4 17:50:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100785+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100785+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1678172102; cv=none; d=zohomail.com; s=zohoarc; b=XG89q0EcL6M/M80OY1jt9rTTxxOYGMjbyD0xUZ22CdD4TtWdtCYSt6atJdpysj30ujiJih3YEjObu6S0hoMQ06KYM+q3lS0d5NbtyXhc8zL73erVhGtHlm9pC1PaWsu1TkTotSBdC4p3Wl4Z5+XatJLIya8XKREXeXCQPPoBfgk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1678172102; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=Yp6ihH4wJZrLk12mOZGMLVdiT+SlLzz0ybBEIrH3rbI=; b=eksdtytq7V3DlHhfk40d1BOmiAwHMWgeyGnPVwYB7TzFtjN0cS4rJZENFUr9xtpJd9tGIh2VMdQFpc+PaUo6+GLDfpTsTL38OqkhClHh7tzmunMdOegIKtlxSQ5EQJSxOz/0QjyvPOc/vn2/y2PR59N0+GP2A8Zss1wpGay6Mgg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100785+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1678172102608394.33672362002415; Mon, 6 Mar 2023 22:55:02 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id 7s0fYY1788612xXWUitWrRpJ; Mon, 06 Mar 2023 22:55:02 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web10.8961.1678172101119966546 for ; Mon, 06 Mar 2023 22:55:01 -0800 X-Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-212-KreJ0fXSPu-NxcnnR6CeXQ-1; Tue, 07 Mar 2023 01:54:57 -0500 X-MC-Unique: KreJ0fXSPu-NxcnnR6CeXQ-1 X-Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.rdu2.redhat.com [10.11.54.2]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 5D74D85A588; Tue, 7 Mar 2023 06:54:56 +0000 (UTC) X-Received: from sirius.home.kraxel.org (unknown [10.39.192.23]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 1D7E340C10FA; Tue, 7 Mar 2023 06:54:56 +0000 (UTC) X-Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id E9091180092D; Tue, 7 Mar 2023 07:54:54 +0100 (CET) From: "Gerd Hoffmann" To: devel@edk2.groups.io Cc: Tom Lendacky , Jiewen Yao , Erdem Aktas , Anthony Perard , Gerd Hoffmann , Jordan Justen , Oliver Steffen , Min Xu , Michael Roth , James Bottomley , Pawel Polawski , Ard Biesheuvel , Julien Grall Subject: [edk2-devel] [PATCH v2 1/3] OvmfPkg/PlatformInitLib: update address space layout comment Date: Tue, 7 Mar 2023 07:54:52 +0100 Message-Id: <20230307065454.1434251-2-kraxel@redhat.com> In-Reply-To: <20230307065454.1434251-1-kraxel@redhat.com> References: <20230307065454.1434251-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.2 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,kraxel@redhat.com X-Gm-Message-State: mAHS0IK9nlAvdKjhYtSNmf6Mx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1678172102; bh=6vGsY3ZuYCKHsNcb+q0uNYBOB2zOixV7Udfv4iv1fFc=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=uZRhq4zN0vy/ErYX/K/pKOo1eOd+oGvtFoTDDJGjQiiI6z4YZoSjxrP1/c8CVWhlS82 If7WSf6BU89e48c9FM7KZF2FCmLfOjOk8VudYvV5/zJy8vV/+PtHwaEZtBlQnihd7A/DU ttOMEtIa3QwkY/bG30CcEMsBiX2wemWU8+4= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1678172104437100010 Content-Type: text/plain; charset="utf-8"; x-default="true" Move the commment up so it is placed just before the address space calculations start. Also add q35 memory layout. Signed-off-by: Gerd Hoffmann Reviewed-by: Anthony PERARD --- OvmfPkg/Library/PlatformInitLib/Platform.c | 36 ++++++++++++---------- 1 file changed, 19 insertions(+), 17 deletions(-) diff --git a/OvmfPkg/Library/PlatformInitLib/Platform.c b/OvmfPkg/Library/P= latformInitLib/Platform.c index 9fee6e481038..678e8e329023 100644 --- a/OvmfPkg/Library/PlatformInitLib/Platform.c +++ b/OvmfPkg/Library/PlatformInitLib/Platform.c @@ -152,26 +152,12 @@ PlatformMemMapInitialization ( return; } =20 - PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); - PciExBarBase =3D 0; - if (PlatformInfoHob->HostBridgeDevId =3D=3D INTEL_Q35_MCH_DEVICE_ID) { - // - // The MMCONFIG area is expected to fall between the top of low RAM and - // the base of the 32-bit PCI host aperture. - // - PciExBarBase =3D PcdGet64 (PcdPciExpressBaseAddress); - ASSERT (PlatformInfoHob->LowMemory <=3D PciExBarBase); - ASSERT (PciExBarBase <=3D MAX_UINT32 - SIZE_256MB); - PciBase =3D (UINT32)(PciExBarBase + SIZE_256MB); - } else { - ASSERT (PlatformInfoHob->LowMemory <=3D PlatformInfoHob->Uc32Base); - PciBase =3D PlatformInfoHob->Uc32Base; - } - // // address purpose size // ------------ -------- ------------------------- - // max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g) + // max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g) (pc) + // 0xB0000000 MMCONFIG 256 MB (q35) + // 0xC0000000 PCI MMIO 960 MB (q35) // 0xFC000000 gap 44 MB // 0xFEC00000 IO-APIC 4 KB // 0xFEC01000 gap 1020 KB @@ -181,6 +167,22 @@ PlatformMemMapInitialization ( // 0xFED20000 gap 896 KB // 0xFEE00000 LAPIC 1 MB // + PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); + PciExBarBase =3D 0; + if (PlatformInfoHob->HostBridgeDevId =3D=3D INTEL_Q35_MCH_DEVICE_ID) { + // + // The MMCONFIG area is expected to fall between the top of low RAM and + // the base of the 32-bit PCI host aperture. + // + PciExBarBase =3D PcdGet64 (PcdPciExpressBaseAddress); + ASSERT (PlatformInfoHob->LowMemory <=3D PciExBarBase); + ASSERT (PciExBarBase <=3D MAX_UINT32 - SIZE_256MB); + PciBase =3D (UINT32)(PciExBarBase + SIZE_256MB); + } else { + ASSERT (PlatformInfoHob->LowMemory <=3D PlatformInfoHob->Uc32Base); + PciBase =3D PlatformInfoHob->Uc32Base; + } + PciSize =3D 0xFC000000 - PciBase; PlatformAddIoMemoryBaseSizeHob (PciBase, PciSize); =20 --=20 2.39.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100785): https://edk2.groups.io/g/devel/message/100785 Mute This Topic: https://groups.io/mt/97444649/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 4 17:50:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100786+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100786+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1678172105; cv=none; d=zohomail.com; s=zohoarc; b=Oo8kyL1+YgnhbtlzQthSg2Wad9N18Z0Av4nNGHi+9knr0E8eIJPXyasNq0cl87Qme0KCoKlUlqDPuXAglCkG2TKkIptFu1Z8/jte5qsXIVK7KY7MRl36lnfv4uv+n9Tjw7iT5jkc/2jw0rI0+GWwKmOUXuJswjaECFgvRb2q8es= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1678172105; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=zrwOdOiRv1TGUs1T1po0N34Vs2lKgJTPqz6z7aLOdCo=; b=LYEtnlmojOlA7jzr6A8K8nZ2BVR1eBjIOLNJRxphVF8Lkyi6Z+Hv3nJEeZ4442oFh1vOnCkK9GR2YrdTKNwLBqyGdHklk8avYaImWUIwt4sXwP5xAiiRNJ5tLl9DDWxRdNBkGOUVQIVs3XSTXFzkQIMW4YTIfC9ngTYESLqOXKY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100786+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1678172105818763.9414930043865; Mon, 6 Mar 2023 22:55:05 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id IWx7YY1788612xUM7QWAFqQq; Mon, 06 Mar 2023 22:55:05 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web11.8924.1678172104897140610 for ; Mon, 06 Mar 2023 22:55:05 -0800 X-Received: from mimecast-mx02.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-230-LQ5_jmnpMQi_2laYFlp7iQ-1; Tue, 07 Mar 2023 01:54:58 -0500 X-MC-Unique: LQ5_jmnpMQi_2laYFlp7iQ-1 X-Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.rdu2.redhat.com [10.11.54.8]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 01A8E3806635; Tue, 7 Mar 2023 06:54:58 +0000 (UTC) X-Received: from sirius.home.kraxel.org (unknown [10.39.192.23]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 8D9D0C15BAE; Tue, 7 Mar 2023 06:54:57 +0000 (UTC) X-Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id EE9F11800931; Tue, 7 Mar 2023 07:54:54 +0100 (CET) From: "Gerd Hoffmann" To: devel@edk2.groups.io Cc: Tom Lendacky , Jiewen Yao , Erdem Aktas , Anthony Perard , Gerd Hoffmann , Jordan Justen , Oliver Steffen , Min Xu , Michael Roth , James Bottomley , Pawel Polawski , Ard Biesheuvel , Julien Grall Subject: [edk2-devel] [PATCH v2 2/3] OvmfPkg/PlatformInitLib: move mmconfig to 0xe0000000 Date: Tue, 7 Mar 2023 07:54:53 +0100 Message-Id: <20230307065454.1434251-3-kraxel@redhat.com> In-Reply-To: <20230307065454.1434251-1-kraxel@redhat.com> References: <20230307065454.1434251-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.8 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,kraxel@redhat.com X-Gm-Message-State: tYZJHe5on5k39kMuxNKpJr9Ox1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1678172105; bh=uVl6MesbTPl9Q/bSV8A3M2hpvsXHkdIq0cuRaNhKLUs=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=A1iXMN39KH8FilNw1awyQnyK+EoGInshn6rl/3LRH1zERrFzpNbfGvhBjIukXObciPU 3eqCbc2Yg1kIbC4Om4oKL7BsdTgqqG6DZCuD5p9a152WyqyTj4aaTkQI79qQk+tuv1vKB I7YT9rRkqduD/9x4tTlCwPciX8G0XRWzDDI= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1678172106495100002 Content-Type: text/plain; charset="utf-8"; x-default="true" Also swap the ordering of 32bit PCI MMIO window on q35, i.e. use the room between end of low memory and the start of the mmconfig bar. With a typical configuration on modern qemu with gigabyte-aligned memory the MMIO window start at 0x8000000, sized 1532 MB. In case there is memory present above 0x80000000 the window will start at 0xc0000000 instead, with 512 MB size. This depends on qemu commit 4a4418369d6d ("q35: fix mmconfig and PCI0._CRS"), so it raises the bar for the lowest supported version to qemu 4.1 (released Aug 2019). Signed-off-by: Gerd Hoffmann Reviewed-by: Anthony PERARD --- OvmfPkg/AmdSev/AmdSevX64.dsc | 2 +- OvmfPkg/IntelTdx/IntelTdxX64.dsc | 2 +- OvmfPkg/OvmfPkgIa32.dsc | 2 +- OvmfPkg/OvmfPkgIa32X64.dsc | 2 +- OvmfPkg/OvmfPkgX64.dsc | 2 +- OvmfPkg/OvmfXen.dsc | 2 +- OvmfPkg/Library/PlatformInitLib/Platform.c | 10 +++++----- 7 files changed, 11 insertions(+), 11 deletions(-) diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc index 1cebd6b4bcc2..e8481ba8cdf3 100644 --- a/OvmfPkg/AmdSev/AmdSevX64.dsc +++ b/OvmfPkg/AmdSev/AmdSevX64.dsc @@ -443,7 +443,7 @@ [PcdsFixedAtBuild] # # On Q35 machine types that QEMU intends to support in the long term, QE= MU # never lets the RAM below 4 GB exceed 2816 MB. - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000 + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 =20 !if $(SOURCE_DEBUG_ENABLE) =3D=3D TRUE gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 diff --git a/OvmfPkg/IntelTdx/IntelTdxX64.dsc b/OvmfPkg/IntelTdx/IntelTdxX6= 4.dsc index 95b9594ddce0..6fea54bb0b6b 100644 --- a/OvmfPkg/IntelTdx/IntelTdxX64.dsc +++ b/OvmfPkg/IntelTdx/IntelTdxX64.dsc @@ -448,7 +448,7 @@ [PcdsFixedAtBuild] # # On Q35 machine types that QEMU intends to support in the long term, QE= MU # never lets the RAM below 4 GB exceed 2816 MB. - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000 + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 =20 # # The NumberOfPages values below are ad-hoc. They are updated sporadical= ly at diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc index 22dc29330d2d..fff3e13151ad 100644 --- a/OvmfPkg/OvmfPkgIa32.dsc +++ b/OvmfPkg/OvmfPkgIa32.dsc @@ -560,7 +560,7 @@ [PcdsFixedAtBuild] # # On Q35 machine types that QEMU intends to support in the long term, QE= MU # never lets the RAM below 4 GB exceed 2816 MB. - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000 + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 =20 !if $(SOURCE_DEBUG_ENABLE) =3D=3D TRUE gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc index 6b539814bdb0..169b9b9c2beb 100644 --- a/OvmfPkg/OvmfPkgIa32X64.dsc +++ b/OvmfPkg/OvmfPkgIa32X64.dsc @@ -565,7 +565,7 @@ [PcdsFixedAtBuild] # # On Q35 machine types that QEMU intends to support in the long term, QE= MU # never lets the RAM below 4 GB exceed 2816 MB. - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000 + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 =20 !if $(SOURCE_DEBUG_ENABLE) =3D=3D TRUE gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc index e3c64456dfef..12b88b71ab7f 100644 --- a/OvmfPkg/OvmfPkgX64.dsc +++ b/OvmfPkg/OvmfPkgX64.dsc @@ -586,7 +586,7 @@ [PcdsFixedAtBuild] # # On Q35 machine types that QEMU intends to support in the long term, QE= MU # never lets the RAM below 4 GB exceed 2816 MB. - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000 + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 =20 !if $(SOURCE_DEBUG_ENABLE) =3D=3D TRUE gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 diff --git a/OvmfPkg/OvmfXen.dsc b/OvmfPkg/OvmfXen.dsc index c328987e8432..18144d9a6d94 100644 --- a/OvmfPkg/OvmfXen.dsc +++ b/OvmfPkg/OvmfXen.dsc @@ -434,7 +434,7 @@ [PcdsFixedAtBuild] # # On Q35 machine types that QEMU intends to support in the long term, QE= MU # never lets the RAM below 4 GB exceed 2816 MB. - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000 + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 =20 !if $(SOURCE_DEBUG_ENABLE) =3D=3D TRUE gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 diff --git a/OvmfPkg/Library/PlatformInitLib/Platform.c b/OvmfPkg/Library/P= latformInitLib/Platform.c index 678e8e329023..5cf8af825a2f 100644 --- a/OvmfPkg/Library/PlatformInitLib/Platform.c +++ b/OvmfPkg/Library/PlatformInitLib/Platform.c @@ -156,8 +156,8 @@ PlatformMemMapInitialization ( // address purpose size // ------------ -------- ------------------------- // max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g) (pc) - // 0xB0000000 MMCONFIG 256 MB (q35) - // 0xC0000000 PCI MMIO 960 MB (q35) + // max(top, 2g) PCI MMIO 0xE0000000 - max(top, 2g) (q35) + // 0xE0000000 MMCONFIG 256 MB (q35) // 0xFC000000 gap 44 MB // 0xFEC00000 IO-APIC 4 KB // 0xFEC01000 gap 1020 KB @@ -168,6 +168,7 @@ PlatformMemMapInitialization ( // 0xFEE00000 LAPIC 1 MB // PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); + PciBase =3D PlatformInfoHob->Uc32Base; PciExBarBase =3D 0; if (PlatformInfoHob->HostBridgeDevId =3D=3D INTEL_Q35_MCH_DEVICE_ID) { // @@ -177,13 +178,12 @@ PlatformMemMapInitialization ( PciExBarBase =3D PcdGet64 (PcdPciExpressBaseAddress); ASSERT (PlatformInfoHob->LowMemory <=3D PciExBarBase); ASSERT (PciExBarBase <=3D MAX_UINT32 - SIZE_256MB); - PciBase =3D (UINT32)(PciExBarBase + SIZE_256MB); + PciSize =3D (UINT32)(PciExBarBase - PciBase); } else { ASSERT (PlatformInfoHob->LowMemory <=3D PlatformInfoHob->Uc32Base); - PciBase =3D PlatformInfoHob->Uc32Base; + PciSize =3D 0xFC000000 - PciBase; } =20 - PciSize =3D 0xFC000000 - PciBase; PlatformAddIoMemoryBaseSizeHob (PciBase, PciSize); =20 PlatformInfoHob->PcdPciMmio32Base =3D PciBase; --=20 2.39.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100786): https://edk2.groups.io/g/devel/message/100786 Mute This Topic: https://groups.io/mt/97444650/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 4 17:50:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100783+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100783+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1678172101; cv=none; d=zohomail.com; s=zohoarc; b=GSqY3RktbLo3U/peYYUSkV6k9maeABv8lMV7YcuazcrQs9NnWMJ35RGwVr9NXhhNLTplUEMLLGxYQXZZ4B9oppz3/B5VVTFxc+m/M0ecs2h/ie6es54pAaomEBs/Jtq4Fq19dNiJhVttdEBKtj5guD0q4trUkBqF0ZXAcBuYglg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1678172101; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=hoTVTsYmTgbfgdG5ykSRJYh3wsBhRsX/B7ICvMo7IVQ=; b=QDrj8UxEow9oIUFGk7yg+xS2WFX85mSOlTQnjNmi5Loh/ueeHF5aRxvUm50qY0WZ0DIwsEKCutlwxgMnPh5g3A2X9+7F3HCxsG1tq/3xX7l5Ol6faBHrN89iSOVN+Q3JiSIiXuRcpJAdFItD4SbAVIJUMVqQPJAhQ8V9cAtm1yU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100783+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1678172101812161.66589473092563; Mon, 6 Mar 2023 22:55:01 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id Fqn5YY1788612xdvgp2ah6Zm; Mon, 06 Mar 2023 22:55:01 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web11.8922.1678172100877670745 for ; Mon, 06 Mar 2023 22:55:01 -0800 X-Received: from mimecast-mx02.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-460-k7CMJASMPxanSHnVbYV2dQ-1; Tue, 07 Mar 2023 01:54:58 -0500 X-MC-Unique: k7CMJASMPxanSHnVbYV2dQ-1 X-Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id C75CC280AA2A; Tue, 7 Mar 2023 06:54:57 +0000 (UTC) X-Received: from sirius.home.kraxel.org (unknown [10.39.192.23]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 8ECDD14171C3; Tue, 7 Mar 2023 06:54:57 +0000 (UTC) X-Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id F262E180093B; Tue, 7 Mar 2023 07:54:54 +0100 (CET) From: "Gerd Hoffmann" To: devel@edk2.groups.io Cc: Tom Lendacky , Jiewen Yao , Erdem Aktas , Anthony Perard , Gerd Hoffmann , Jordan Justen , Oliver Steffen , Min Xu , Michael Roth , James Bottomley , Pawel Polawski , Ard Biesheuvel , Julien Grall Subject: [edk2-devel] [PATCH v2 3/3] OvmfPkg/PlatformInitLib: simplify mtrr setup Date: Tue, 7 Mar 2023 07:54:54 +0100 Message-Id: <20230307065454.1434251-4-kraxel@redhat.com> In-Reply-To: <20230307065454.1434251-1-kraxel@redhat.com> References: <20230307065454.1434251-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.7 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,kraxel@redhat.com X-Gm-Message-State: wCXmO8ZNXO49c76aDZIazw3lx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1678172101; bh=xjME1fWQ3Af2kwWL4TWqNGYdCfKpjAob4jTVn0A6+8c=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=mcMgN47apYWwUVXGfku9SngfG5x1E1gbT9JFcakL5+TpnmMk/RUGRbJ8COLh3P9WY4T cNmBEZHT07iKO7o11EwMDMfOyP9oUKkWu8fyyO98SD/VIGqTybgYP6p4CBjB1bx/EEXWQ rxZT5i4/HRknNzVGVwbtEhRRGsbBC1iY/iw= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1678172102457100004 Content-Type: text/plain; charset="utf-8"; x-default="true" With the new mmconfig location at 0xe0000000 above the 32-bit PCI MMIO window we don't have to special-case the mmconfig xbar any more. We'll just add a mtrr uncachable entry starting at MMIO window base and ending at 4GB. Update comments to match reality. Signed-off-by: Gerd Hoffmann Reviewed-by: Anthony PERARD --- OvmfPkg/Library/PlatformInitLib/MemDetect.c | 36 +++++++++------------ 1 file changed, 15 insertions(+), 21 deletions(-) diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/= PlatformInitLib/MemDetect.c index 38cece9173e8..f85a63ac5130 100644 --- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c +++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c @@ -61,33 +61,20 @@ PlatformQemuUc32BaseInitialization ( return; } =20 + ASSERT ( + PlatformInfoHob->HostBridgeDevId =3D=3D INTEL_Q35_MCH_DEVICE_ID || + PlatformInfoHob->HostBridgeDevId =3D=3D INTEL_82441_DEVICE_ID + ); + PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); =20 if (PlatformInfoHob->HostBridgeDevId =3D=3D INTEL_Q35_MCH_DEVICE_ID) { ASSERT (PcdGet64 (PcdPciExpressBaseAddress) <=3D MAX_UINT32); ASSERT (PcdGet64 (PcdPciExpressBaseAddress) >=3D PlatformInfoHob->LowM= emory); - - if (PlatformInfoHob->LowMemory <=3D BASE_2GB) { - // Newer qemu with gigabyte aligned memory, - // 32-bit pci mmio window is 2G -> 4G then. - PlatformInfoHob->Uc32Base =3D BASE_2GB; - } else { - // - // On q35, the 32-bit area that we'll mark as UC, through variable M= TRRs, - // starts at PcdPciExpressBaseAddress. The platform DSC is responsib= le for - // setting PcdPciExpressBaseAddress such that describing the - // [PcdPciExpressBaseAddress, 4GB) range require a very small number= of - // variable MTRRs (preferably 1 or 2). - // - PlatformInfoHob->Uc32Base =3D (UINT32)PcdGet64 (PcdPciExpressBaseAdd= ress); - } - - return; } =20 - ASSERT (PlatformInfoHob->HostBridgeDevId =3D=3D INTEL_82441_DEVICE_ID); // - // On i440fx, start with the [LowerMemorySize, 4GB) range. Make sure one + // Start with the [LowerMemorySize, 4GB) range. Make sure one // variable MTRR suffices by truncating the size to a whole power of two, // while keeping the end affixed to 4GB. This will round the base up. // @@ -1027,6 +1014,13 @@ PlatformQemuInitializeRam ( // practically any alignment, and we may not have enough variable MTRRs = to // cover it exactly. // + // Because of that PlatformQemuUc32BaseInitialization() will round + // up PlatformInfoHob->LowMemory to make sure a single mtrr register + // is enough. The the result will be stored in + // PlatformInfoHob->Uc32Base. On a typical qemu configuration with + // gigabyte-alignment being used LowMemory will be 2 or 3 GB and no + // rounding is needed, so LowMemory and Uc32Base will be identical. + // if (IsMtrrSupported () && (PlatformInfoHob->HostBridgeDevId !=3D CLOUDHV= _DEVICE_ID)) { MtrrGetAllMtrrs (&MtrrSettings); =20 @@ -1056,8 +1050,8 @@ PlatformQemuInitializeRam ( ASSERT_EFI_ERROR (Status); =20 // - // Set the memory range from the start of the 32-bit MMIO area (32-bit= PCI - // MMIO aperture on i440fx, PCIEXBAR on q35) to 4GB as uncacheable. + // Set the memory range from the start of the 32-bit PCI MMIO + // aperture to 4GB as uncacheable. // Status =3D MtrrSetMemoryAttribute ( PlatformInfoHob->Uc32Base, --=20 2.39.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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