From nobody Tue Feb 10 05:10:46 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100688+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100688+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1677837840; cv=none; d=zohomail.com; s=zohoarc; b=hlvh4gIWCqQHrDaTMPArvzd/4e2nZRRdQYfxjLB1XvX/p6nhuKdoEcr/IDvsG+eMh1gWXsFSwii4LkNsj6MMVCMw33dm0EM2xGawfgB7u/xG91lyrS1QZEwCGYGf5lb6fsoXKAnWTTJuVni5KKSVy7o4PNIyFtTDhGhfmiDd9vo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1677837840; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=qY6FmyLRsut7VNxlg+AhGFwnm9dl6we3QMHeFGEmPsM=; b=C1aa/sF7nGOFf2gOdptEdNVynyStDGyjmpB1wQSX4Ii2ToPWrAmKcTjtDy4eriM0uDkdYYGx1wHD8aj34DAhmxZXY9jyTWWhEHwNOq/Mi/Cv104je01gM56dspftyRIds8r0nRaT2CpJrpM020RHJDlgXvo8lZkmVYXkd7WzITE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100688+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1677837840018606.5760523369042; Fri, 3 Mar 2023 02:04:00 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id cX6KYY1788612xJG4EkTt5zt; Fri, 03 Mar 2023 02:03:59 -0800 X-Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web10.19850.1677837828807486048 for ; Fri, 03 Mar 2023 02:03:59 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10637"; a="318831733" X-IronPort-AV: E=Sophos;i="5.98,230,1673942400"; d="scan'208";a="318831733" X-Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Mar 2023 02:03:58 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10637"; a="818421040" X-IronPort-AV: E=Sophos;i="5.98,230,1673942400"; d="scan'208";a="818421040" X-Received: from shwdeopenlab702.ccr.corp.intel.com ([10.239.55.92]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Mar 2023 02:03:56 -0800 From: "duntan" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann Subject: [edk2-devel] [PATCH 4/6] UefiCpuPkg/CpuPageTableLib: Add manual TestCase to check input Mask Date: Fri, 3 Mar 2023 18:03:34 +0800 Message-Id: <20230303100336.2138-5-dun.tan@intel.com> In-Reply-To: <20230303100336.2138-1-dun.tan@intel.com> References: <20230303100336.2138-1-dun.tan@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,dun.tan@intel.com X-Gm-Message-State: pvq7SP1NgPo67uJXqur9Phgdx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1677837839; bh=8aQ/sBW9QqVpZpySXmcOF9ZXzdmeHmQJGHtijNhSSHI=; h=Cc:Date:From:Reply-To:Subject:To; b=CxHU38OChQpEs50hA06CrX4XXzmI5EUr9ZOj0M++VQgm/q+D6DpUcpmpqomNJaJQWuv 2Wlml8FLIwhFUwzP6V9zROK13SQ4n/2S/giBb/Epu+5kfawTLtT1qHombOgFImLfiJ0TM MIkwfw6qqIhUK/89c01aYMNxrYhuNPO1KE0= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1677837840502100014 Content-Type: text/plain; charset="utf-8" Add manual test case to check input Mask. When creating new page table or mapping not-present range in existing page table, all the non-reserved fields of Mask should not be 0. Signed-off-by: Dun Tan Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Gerd Hoffmann --- UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUnitTestHost.c = | 122 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 121 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUni= tTestHost.c b/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUn= itTestHost.c index 3014a03243..5957b80d6e 100644 --- a/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUnitTestHo= st.c +++ b/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUnitTestHo= st.c @@ -697,6 +697,126 @@ TestCaseManualChangeNx ( return UNIT_TEST_PASSED; } =20 +/** + Check if the input Mask is expected when creating new page table or map = not-present + range in existing page table. + + @param[in] Context [Optional] An optional parameter that enables: + 1) test-case reuse with varied parameters and + 2) test-case re-entry for Target tests that need a + reboot. This parameter is a VOID* and it is the + responsibility of the test author to ensure that = the + contents are well understood by all test cases th= at may + consume it. + + @retval UNIT_TEST_PASSED The Unit test has completed and th= e test + case was successful. + @retval UNIT_TEST_ERROR_TEST_FAILED A test case assertion has failed. +**/ +UNIT_TEST_STATUS +EFIAPI +TestCaseToCheckMapMask ( + IN UNIT_TEST_CONTEXT Context + ) +{ + UINTN PageTable; + PAGING_MODE PagingMode; + VOID *Buffer; + UINTN PageTableBufferSize; + IA32_MAP_ATTRIBUTE MapAttribute; + IA32_MAP_ATTRIBUTE ExpectedMapAttribute; + IA32_MAP_ATTRIBUTE MapMask; + RETURN_STATUS Status; + IA32_MAP_ENTRY *Map; + UINTN MapCount; + + PagingMode =3D Paging4Level; + PageTableBufferSize =3D 0; + PageTable =3D 0; + Buffer =3D NULL; + MapAttribute.Uint64 =3D 0; + MapAttribute.Bits.Present =3D 1; + MapMask.Uint64 =3D 0; + MapMask.Bits.Present =3D 1; + // + // Create Page table to cover [0, 1G]. All fields of MapMask should be s= et. + // + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, SIZE_1GB, &MapAttribute, &MapMask); + UT_ASSERT_EQUAL (Status, RETURN_INVALID_PARAMETER); + MapMask.Uint64 =3D MAX_UINT64; + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTa= bleBufferSize, 0, SIZE_1GB, &MapAttribute, &MapMask); + UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL); + Buffer =3D AllocatePages (EFI_SIZE_TO_PAGES (PageTableBufferSize)); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, 0, SIZE_1GB, &MapAttribute, &MapMask); + UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); + + // + // Update Page table to cover [1G, 2G - 8K]. All fields of MapMask shoul= d be set. + // + PageTableBufferSize =3D 0; + MapAttribute.Uint64 =3D SIZE_1GB; + MapAttribute.Bits.Present =3D 1; + MapMask.Uint64 =3D 0; + MapMask.Bits.Present =3D 1; + Status =3D PageTableMap (&PageTable, PagingMode, Buff= er, &PageTableBufferSize, SIZE_1GB, SIZE_1GB - SIZE_8KB, &MapAttribute, &Ma= pMask); + UT_ASSERT_EQUAL (Status, RETURN_INVALID_PARAMETER); + MapMask.Uint64 =3D MAX_UINT64; + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTa= bleBufferSize, SIZE_1GB, SIZE_1GB - SIZE_8KB, &MapAttribute, &MapMask); + UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL); + Buffer =3D AllocatePages (EFI_SIZE_TO_PAGES (PageTableBufferSize)); + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTableBuffe= rSize, SIZE_1GB, SIZE_1GB - SIZE_8KB, &MapAttribute, &MapMask); + UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); + + // + // Update Page table to cover [2G - 8K, 2G]. All fields of MapMask shoul= d be set. + // + PageTableBufferSize =3D 0; + MapAttribute.Uint64 =3D SIZE_2GB - SIZE_8KB; + MapAttribute.Bits.Present =3D 1; + MapMask.Uint64 =3D 0; + MapMask.Bits.Present =3D 1; + Status =3D PageTableMap (&PageTable, PagingMode, Buff= er, &PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute, &Ma= pMask); + UT_ASSERT_EQUAL (Status, RETURN_INVALID_PARAMETER); + MapMask.Uint64 =3D MAX_UINT64; + Status =3D PageTableMap (&PageTable, PagingMode, Buffer, &PageTa= bleBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute, &MapMask); + UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); + + // + // Update Page table to set [2G - 8K, 2G] as RW. Only need to set the Ma= pMask.Bits.ReadWrite to 1. + // + PageTableBufferSize =3D 0; + MapAttribute.Uint64 =3D 0; + MapAttribute.Bits.ReadWrite =3D 1; + MapMask.Uint64 =3D 0; + MapMask.Bits.ReadWrite =3D 1; + Status =3D PageTableMap (&PageTable, PagingMode, Bu= ffer, &PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute, &= MapMask); + UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); + + MapCount =3D 0; + Status =3D PageTableParse (PageTable, PagingMode, NULL, &MapCount); + UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL); + Map =3D AllocatePages (EFI_SIZE_TO_PAGES (MapCount* sizeof (IA32_MAP_= ENTRY))); + Status =3D PageTableParse (PageTable, PagingMode, Map, &MapCount); + UT_ASSERT_EQUAL (Status, RETURN_SUCCESS); + + // + // There should be two ranges [0, 2G-8k] with RW =3D 0 and [2G-8k, 2G] w= ith RW =3D 1 + // + UT_ASSERT_EQUAL (MapCount, 2); + UT_ASSERT_EQUAL (Map[0].LinearAddress, 0); + UT_ASSERT_EQUAL (Map[0].Length, SIZE_2GB - SIZE_8KB); + ExpectedMapAttribute.Uint64 =3D 0; + ExpectedMapAttribute.Bits.Present =3D 1; + UT_ASSERT_EQUAL (Map[0].Attribute.Uint64, ExpectedMapAttribute.Uint64); + UT_ASSERT_EQUAL (Map[1].LinearAddress, SIZE_2GB - SIZE_8KB); + UT_ASSERT_EQUAL (Map[1].Length, SIZE_8KB); + ExpectedMapAttribute.Uint64 =3D SIZE_2GB - SIZE_8KB; + ExpectedMapAttribute.Bits.Present =3D 1; + ExpectedMapAttribute.Bits.ReadWrite =3D 1; + UT_ASSERT_EQUAL (Map[1].Attribute.Uint64, ExpectedMapAttribute.Uint64); + return UNIT_TEST_PASSED; +} + /** Initialize the unit test framework, suite, and unit tests for the sample unit tests and run the unit tests. @@ -746,7 +866,7 @@ UefiTestMain ( AddTestCase (ManualTestCase, "Check if the parent entry has different Re= adWrite attribute", "Manual Test Case5", TestCaseManualChangeReadWrite, NUL= L, NULL, NULL); AddTestCase (ManualTestCase, "Check if the parent entry has different Nx= attribute", "Manual Test Case6", TestCaseManualChangeNx, NULL, NULL, NULL); AddTestCase (ManualTestCase, "Check if the needed size is expected", "Ma= nual Test Case7", TestCaseManualSizeNotMatch, NULL, NULL, NULL); - + AddTestCase (ManualTestCase, "Check MapMask when creating new page table= or mapping not-present range", "Manual Test Case8", TestCaseToCheckMapMask= , NULL, NULL, NULL); // // Populate the Random Test Cases. // --=20 2.31.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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