From nobody Sun Apr 28 03:20:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100572+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100572+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1677651009; cv=none; d=zohomail.com; s=zohoarc; b=nEEWbU/gRQRd4e7s/DmboONuxahv/cfqWSQtowReEOwB7azGx3j20t0Kxo5SjXb0bk0jAn20DdERQ+Ql/h8sx7u1XK/C1Bg9TEDK2dSj6ex517eAxHBgBdMNdGncR3UPdOcHJnE0fOqz6SAmmfGO7+BIZS0YXZme1DCpQXWTjhQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1677651009; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=BtNGDb1nBmbAC/Yjm1WeKgy5t6OJM0wJcFCHL/oEvGo=; b=LhwQZ3dpvN456URzrK5+AhF5oOmZVcWPTZbLTs1fXwzMUkCNSuw54HzJAATzw6yRaw8l8m7ZcrK3nW6zMzrGMfVEF6tdE3Q/pC0MZCPPfzPXx9ovoPSdUrdmDk4mKd3OkAI5AyLZ8SLIYkvx6kHkyig8H1ECYCd+wQkLsg+s7Tw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100572+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1677651008961398.9094970399548; Tue, 28 Feb 2023 22:10:08 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id wMNFYY1788612xqeLsFpcHut; Tue, 28 Feb 2023 22:10:08 -0800 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web10.15979.1677651005289052489 for ; Tue, 28 Feb 2023 22:10:08 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10635"; a="420590635" X-IronPort-AV: E=Sophos;i="5.98,224,1673942400"; d="scan'208";a="420590635" X-Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 22:10:08 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10635"; a="1003533714" X-IronPort-AV: E=Sophos;i="5.98,224,1673942400"; d="scan'208";a="1003533714" X-Received: from shwdeopenlab705.ccr.corp.intel.com ([10.239.55.55]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 22:10:06 -0800 From: "Yuanhao Xie" To: devel@edk2.groups.io Cc: Guo Dong , Ray Ni , Sean Rhodes , James Lu , Gua Guo Subject: [edk2-devel] [Patch V4 1/8] UefiCpuPkg: Check AP_SAFE_STACK_SIZE during build time. Date: Wed, 1 Mar 2023 14:09:47 +0800 Message-Id: <20230301060954.1464-2-yuanhao.xie@intel.com> In-Reply-To: <20230301060954.1464-1-yuanhao.xie@intel.com> References: <20230301060954.1464-1-yuanhao.xie@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,yuanhao.xie@intel.com X-Gm-Message-State: i2zlAIEKG3jDPzek2H2nTuczx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1677651008; bh=CBaYdqNhdB1uhQyrLBiHdfiDptV+COxaqVd+FJZTvCI=; h=Cc:Date:From:Reply-To:Subject:To; b=eSu25lmFJnhJ4LFFAc1Sgr/U6QzF99IlwDPhuAgMDwl/EiNwdQviZBAK0/hGySdbFCJ WVrJ+xF4JCUl8o9HCQtLCVB+B636DUnUHKpv0dBj8qG3EwRynCxIxtcM2DbdwPzrsWptU xz46eNiqHXBrlOwFteNU/dl/AuxEvL1HdQs= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1677651009397100001 Content-Type: text/plain; charset="utf-8" Check if AP_SAFE_STACK_SIZE is aligned with CPU_STACK_ALIGNMENT during build time. No functional or structural changes. Cc: Guo Dong Cc: Ray Ni Cc: Sean Rhodes Cc: James Lu Cc: Gua Guo Signed-off-by: Yuanhao Xie Acked-by: Gerd Hoffmann Reviewed-by: Ray Ni Tested-by: Gerd Hoffmann --- UefiCpuPkg/Library/MpInitLib/MpLib.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpIn= itLib/MpLib.h index f5086e497e..a73a89d2a5 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -1,7 +1,7 @@ /** @file Common header file for MP Initialize Library. =20 - Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.
+ Copyright (c) 2016 - 2023, Intel Corporation. All rights reserved.
Copyright (c) 2020, AMD Inc. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent @@ -311,6 +311,7 @@ typedef struct { =20 #define AP_SAFE_STACK_SIZE 128 #define AP_RESET_STACK_SIZE AP_SAFE_STACK_SIZE +STATIC_ASSERT ((AP_SAFE_STACK_SIZE & (CPU_STACK_ALIGNMENT - 1)) =3D=3D 0, = "AP_SAFE_STACK_SIZE is not aligned with CPU_STACK_ALIGNMENT"); =20 #pragma pack(1) =20 --=20 2.36.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100572): https://edk2.groups.io/g/devel/message/100572 Mute This Topic: https://groups.io/mt/97309031/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun Apr 28 03:20:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100573+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100573+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1677651012; cv=none; d=zohomail.com; s=zohoarc; b=b2P1e0aOd0d23md6ySYRdoT1qOPyhEcLbbY9kHcPMMceM/dJPwWIOI1+cCOxbGKrKfQyKs9P7vM6Abhq6RCsbhdCncw6lY8uBhTcAiqD+CTVsryblptmOqnfkduhVVc6iBKLxYUzxE2v1OkmAw07sADnkg/sGUUnF9pQmLm4/qA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1677651012; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=gEpAIfXFhasEnEeibg3XYP7qNt1QTkrwdBFenvRedNc=; b=eyMaQ1rizs+Ajrey9bRj8WMeCpp/6XoVcgX3yxxgIPLnDbtQufREDp7Fyvakt2QkNMTvDxNpZ4MSkR98sjwyWoUQ1nfEzeRmK4rofBrI9y2Frlb55x2yguoQu70wHUNKt6hQmAiLVpNIQAIeBxMnmkRzR3/GTSa387NF6WQ6lmo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100573+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 167765101224610.060027946890159; Tue, 28 Feb 2023 22:10:12 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id LgNqYY1788612xNIkZVVI5vF; Tue, 28 Feb 2023 22:10:11 -0800 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web10.15979.1677651005289052489 for ; Tue, 28 Feb 2023 22:10:11 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10635"; a="420590664" X-IronPort-AV: E=Sophos;i="5.98,224,1673942400"; d="scan'208";a="420590664" X-Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 22:10:11 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10635"; a="1003533718" X-IronPort-AV: E=Sophos;i="5.98,224,1673942400"; d="scan'208";a="1003533718" X-Received: from shwdeopenlab705.ccr.corp.intel.com ([10.239.55.55]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 22:10:09 -0800 From: "Yuanhao Xie" To: devel@edk2.groups.io Cc: Guo Dong , Ray Ni , Sean Rhodes , James Lu , Gua Guo Subject: [edk2-devel] [Patch V4 2/8] UefiCpuPkg: Split the path in RelocateApLoop into two. Date: Wed, 1 Mar 2023 14:09:48 +0800 Message-Id: <20230301060954.1464-3-yuanhao.xie@intel.com> In-Reply-To: <20230301060954.1464-1-yuanhao.xie@intel.com> References: <20230301060954.1464-1-yuanhao.xie@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,yuanhao.xie@intel.com X-Gm-Message-State: HzMS95sfebKcVQ1KPM1OKjKwx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1677651011; bh=EOxNKLshINqEOBVqkWJ1znfPovnJ4EW8H0ZIXj6BwDc=; h=Cc:Date:From:Reply-To:Subject:To; b=IxFYM9zsZoHsceFLXSNEgfxJDQktoufUJ8FYD7lnRypGoZWKQ3j6HGL6H42WYd56//g d8W/oIWQLQkiCVGQNPU0QnA7pDQ0j8TeQks4Px0547XAL4UIKSimHyZip1aF73uSG95MN NP8UfEjAVaa312oxKfhMd8wNWWpR/d6aDu4= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1677651013478100002 Content-Type: text/plain; charset="utf-8" Add the union RELOCATE_AP_LOOP_ENTRY, split the path in RelocateApLoop into two: 1. 64-bit AMD processors with SEV-ES 2. Intel processors (32-bit or 64-bit), 32-bit AMD processors, or 64-bit AMD processors without SEV-ES. Cc: Guo Dong Cc: Ray Ni Cc: Sean Rhodes Cc: James Lu Cc: Gua Guo Signed-off-by: Yuanhao Xie Acked-by: Gerd Hoffmann Reviewed-by: Ray Ni Tested-by: Gerd Hoffmann --- UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 70 +++++++++++++++++++++++++++++= +++++++++++++---------------------------- UefiCpuPkg/Library/MpInitLib/MpLib.h | 6 ++++++ 2 files changed, 48 insertions(+), 28 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c b/UefiCpuPkg/Library/M= pInitLib/DxeMpLib.c index a84e9e33ba..e9ac858f4f 100644 --- a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c @@ -1,7 +1,7 @@ /** @file MP initialize support functions for DXE phase. =20 - Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.
+ Copyright (c) 2016 - 2023, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -20,14 +20,14 @@ =20 #define AP_SAFE_STACK_SIZE 128 =20 -CPU_MP_DATA *mCpuMpData =3D NULL; -EFI_EVENT mCheckAllApsEvent =3D NULL; -EFI_EVENT mMpInitExitBootServicesEvent =3D NULL; -EFI_EVENT mLegacyBootEvent =3D NULL; -volatile BOOLEAN mStopCheckAllApsStatus =3D TRUE; -VOID *mReservedApLoopFunc =3D NULL; -UINTN mReservedTopOfApStack; -volatile UINT32 mNumberToFinish =3D 0; +CPU_MP_DATA *mCpuMpData =3D NULL; +EFI_EVENT mCheckAllApsEvent =3D NULL; +EFI_EVENT mMpInitExitBootServicesEvent =3D NULL; +EFI_EVENT mLegacyBootEvent =3D NULL; +volatile BOOLEAN mStopCheckAllApsStatus =3D TRUE; +RELOCATE_AP_LOOP_ENTRY mReservedApLoop; +UINTN mReservedTopOfApStack; +volatile UINT32 mNumberToFinish =3D 0; =20 // // Begin wakeup buffer allocation below 0x88000 @@ -378,32 +378,46 @@ RelocateApLoop ( IN OUT VOID *Buffer ) { - CPU_MP_DATA *CpuMpData; - BOOLEAN MwaitSupport; - ASM_RELOCATE_AP_LOOP AsmRelocateApLoopFunc; - UINTN ProcessorNumber; - UINTN StackStart; + CPU_MP_DATA *CpuMpData; + BOOLEAN MwaitSupport; + UINTN ProcessorNumber; + UINTN StackStart; =20 MpInitLibWhoAmI (&ProcessorNumber); CpuMpData =3D GetCpuMpData (); MwaitSupport =3D IsMwaitSupport (); if (CpuMpData->UseSevEsAPMethod) { + // + // 64-bit AMD processors with SEV-ES + // StackStart =3D CpuMpData->SevEsAPResetStackStart; + mReservedApLoop.AmdSevEntry ( + MwaitSupport, + CpuMpData->ApTargetCState, + CpuMpData->PmCodeSegment, + StackStart - ProcessorNumber * AP_SAFE_STACK_SIZE, + (UINTN)&mNumberToFinish, + CpuMpData->Pm16CodeSegment, + CpuMpData->SevEsAPBuffer, + CpuMpData->WakeupBuffer + ); } else { + // + // Intel processors (32-bit or 64-bit), 32-bit AMD processors, or 64-b= it AMD processors without SEV-ES + // StackStart =3D mReservedTopOfApStack; + mReservedApLoop.GenericEntry ( + MwaitSupport, + CpuMpData->ApTargetCState, + CpuMpData->PmCodeSegment, + StackStart - ProcessorNumber * AP_SAFE_STACK_SIZE, + (UINTN)&mNumberToFinish, + CpuMpData->Pm16CodeSegment, + CpuMpData->SevEsAPBuffer, + CpuMpData->WakeupBuffer + ); } =20 - AsmRelocateApLoopFunc =3D (ASM_RELOCATE_AP_LOOP)(UINTN)mReservedApLoopFu= nc; - AsmRelocateApLoopFunc ( - MwaitSupport, - CpuMpData->ApTargetCState, - CpuMpData->PmCodeSegment, - StackStart - ProcessorNumber * AP_SAFE_STACK_SIZE, - (UINTN)&mNumberToFinish, - CpuMpData->Pm16CodeSegment, - CpuMpData->SevEsAPBuffer, - CpuMpData->WakeupBuffer - ); // // It should never reach here // @@ -547,8 +561,8 @@ InitMpGlobalData ( ); ASSERT_EFI_ERROR (Status); =20 - mReservedApLoopFunc =3D (VOID *)(UINTN)Address; - ASSERT (mReservedApLoopFunc !=3D NULL); + mReservedApLoop.Data =3D (VOID *)(UINTN)Address; + ASSERT (mReservedApLoop.Data !=3D NULL); =20 // // Make sure that the buffer memory is executable if NX protection is en= abled @@ -583,7 +597,7 @@ InitMpGlobalData ( mReservedTopOfApStack =3D (UINTN)Address + ApSafeBufferSize; ASSERT ((mReservedTopOfApStack & (UINTN)(CPU_STACK_ALIGNMENT - 1)) =3D= =3D 0); CopyMem ( - mReservedApLoopFunc, + mReservedApLoop.Data, CpuMpData->AddressMap.RelocateApLoopFuncAddress, CpuMpData->AddressMap.RelocateApLoopFuncSize ); diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpIn= itLib/MpLib.h index a73a89d2a5..81a95733fc 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -402,6 +402,12 @@ AsmExchangeRole ( IN CPU_EXCHANGE_ROLE_INFO *OthersInfo ); =20 +typedef union { + VOID *Data; + ASM_RELOCATE_AP_LOOP AmdSevEntry; // 64-bit AMD Sev processors + ASM_RELOCATE_AP_LOOP GenericEntry; // Intel processors (32-bit or 64-= bit), 32-bit AMD processors, or AMD non-Sev processors +} RELOCATE_AP_LOOP_ENTRY; + /** Get the pointer to CPU MP Data structure. =20 --=20 2.36.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100573): https://edk2.groups.io/g/devel/message/100573 Mute This Topic: https://groups.io/mt/97309032/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun Apr 28 03:20:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100574+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100574+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1677651014; cv=none; d=zohomail.com; s=zohoarc; b=U4v1Y9qu5fEvD/PJb/58SQHzG233a/sS4Oi/5aPZ2bdg0Kw3Fo/TDN9cIqDq2kUGBSOdWIxvMVUXfFEE20Q3J43oO+OHqTTz2VZhK8E3xwJZL5FfpIXaBcez1oSh0OC4qcXj1s1dzhGr8mwvLr3Ibsna0RVm+HzIORmtdrahYz4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1677651014; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=X+WkjSJ03PrYH+0KY3F4XZN6/YFmNbG3tRZki28y6ZI=; b=CeEfycU39iHJzjJwdYXTwQFQpgQBg1+L2mknLChVZLwzdX0rpqxpouKpSzvs7WyfijQ/+WOmEHriVVUhSKc2SbNsTZhupTcHRr3Mafps4vjANxSKyxlIr+hO2pjrBPVGM+aC2+Hi9oLRFf8ywiOzqXugV638nBwN3dPbMLW9xys= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100574+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1677651014243485.1321591956761; Tue, 28 Feb 2023 22:10:14 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id 0rtyYY1788612x30Zb1qINlx; Tue, 28 Feb 2023 22:10:13 -0800 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web10.15979.1677651005289052489 for ; Tue, 28 Feb 2023 22:10:13 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10635"; a="420590682" X-IronPort-AV: E=Sophos;i="5.98,224,1673942400"; d="scan'208";a="420590682" X-Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 22:10:13 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10635"; a="1003533726" X-IronPort-AV: E=Sophos;i="5.98,224,1673942400"; d="scan'208";a="1003533726" X-Received: from shwdeopenlab705.ccr.corp.intel.com ([10.239.55.55]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 22:10:11 -0800 From: "Yuanhao Xie" To: devel@edk2.groups.io Cc: Guo Dong , Ray Ni , Sean Rhodes , James Lu , Gua Guo Subject: [edk2-devel] [Patch V4 3/8] UefiCpuPkg: Allocate contiguous memory for stacks and APs loop. Date: Wed, 1 Mar 2023 14:09:49 +0800 Message-Id: <20230301060954.1464-4-yuanhao.xie@intel.com> In-Reply-To: <20230301060954.1464-1-yuanhao.xie@intel.com> References: <20230301060954.1464-1-yuanhao.xie@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,yuanhao.xie@intel.com X-Gm-Message-State: t5CsdBABBc7dSj9j2yVupuxax1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1677651013; bh=RE/ex9EJLvziTDsNAtOydmsftnqAE2xTztGh69VaKKg=; h=Cc:Date:From:Reply-To:Subject:To; b=pYoeCXZde/Lc3wqs9yfnrPYNITNWBVb21NthYJEjFSDtzF+NzrqzZbLAejuw4pbVtwc EGEJcIf4zA2O1SN1MYqEShW4iAJ83/sDLZbL+fp9JgLb/x/xrV/6KF04mw5o3CjI6e7DF dny7OTOWPOC5GItrDtXcJU109ZzATGDNuFA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1677651015489100006 Content-Type: text/plain; charset="utf-8" Cc: Guo Dong Cc: Ray Ni Cc: Sean Rhodes Cc: James Lu Cc: Gua Guo Signed-off-by: Yuanhao Xie Acked-by: Gerd Hoffmann Reviewed-by: Ray Ni Tested-by: Gerd Hoffmann --- UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 40 +++++++++++++++++------------= ----------- 1 file changed, 17 insertions(+), 23 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c b/UefiCpuPkg/Library/M= pInitLib/DxeMpLib.c index e9ac858f4f..224215878c 100644 --- a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c @@ -480,11 +480,12 @@ InitMpGlobalData ( { EFI_STATUS Status; EFI_PHYSICAL_ADDRESS Address; - UINTN ApSafeBufferSize; UINTN Index; EFI_GCD_MEMORY_SPACE_DESCRIPTOR MemDesc; UINTN StackBase; CPU_INFO_IN_HOB *CpuInfoInHob; + UINTN StackPages; + UINTN FuncPages; =20 SaveCpuMpData (CpuMpData); =20 @@ -547,16 +548,23 @@ InitMpGlobalData ( // Allocating it in advance since memory services are not available in // Exit Boot Services callback function. // - ApSafeBufferSize =3D EFI_PAGES_TO_SIZE ( - EFI_SIZE_TO_PAGES ( - CpuMpData->AddressMap.RelocateApLoopFuncSize - ) - ); + // +------------+ (TopOfApStack) + // | Stack * N | + // +------------+ (stack base, 4k aligned) + // | Padding | + // +------------+ + // | Ap Loop | + // +------------+ ((low address, 4k-aligned) + // + + StackPages =3D EFI_SIZE_TO_PAGES (CpuMpData->CpuCount * AP_SAFE_STACK_SI= ZE); + FuncPages =3D EFI_SIZE_TO_PAGES (CpuMpData->AddressMap.RelocateApLoopFu= ncSize); + Address =3D BASE_4GB - 1; Status =3D gBS->AllocatePages ( AllocateMaxAddress, EfiReservedMemoryType, - EFI_SIZE_TO_PAGES (ApSafeBufferSize), + StackPages + FuncPages, &Address ); ASSERT_EFI_ERROR (Status); @@ -575,26 +583,12 @@ InitMpGlobalData ( if (!EFI_ERROR (Status)) { gDS->SetMemorySpaceAttributes ( Address, - ApSafeBufferSize, + EFI_PAGES_TO_SIZE (FuncPages), MemDesc.Attributes & (~EFI_MEMORY_XP) ); } =20 - ApSafeBufferSize =3D EFI_PAGES_TO_SIZE ( - EFI_SIZE_TO_PAGES ( - CpuMpData->CpuCount * AP_SAFE_STACK_SIZE - ) - ); - Address =3D BASE_4GB - 1; - Status =3D gBS->AllocatePages ( - AllocateMaxAddress, - EfiReservedMemoryType, - EFI_SIZE_TO_PAGES (ApSafeBufferSize), - &Address - ); - ASSERT_EFI_ERROR (Status); - - mReservedTopOfApStack =3D (UINTN)Address + ApSafeBufferSize; + mReservedTopOfApStack =3D (UINTN)Address + EFI_PAGES_TO_SIZE (StackPages= +FuncPages); ASSERT ((mReservedTopOfApStack & (UINTN)(CPU_STACK_ALIGNMENT - 1)) =3D= =3D 0); CopyMem ( mReservedApLoop.Data, --=20 2.36.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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Date: Wed, 1 Mar 2023 14:09:50 +0800 Message-Id: <20230301060954.1464-5-yuanhao.xie@intel.com> In-Reply-To: <20230301060954.1464-1-yuanhao.xie@intel.com> References: <20230301060954.1464-1-yuanhao.xie@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,yuanhao.xie@intel.com X-Gm-Message-State: vSxxVJeIt8rnAX2L1377x3LRx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1677651016; bh=N6/Qmpjb43g97dziCIeJ1dVS96AMMRJrApFx6GEbpDU=; h=Cc:Date:From:Reply-To:Subject:To; b=uLa4huWemRxKDLlrSB+/chFVCoJDrC3k+EX3ub7uc/T6ARbbGvUGs+QYc6Sv7huwWEN g8O6nmlL6d9vgPpqr2Uo++OfADkUzTY7RWNtsH/CLEQsx8KOYX0uxlxmjtedq7rms6tBH bsiIZOOwnXaUar6kzenwjtKJOGBxRjBu6P8= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1677651017493100010 Content-Type: text/plain; charset="utf-8" Add CpuPageTableLib required by MpInitLib in OvmfPkg. Cc: Ard Biesheuvel Cc: Jiewen Yao Cc: Jordan Justen Cc: Gerd Hoffmann Signed-off-by: Yuanhao Xie Acked-by: Gerd Hoffmann Reviewed-by: Ray Ni Tested-by: Gerd Hoffmann --- OvmfPkg/AmdSev/AmdSevX64.dsc | 3 ++- OvmfPkg/CloudHv/CloudHvX64.dsc | 3 ++- OvmfPkg/IntelTdx/IntelTdxX64.dsc | 4 +++- OvmfPkg/Microvm/MicrovmX64.dsc | 3 ++- OvmfPkg/OvmfPkgIa32X64.dsc | 3 ++- OvmfPkg/OvmfPkgX64.dsc | 4 +++- OvmfPkg/OvmfXen.dsc | 3 ++- 7 files changed, 16 insertions(+), 7 deletions(-) diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc index 1cebd6b4bc..f0c4dc2310 100644 --- a/OvmfPkg/AmdSev/AmdSevX64.dsc +++ b/OvmfPkg/AmdSev/AmdSevX64.dsc @@ -3,7 +3,7 @@ # virtual machine remote attestation and secret injection # # Copyright (c) 2020 James Bottomley, IBM Corporation. -# Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
+# Copyright (c) 2006 - 2023, Intel Corporation. All rights reserved.
# (C) Copyright 2016 Hewlett Packard Enterprise Development LP
# # SPDX-License-Identifier: BSD-2-Clause-Patent @@ -353,6 +353,7 @@ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf !endif PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf + CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf NestedInterruptTplLib|OvmfPkg/Library/NestedInterruptTplLib/NestedInterr= uptTplLib.inf QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf diff --git a/OvmfPkg/CloudHv/CloudHvX64.dsc b/OvmfPkg/CloudHv/CloudHvX64.dsc index fda7d2b9e5..327f53ff3c 100644 --- a/OvmfPkg/CloudHv/CloudHvX64.dsc +++ b/OvmfPkg/CloudHv/CloudHvX64.dsc @@ -1,7 +1,7 @@ ## @file # EFI/Framework Open Virtual Machine Firmware (OVMF) platform # -# Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.
+# Copyright (c) 2006 - 2023, Intel Corporation. All rights reserved.
# (C) Copyright 2016 Hewlett Packard Enterprise Development LP
# Copyright (c) Microsoft Corporation. # @@ -404,6 +404,7 @@ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf !endif PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf + CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf NestedInterruptTplLib|OvmfPkg/Library/NestedInterruptTplLib/NestedInterr= uptTplLib.inf QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf diff --git a/OvmfPkg/IntelTdx/IntelTdxX64.dsc b/OvmfPkg/IntelTdx/IntelTdxX6= 4.dsc index 95b9594ddc..d093660283 100644 --- a/OvmfPkg/IntelTdx/IntelTdxX64.dsc +++ b/OvmfPkg/IntelTdx/IntelTdxX64.dsc @@ -1,7 +1,7 @@ ## @file # EFI/Framework Open Virtual Machine Firmware (OVMF) platform # -# Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
+# Copyright (c) 2006 - 2023, Intel Corporation. All rights reserved.
# (C) Copyright 2016 Hewlett Packard Enterprise Development LP
# Copyright (c) Microsoft Corporation. # @@ -320,6 +320,7 @@ CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuE= xceptionHandlerLib.inf LockBoxLib|OvmfPkg/Library/LockBoxLib/LockBoxDxeLib.inf PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf + CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf NestedInterruptTplLib|OvmfPkg/Library/NestedInterruptTplLib/NestedInterr= uptTplLib.inf QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf @@ -590,6 +591,7 @@ # Directly use DxeMpInitLib. It depends on DxeMpInitLibMpDepLib which # checks the Protocol of gEfiMpInitLibMpDepProtocolGuid. # + CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.i= nf MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf NULL|OvmfPkg/Library/MpInitLibDepLib/DxeMpInitLibMpDepLib.inf } diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/OvmfPkg/Microvm/MicrovmX64.dsc index 0d65d21e65..76fc548650 100644 --- a/OvmfPkg/Microvm/MicrovmX64.dsc +++ b/OvmfPkg/Microvm/MicrovmX64.dsc @@ -1,7 +1,7 @@ ## @file # EFI/Framework Open Virtual Machine Firmware (OVMF) platform # -# Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
+# Copyright (c) 2006 - 2023, Intel Corporation. All rights reserved.
# (C) Copyright 2016 Hewlett Packard Enterprise Development LP
# Copyright (c) Microsoft Corporation. # @@ -403,6 +403,7 @@ PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf PciPcdProducerLib|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.= inf PciExpressLib|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExp= ressLib.inf + CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf NestedInterruptTplLib|OvmfPkg/Library/NestedInterruptTplLib/NestedInterr= uptTplLib.inf QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc index 6b539814bd..51db692b10 100644 --- a/OvmfPkg/OvmfPkgIa32X64.dsc +++ b/OvmfPkg/OvmfPkgIa32X64.dsc @@ -1,7 +1,7 @@ ## @file # EFI/Framework Open Virtual Machine Firmware (OVMF) platform # -# Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.
+# Copyright (c) 2006 - 2023, Intel Corporation. All rights reserved.
# (C) Copyright 2016 Hewlett Packard Enterprise Development LP
# Copyright (c) Microsoft Corporation. # @@ -414,6 +414,7 @@ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf !endif PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf + CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf NestedInterruptTplLib|OvmfPkg/Library/NestedInterruptTplLib/NestedInterr= uptTplLib.inf QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc index e3c64456df..04d50704c7 100644 --- a/OvmfPkg/OvmfPkgX64.dsc +++ b/OvmfPkg/OvmfPkgX64.dsc @@ -1,7 +1,7 @@ ## @file # EFI/Framework Open Virtual Machine Firmware (OVMF) platform # -# Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.
+# Copyright (c) 2006 - 2023, Intel Corporation. All rights reserved.
# (C) Copyright 2016 Hewlett Packard Enterprise Development LP
# Copyright (c) Microsoft Corporation. # @@ -435,6 +435,7 @@ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf !endif PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf + CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf NestedInterruptTplLib|OvmfPkg/Library/NestedInterruptTplLib/NestedInterr= uptTplLib.inf QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf @@ -826,6 +827,7 @@ # Directly use DxeMpInitLib. It depends on DxeMpInitLibMpDepLib which # checks the Protocol of gEfiMpInitLibMpDepProtocolGuid. # + CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.i= nf MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf NULL|OvmfPkg/Library/MpInitLibDepLib/DxeMpInitLibMpDepLib.inf } diff --git a/OvmfPkg/OvmfXen.dsc b/OvmfPkg/OvmfXen.dsc index c328987e84..f1f02d969f 100644 --- a/OvmfPkg/OvmfXen.dsc +++ b/OvmfPkg/OvmfXen.dsc @@ -1,7 +1,7 @@ ## @file # EFI/Framework Open Virtual Machine Firmware (OVMF) platform # -# Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
+# Copyright (c) 2006 - 2023, Intel Corporation. All rights reserved.
# (C) Copyright 2016 Hewlett Packard Enterprise Development LP
# Copyright (c) 2019, Citrix Systems, Inc. # Copyright (c) Microsoft Corporation. @@ -339,6 +339,7 @@ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf !endif PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf + CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf NestedInterruptTplLib|OvmfPkg/Library/NestedInterruptTplLib/NestedInterr= uptTplLib.inf QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf --=20 2.36.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100575): https://edk2.groups.io/g/devel/message/100575 Mute This Topic: https://groups.io/mt/97309035/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun Apr 28 03:20:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100576+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100576+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1677651019; cv=none; d=zohomail.com; s=zohoarc; b=OkJMuRCRymFMnqvsP8z8PPdvYsyNd47q2UB70Og96AiVFcrrIgyJXwy/ZEV4nrnEQpvdyAhjyjRrmhF+/wIGbuQ6udxAHdlJ7vQTmFkWQDVs87l5IERaJvhz4rAAgckrOIli7hYDioPR9M72s63cbLSzcieiOzJZdmavB4IRtTo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1677651019; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=kHmNcW1KP7GOw5IlfgvWDCqHgzW4KCtxC8ODsfKtqhY=; b=Miw0koU3KG4ou5VcXG6lofmAaKIBJk3QLL5l3bC25v/mD4fdUF4im3Djla5tJI93i15mKLQmZdxVCtdV9PFsQSDhJMA8INyaM6HdQltkJz8n63ZEGtfmsNeigTJT3epEKd9mEbIDe2IA598Ak9Jr3adTzscDn/6zo6S4Z966yxU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100576+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1677651019311676.5434129479193; Tue, 28 Feb 2023 22:10:19 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id tdKeYY1788612xUKUQgwMLRM; Tue, 28 Feb 2023 22:10:18 -0800 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web10.15979.1677651005289052489 for ; Tue, 28 Feb 2023 22:10:18 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10635"; a="420590722" X-IronPort-AV: E=Sophos;i="5.98,224,1673942400"; d="scan'208";a="420590722" X-Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 22:10:18 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10635"; a="1003533743" X-IronPort-AV: E=Sophos;i="5.98,224,1673942400"; d="scan'208";a="1003533743" X-Received: from shwdeopenlab705.ccr.corp.intel.com ([10.239.55.55]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 22:10:16 -0800 From: "Yuanhao Xie" To: devel@edk2.groups.io Cc: Guo Dong , Ray Ni , Sean Rhodes , James Lu , Gua Guo Subject: [edk2-devel] [Patch V4 5/8] UefiPayloadPkg: Add CpuPageTableLib required by MpInitLib. Date: Wed, 1 Mar 2023 14:09:51 +0800 Message-Id: <20230301060954.1464-6-yuanhao.xie@intel.com> In-Reply-To: <20230301060954.1464-1-yuanhao.xie@intel.com> References: <20230301060954.1464-1-yuanhao.xie@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,yuanhao.xie@intel.com X-Gm-Message-State: ELIkCx6qZA8K1bRJXayFfg5Ix1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1677651018; bh=L2oEM+lgd+SfWiKpsTFEBsMstI2SK9AFJg59oJITc70=; h=Cc:Date:From:Reply-To:Subject:To; b=qHAJ18UlPfeuRQEedX7G8d20adihyLfJYZhnlGyPdMas7tTSZ163MlXR73mVY8MzFUq 6Q8wAFhn2ponuKOGYRyIkzqwjHTHsHU0AaRex0QnAuTYg024jllrz2OcYBIxFL7/s1atD 84+zmeFOv6SAfCWMwER74J9PvOFCPGnCaE4= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1677651019471100013 Content-Type: text/plain; charset="utf-8" Add CpuPageTableLib required by MpInitLib in UefiPayloadPkg. Cc: Guo Dong Cc: Ray Ni Cc: Sean Rhodes Cc: James Lu Cc: Gua Guo Signed-off-by: Yuanhao Xie Acked-by: Gerd Hoffmann Reviewed-by: Ray Ni Tested-by: Gerd Hoffmann --- UefiPayloadPkg/UefiPayloadPkg.dsc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc b/UefiPayloadPkg/UefiPayload= Pkg.dsc index 2dbd875f37..8cbbbe9a05 100644 --- a/UefiPayloadPkg/UefiPayloadPkg.dsc +++ b/UefiPayloadPkg/UefiPayloadPkg.dsc @@ -3,7 +3,7 @@ # # Provides drivers and definitions to create uefi payload for bootloaders. # -# Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.
+# Copyright (c) 2014 - 2023, Intel Corporation. All rights reserved.
# Copyright (c) Microsoft Corporation. # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -340,6 +340,7 @@ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf !endif CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuE= xceptionHandlerLib.inf + CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf !if $(PERFORMANCE_MEASUREMENT_ENABLE) PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.= inf --=20 2.36.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100576): https://edk2.groups.io/g/devel/message/100576 Mute This Topic: https://groups.io/mt/97309036/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun Apr 28 03:20:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100577+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100577+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1677651027; cv=none; d=zohomail.com; s=zohoarc; b=DXGI6t8tvAis/QBI8UVlgUTQSU7N+RFm9YDhWH1c5BFDd8YbYXr0m3PAs/2VpW40SwJKuynGrZJlY0t/exjwH38J6uBYULdJUv6fCYusLRxe+iw/ALVVvhz43mvmqnb2fVQi68LYoD7Oxviat3k3Kw/akrCd8rmrFwMMapJ1aCc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1677651027; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=i5+5Xx9sV0yttCE7jlY11v/J+7LZnqqis3HlES6biMI=; b=dJHVBvGzcy5PnQAhDFHiED1nq93BkCZbz4A0UX6iewObx0B7wBf9M0cH1b3exR1GMRa56MroNnsIN9vhMEcRadiKbcmxtPGA7cPyLbT/f17LwBDMwd3hZLnSsV5NWiBss7RhnBQNE/z8v7D1GRPiUQRNjUdyxB9x3kl8bBZwVqk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100577+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1677651027387694.0051530773744; Tue, 28 Feb 2023 22:10:27 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id ObbVYY1788612xsf0gd01ozU; Tue, 28 Feb 2023 22:10:27 -0800 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web10.15979.1677651005289052489 for ; Tue, 28 Feb 2023 22:10:21 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10635"; a="420590740" X-IronPort-AV: E=Sophos;i="5.98,224,1673942400"; d="scan'208";a="420590740" X-Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 22:10:21 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10635"; a="1003533757" X-IronPort-AV: E=Sophos;i="5.98,224,1673942400"; d="scan'208";a="1003533757" X-Received: from shwdeopenlab705.ccr.corp.intel.com ([10.239.55.55]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 22:10:19 -0800 From: "Yuanhao Xie" To: devel@edk2.groups.io Cc: Guo Dong , Ray Ni , Sean Rhodes , James Lu , Gua Guo Subject: [edk2-devel] [Patch V4 6/8] UefiCpuPkg: Put APs in 64 bit mode before handoff to OS. Date: Wed, 1 Mar 2023 14:09:52 +0800 Message-Id: <20230301060954.1464-7-yuanhao.xie@intel.com> In-Reply-To: <20230301060954.1464-1-yuanhao.xie@intel.com> References: <20230301060954.1464-1-yuanhao.xie@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,yuanhao.xie@intel.com X-Gm-Message-State: Y3Ys4UaIBsEgeJgvbq91obLTx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1677651027; bh=Lwfhxfk2Tfd36Gl62Mip0K0y+U/dGoo+UzQcmRx7fRU=; h=Cc:Date:From:Reply-To:Subject:To; b=Fv/5pDrIUemN6KdGmBLjXwceOW6iF8o7+LW166Kq1irXha8JwtBcba+0DWRlnzlGz8f 2yT6sN610meINrmTN7xTFo8IBKYJku8ur57s/27mbd/F247BevWEagTxpwAsoPgazYyZd 5EqqPyX68i0HPUNcu/C8Gm9k7StUh2LYv94= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1677651029604100008 Content-Type: text/plain; charset="utf-8" Add the 'AsmRelocateApLoopStartGeneric' for X64 processors except 64-bit AMD processors with SEV-ES. Remove the unused arguments of AsmRelocateApLoopStartGeneric, updated the stack offset. Create PageTable for the allocated reserved memory. Only keep 4GB limitation of memory allocation for the case APs still need to be transferred to 32-bit mode before OS. Cc: Guo Dong Cc: Ray Ni Cc: Sean Rhodes Cc: James Lu Cc: Gua Guo Signed-off-by: Yuanhao Xie Acked-by: Gerd Hoffmann Reviewed-by: Ray Ni Tested-by: Gerd Hoffmann --- UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 6 +++++- UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 63 +++++++++++++++++= +++++++++++++++++++++++++--------------------- UefiCpuPkg/Library/MpInitLib/Ia32/CreatePageTable.c | 23 +++++++++++++++++= ++++++ UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm | 26 +++++++++++++----= --------- UefiCpuPkg/Library/MpInitLib/MpEqu.inc | 22 ++++++++++++-----= ----- UefiCpuPkg/Library/MpInitLib/MpLib.h | 43 +++++++++++++++++= +++++++++++++++++++++++--- UefiCpuPkg/Library/MpInitLib/X64/CreatePageTable.c | 82 +++++++++++++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 57 +++++++++++++++++= +++++++++++++++++++++++++++++++++++++++- 8 files changed, 273 insertions(+), 49 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf b/UefiCpuPkg/Lib= rary/MpInitLib/DxeMpInitLib.inf index cd07de3a3c..4285dd06b4 100644 --- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf @@ -1,7 +1,7 @@ ## @file # MP Initialize Library instance for DXE driver. # -# Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.
+# Copyright (c) 2016 - 2023, Intel Corporation. All rights reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent # ## @@ -24,10 +24,12 @@ [Sources.IA32] Ia32/AmdSev.c Ia32/MpFuncs.nasm + Ia32/CreatePageTable.c =20 [Sources.X64] X64/AmdSev.c X64/MpFuncs.nasm + X64/CreatePageTable.c =20 [Sources.common] AmdSev.c @@ -56,6 +58,8 @@ PcdLib CcExitLib MicrocodeLib +[LibraryClasses.X64] + CpuPageTableLib =20 [Protocols] gEfiTimerArchProtocolGuid ## SOMETIMES_CONSUMES diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c b/UefiCpuPkg/Library/M= pInitLib/DxeMpLib.c index 224215878c..d292277d10 100644 --- a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c @@ -28,6 +28,7 @@ volatile BOOLEAN mStopCheckAllApsStatus =3D = TRUE; RELOCATE_AP_LOOP_ENTRY mReservedApLoop; UINTN mReservedTopOfApStack; volatile UINT32 mNumberToFinish =3D 0; +UINTN mApPageTable; =20 // // Begin wakeup buffer allocation below 0x88000 @@ -409,12 +410,9 @@ RelocateApLoop ( mReservedApLoop.GenericEntry ( MwaitSupport, CpuMpData->ApTargetCState, - CpuMpData->PmCodeSegment, StackStart - ProcessorNumber * AP_SAFE_STACK_SIZE, (UINTN)&mNumberToFinish, - CpuMpData->Pm16CodeSegment, - CpuMpData->SevEsAPBuffer, - CpuMpData->WakeupBuffer + mApPageTable ); } =20 @@ -484,6 +482,9 @@ InitMpGlobalData ( EFI_GCD_MEMORY_SPACE_DESCRIPTOR MemDesc; UINTN StackBase; CPU_INFO_IN_HOB *CpuInfoInHob; + MP_ASSEMBLY_ADDRESS_MAP *AddressMap; + UINT8 *ApLoopFunc; + UINTN ApLoopFuncSize; UINTN StackPages; UINTN FuncPages; =20 @@ -540,6 +541,23 @@ InitMpGlobalData ( } } =20 + AddressMap =3D &CpuMpData->AddressMap; + if (CpuMpData->UseSevEsAPMethod) { + // + // 64-bit AMD processors with SEV-ES + // + Address =3D BASE_4GB - 1; + ApLoopFunc =3D AddressMap->RelocateApLoopFuncAddress; + ApLoopFuncSize =3D AddressMap->RelocateApLoopFuncSize; + } else { + // + // Intel processors (32-bit or 64-bit), 32-bit AMD processors, or 64-b= it AMD processors without SEV-ES + // + Address =3D MAX_ADDRESS; + ApLoopFunc =3D AddressMap->RelocateApLoopFuncAddressGeneric; + ApLoopFuncSize =3D AddressMap->RelocateApLoopFuncSizeGeneric; + } + // // Avoid APs access invalid buffer data which allocated by BootServices, // so we will allocate reserved data for AP loop code. We also need to @@ -558,19 +576,15 @@ InitMpGlobalData ( // =20 StackPages =3D EFI_SIZE_TO_PAGES (CpuMpData->CpuCount * AP_SAFE_STACK_SI= ZE); - FuncPages =3D EFI_SIZE_TO_PAGES (CpuMpData->AddressMap.RelocateApLoopFu= ncSize); - - Address =3D BASE_4GB - 1; - Status =3D gBS->AllocatePages ( - AllocateMaxAddress, - EfiReservedMemoryType, - StackPages + FuncPages, - &Address - ); - ASSERT_EFI_ERROR (Status); + FuncPages =3D EFI_SIZE_TO_PAGES (ApLoopFuncSize); =20 - mReservedApLoop.Data =3D (VOID *)(UINTN)Address; - ASSERT (mReservedApLoop.Data !=3D NULL); + Status =3D gBS->AllocatePages ( + AllocateMaxAddress, + EfiReservedMemoryType, + StackPages + FuncPages, + &Address + ); + ASSERT_EFI_ERROR (Status); =20 // // Make sure that the buffer memory is executable if NX protection is en= abled @@ -590,11 +604,18 @@ InitMpGlobalData ( =20 mReservedTopOfApStack =3D (UINTN)Address + EFI_PAGES_TO_SIZE (StackPages= +FuncPages); ASSERT ((mReservedTopOfApStack & (UINTN)(CPU_STACK_ALIGNMENT - 1)) =3D= =3D 0); - CopyMem ( - mReservedApLoop.Data, - CpuMpData->AddressMap.RelocateApLoopFuncAddress, - CpuMpData->AddressMap.RelocateApLoopFuncSize - ); + mReservedApLoop.Data =3D (VOID *)(UINTN)Address; + ASSERT (mReservedApLoop.Data !=3D NULL); + CopyMem (mReservedApLoop.Data, ApLoopFunc, ApLoopFuncSize); + if (!CpuMpData->UseSevEsAPMethod) { + // + // processors without SEV-ES + // + mApPageTable =3D CreatePageTable ( + (UINTN)Address, + EFI_PAGES_TO_SIZE (StackPages+FuncPages) + ); + } =20 Status =3D gBS->CreateEvent ( EVT_TIMER | EVT_NOTIFY_SIGNAL, diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/CreatePageTable.c b/UefiCpuP= kg/Library/MpInitLib/Ia32/CreatePageTable.c new file mode 100644 index 0000000000..bec9b247c0 --- /dev/null +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/CreatePageTable.c @@ -0,0 +1,23 @@ +/** @file + Function to create page talbe. + Only create page table for x64, and leave the CreatePageTable empty for = Ia32. + Copyright (c) 2023, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include + +/** + Only create page table for x64, and leave the CreatePageTable empty for = Ia32. + @param[in] LinearAddress The start of the linear address range. + @param[in] Length The length of the linear address range. + @return The page table to be created. +**/ +UINTN +CreatePageTable ( + IN UINTN Address, + IN UINTN Length + ) +{ + return 0; +} diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Li= brary/MpInitLib/Ia32/MpFuncs.nasm index bfcdbd31c1..59db4081d6 100644 --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm @@ -1,5 +1,5 @@ ;-------------------------------------------------------------------------= ----- ; -; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.
+; Copyright (c) 2015 - 2023, Intel Corporation. All rights reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent ; ; Module Name: @@ -219,24 +219,24 @@ SwitchToRealProcEnd: RendezvousFunnelProcEnd: =20 ;-------------------------------------------------------------------------= ------------ -; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfAp= Stack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer); +; AsmRelocateApLoopGeneric (MwaitSupport, ApTargetCState, PmCodeSegment, = TopOfApStack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffe= r); ; ; The last three parameters (Pm16CodeSegment, SevEsAPJumpTable and Wakeup= Buffer) are ; specific to SEV-ES support and are not applicable on IA32. ;-------------------------------------------------------------------------= ------------ -AsmRelocateApLoopStart: +AsmRelocateApLoopGenericStart: mov eax, esp - mov esp, [eax + 16] ; TopOfApStack + mov esp, [eax + 12] ; TopOfApStack push dword [eax] ; push return address for stack trace push ebp mov ebp, esp mov ebx, [eax + 8] ; ApTargetCState mov ecx, [eax + 4] ; MwaitSupport - mov eax, [eax + 20] ; CountTofinish + mov eax, [eax + 16] ; CountTofinish lock dec dword [eax] ; (*CountTofinish)-- cmp cl, 1 ; Check mwait-monitor support - jnz HltLoop -MwaitLoop: + jnz HltLoopGeneric +MwaitLoopGeneric: cli mov eax, esp xor ecx, ecx @@ -245,12 +245,12 @@ MwaitLoop: mov eax, ebx ; Mwait Cx, Target C-State per eax[7:4] shl eax, 4 mwait - jmp MwaitLoop -HltLoop: + jmp MwaitLoopGeneric +HltLoopGeneric: cli hlt - jmp HltLoop -AsmRelocateApLoopEnd: + jmp HltLoopGeneric +AsmRelocateApLoopGenericEnd: =20 ;-------------------------------------------------------------------------= ------------ ; AsmGetAddressMap (&AddressMap); @@ -264,8 +264,8 @@ ASM_PFX(AsmGetAddressMap): mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.RendezvousFunnelAddres= s], RendezvousFunnelProcStart mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.ModeEntryOffset], Flat= 32Start - RendezvousFunnelProcStart mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.RendezvousFunnelSize],= RendezvousFunnelProcEnd - RendezvousFunnelProcStart - mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddr= ess], AsmRelocateApLoopStart - mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize= ], AsmRelocateApLoopEnd - AsmRelocateApLoopStart + mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddr= essGeneric], AsmRelocateApLoopGenericStart + mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize= Generic], AsmRelocateApLoopGenericEnd - AsmRelocateApLoopGenericStart mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.ModeTransitionOffset],= Flat32Start - RendezvousFunnelProcStart mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealNoNxOffset= ], SwitchToRealProcStart - Flat32Start mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealPM16ModeOf= fset], 0 diff --git a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc b/UefiCpuPkg/Library/Mp= InitLib/MpEqu.inc index ebadcc6fb3..09c1817426 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc +++ b/UefiCpuPkg/Library/MpInitLib/MpEqu.inc @@ -1,5 +1,5 @@ ;-------------------------------------------------------------------------= ----- ; -; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.
+; Copyright (c) 2015 - 2023, Intel Corporation. All rights reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent ; ; Module Name: @@ -21,15 +21,17 @@ CPU_SWITCH_STATE_LOADED equ 2 ; Equivalent NASM structure of MP_ASSEMBLY_ADDRESS_MAP ; struc MP_ASSEMBLY_ADDRESS_MAP - .RendezvousFunnelAddress CTYPE_UINTN 1 - .ModeEntryOffset CTYPE_UINTN 1 - .RendezvousFunnelSize CTYPE_UINTN 1 - .RelocateApLoopFuncAddress CTYPE_UINTN 1 - .RelocateApLoopFuncSize CTYPE_UINTN 1 - .ModeTransitionOffset CTYPE_UINTN 1 - .SwitchToRealNoNxOffset CTYPE_UINTN 1 - .SwitchToRealPM16ModeOffset CTYPE_UINTN 1 - .SwitchToRealPM16ModeSize CTYPE_UINTN 1 + .RendezvousFunnelAddress CTYPE_UINTN 1 + .ModeEntryOffset CTYPE_UINTN 1 + .RendezvousFunnelSize CTYPE_UINTN 1 + .RelocateApLoopFuncAddressGeneric CTYPE_UINTN 1 + .RelocateApLoopFuncSizeGeneric CTYPE_UINTN 1 + .RelocateApLoopFuncAddress CTYPE_UINTN 1 + .RelocateApLoopFuncSize CTYPE_UINTN 1 + .ModeTransitionOffset CTYPE_UINTN 1 + .SwitchToRealNoNxOffset CTYPE_UINTN 1 + .SwitchToRealPM16ModeOffset CTYPE_UINTN 1 + .SwitchToRealPM16ModeSize CTYPE_UINTN 1 endstruc =20 ; diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpIn= itLib/MpLib.h index 81a95733fc..e137545fc6 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -177,6 +177,8 @@ typedef struct { UINT8 *RendezvousFunnelAddress; UINTN ModeEntryOffset; UINTN RendezvousFunnelSize; + UINT8 *RelocateApLoopFuncAddressGeneric; + UINTN RelocateApLoopFuncSizeGeneric; UINT8 *RelocateApLoopFuncAddress; UINTN RelocateApLoopFuncSize; UINTN ModeTransitionOffset; @@ -361,6 +363,29 @@ extern EFI_GUID mCpuInitMpLibHobGuid; @param[in] ApTargetCState Target C-State value. @param[in] PmCodeSegment Protected mode code segment value. **/ +typedef + VOID +(EFIAPI *ASM_RELOCATE_AP_LOOP_GENERIC)( + IN BOOLEAN MwaitSupport, + IN UINTN ApTargetCState, + IN UINTN TopOfApStack, + IN UINTN NumberToFinish, + IN UINTN Cr3 + ); + +/** + Assembly code to place AP into safe loop mode for Amd processors + with Sev enabled. + Place AP into targeted C-State if MONITOR is supported, otherwise + place AP into hlt state. + Place AP in protected mode if the current is long mode. Due to AP maybe + wakeup by some hardware event. It could avoid accessing page table that + may not available during booting to OS. + @param[in] MwaitSupport TRUE indicates MONITOR is supported. + FALSE indicates MONITOR is not supported. + @param[in] ApTargetCState Target C-State value. + @param[in] PmCodeSegment Protected mode code segment value. +**/ typedef VOID (EFIAPI *ASM_RELOCATE_AP_LOOP)( @@ -403,9 +428,9 @@ AsmExchangeRole ( ); =20 typedef union { - VOID *Data; - ASM_RELOCATE_AP_LOOP AmdSevEntry; // 64-bit AMD Sev processors - ASM_RELOCATE_AP_LOOP GenericEntry; // Intel processors (32-bit or 64-= bit), 32-bit AMD processors, or AMD non-Sev processors + VOID *Data; + ASM_RELOCATE_AP_LOOP AmdSevEntry; // 64-bit AMD Sev processo= rs + ASM_RELOCATE_AP_LOOP_GENERIC GenericEntry; // Intel processors (32-bi= t or 64-bit), 32-bit AMD processors, or AMD non-Sev processors } RELOCATE_AP_LOOP_ENTRY; =20 /** @@ -471,6 +496,18 @@ GetSevEsAPMemory ( VOID ); =20 +/** + Create 1:1 mapping page table in reserved memory to map the specified ad= dress range. + @param[in] LinearAddress The start of the linear address range. + @param[in] Length The length of the linear address range. + @return The page table to be created. +**/ +UINTN +CreatePageTable ( + IN UINTN Address, + IN UINTN Length + ); + /** This function will be called by BSP to wakeup AP. =20 diff --git a/UefiCpuPkg/Library/MpInitLib/X64/CreatePageTable.c b/UefiCpuPk= g/Library/MpInitLib/X64/CreatePageTable.c new file mode 100644 index 0000000000..7cf91ed9c4 --- /dev/null +++ b/UefiCpuPkg/Library/MpInitLib/X64/CreatePageTable.c @@ -0,0 +1,82 @@ +/** @file + Function to create page talbe. + Only create page table for x64, and leave the CreatePageTable empty for = Ia32. + Copyright (c) 2023, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent +**/ +#include +#include +#include +#include +#include +#include + +/** + Create 1:1 mapping page table in reserved memory to map the specified ad= dress range. + @param[in] LinearAddress The start of the linear address range. + @param[in] Length The length of the linear address range. + @return The page table to be created. +**/ +UINTN +CreatePageTable ( + IN UINTN Address, + IN UINTN Length + ) +{ + EFI_STATUS Status; + VOID *PageTableBuffer; + UINTN PageTableBufferSize; + UINTN PageTable; + PAGING_MODE PagingMode; + IA32_CR4 Cr4; + + IA32_MAP_ATTRIBUTE MapAttribute; + IA32_MAP_ATTRIBUTE MapMask; + + MapAttribute.Uint64 =3D Address; + MapAttribute.Bits.Present =3D 1; + MapAttribute.Bits.ReadWrite =3D 1; + + MapMask.Bits.PageTableBaseAddress =3D 1; + MapMask.Bits.Present =3D 1; + MapMask.Bits.ReadWrite =3D 1; + + PageTable =3D 0; + PageTableBufferSize =3D 0; + + Cr4.UintN =3D AsmReadCr4 (); + + if (Cr4.Bits.LA57 =3D=3D 1) { + PagingMode =3D Paging5Level; + } else { + PagingMode =3D Paging4Level; + } + + Status =3D PageTableMap ( + &PageTable, + PagingMode, + NULL, + &PageTableBufferSize, + Address, + Length, + &MapAttribute, + &MapMask + ); + ASSERT (Status =3D=3D EFI_BUFFER_TOO_SMALL); + DEBUG ((DEBUG_INFO, "AP Page Table Buffer Size =3D %x\n", PageTableBuffe= rSize)); + + PageTableBuffer =3D AllocateReservedPages (EFI_SIZE_TO_PAGES (PageTableB= ufferSize)); + ASSERT (PageTableBuffer !=3D NULL); + Status =3D PageTableMap ( + &PageTable, + PagingMode, + PageTableBuffer, + &PageTableBufferSize, + Address, + Length, + &MapAttribute, + &MapMask + ); + ASSERT_EFI_ERROR (Status); + return PageTable; +} diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Lib= rary/MpInitLib/X64/MpFuncs.nasm index 5d71995bf8..c0d7355c6b 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm @@ -1,5 +1,5 @@ ;-------------------------------------------------------------------------= ----- ; -; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.
+; Copyright (c) 2015 - 2023, Intel Corporation. All rights reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent ; ; Module Name: @@ -447,6 +447,58 @@ DoHlt: BITS 64 AsmRelocateApLoopEnd: =20 +;-------------------------------------------------------------------------= ------------ +; AsmRelocateApLoop (MwaitSupport, ApTargetCState, TopOfApStack, CountTof= inish, Cr3); +; This function is called during the finalizaiton of Mp initialization be= fore booting +; to OS, and aim to put Aps either in Mwait or HLT. +;-------------------------------------------------------------------------= ------------ +; +----------------+ +; | Cr3 | rsp+40 +; +----------------+ +; | CountTofinish | r9 +; +----------------+ +; | TopOfApStack | r8 +; +----------------+ +; | ApTargetCState | rdx +; +----------------+ +; | MwaitSupport | rcx +; +----------------+ +; | the return | +; +----------------+ low address + +AsmRelocateApLoopGenericStart: + mov rax, r9 ; CountTofinish + lock dec dword [rax] ; (*CountTofinish)-- + + mov rax, [rsp + 40] ; Cr3 + ; Do not push on old stack, since old stack is not mapped + ; in the page table pointed by cr3 + mov cr3, rax + mov rsp, r8 ; TopOfApStack + +MwaitCheckGeneric: + cmp cl, 1 ; Check mwait-monitor support + jnz HltLoopGeneric + mov rbx, rdx ; Save C-State to ebx + +MwaitLoopGeneric: + cli + mov rax, rsp ; Set Monitor Address + xor ecx, ecx ; ecx =3D 0 + xor edx, edx ; edx =3D 0 + monitor + mov rax, rbx ; Mwait Cx, Target C-State per eax[7:4] + shl eax, 4 + mwait + jmp MwaitLoopGeneric + +HltLoopGeneric: + cli + hlt + jmp HltLoopGeneric + +AsmRelocateApLoopGenericEnd: + ;-------------------------------------------------------------------------= ------------ ; AsmGetAddressMap (&AddressMap); ;-------------------------------------------------------------------------= ------------ @@ -456,6 +508,9 @@ ASM_PFX(AsmGetAddressMap): mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RendezvousFunnelAddres= s], rax mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.ModeEntryOffset], Long= ModeStart - RendezvousFunnelProcStart mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RendezvousFunnelSize],= RendezvousFunnelProcEnd - RendezvousFunnelProcStart +lea rax, [AsmRelocateApLoopGenericStart] + mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddr= essGeneric], rax + mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize= Generic], AsmRelocateApLoopGenericEnd - AsmRelocateApLoopGenericStart lea rax, [AsmRelocateApLoopStart] mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddr= ess], rax mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize= ], AsmRelocateApLoopEnd - AsmRelocateApLoopStart --=20 2.36.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100577): https://edk2.groups.io/g/devel/message/100577 Mute This Topic: https://groups.io/mt/97309037/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun Apr 28 03:20:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100578+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100578+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1677651024; cv=none; d=zohomail.com; s=zohoarc; b=WpY2bjaPVl9YgOWILJr5q8xVBLdDWbWt+sIv4Ab71ruaEKG2Gz+hJp7SVePISonO1P3l/6AugHmYjXo4AXpU5daNTdGd+PjJulviWQKJvd/TNkUydjRdqRhaewIMG3CVGuMzMU/31hk9+qY9ipmSBfIzsRhN5EN+2fd7fwTzf5g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1677651024; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=B+rGX7m0EeFIIA0lCdMyo3xU4FNs4mntjb2yWGFnrTk=; b=f4LcvL2m/wL2fy6+kPtkY259x5aWtgj/ecVFkci5IvKc8wfQpf4/Oh396ONIDmcovdyd6AHIc3W2i2MaSCmH5/UxQApg4IHwXsBbhq01+C8aQ/RNum2gVL6xnTYd/vCZ4bZlFj9cPDuoMkM3Ucp6GB/Rox8ocgHBR3U21k0M/nI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100578+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1677651024823395.42743201103417; Tue, 28 Feb 2023 22:10:24 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id WfEwYY1788612xJu6jRdFSbd; Tue, 28 Feb 2023 22:10:24 -0800 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web10.15979.1677651005289052489 for ; Tue, 28 Feb 2023 22:10:24 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10635"; a="420590756" X-IronPort-AV: E=Sophos;i="5.98,224,1673942400"; d="scan'208";a="420590756" X-Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 22:10:23 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10635"; a="1003533765" X-IronPort-AV: E=Sophos;i="5.98,224,1673942400"; d="scan'208";a="1003533765" X-Received: from shwdeopenlab705.ccr.corp.intel.com ([10.239.55.55]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 22:10:22 -0800 From: "Yuanhao Xie" To: devel@edk2.groups.io Cc: Guo Dong , Ray Ni , Sean Rhodes , James Lu , Gua Guo Subject: [edk2-devel] [Patch V4 7/8] UefiCpuPkg: Rename AsmRelocateApLoopStart. Date: Wed, 1 Mar 2023 14:09:53 +0800 Message-Id: <20230301060954.1464-8-yuanhao.xie@intel.com> In-Reply-To: <20230301060954.1464-1-yuanhao.xie@intel.com> References: <20230301060954.1464-1-yuanhao.xie@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,yuanhao.xie@intel.com X-Gm-Message-State: 4PuDQiN8f7xDiCa6US6kZbSax1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1677651024; bh=U/kk1hLiaMVWm7TIHEjFtqio6iVC7CCltiTWHHCAS1U=; h=Cc:Date:From:Reply-To:Subject:To; b=wlynbOqqzspvr8zLKKkhy3uHEoMQHyKrsMtMhY3Zo70ruAi33SO+B1uCzy7SQXZ4bqt hhltogqaAOgc5ldxsoJVpf8lmdxuxhiBYp9OiwZ/gUMUAX6avUtRAVICIY3Cxt/lGTJpN mnJEyY3EgmNLGrLqXZaRKrkWf5FTZ5O5Vow= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1677651025708100002 Content-Type: text/plain; charset="utf-8" Rename AsmRelocateApLoopStart to AsmRelocateApLoopStartAmdSev Cc: Guo Dong Cc: Ray Ni Cc: Sean Rhodes Cc: James Lu Cc: Gua Guo Signed-off-by: Yuanhao Xie Acked-by: Gerd Hoffmann Reviewed-by: Ray Ni Tested-by: Gerd Hoffmann --- UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 4 ++-- UefiCpuPkg/Library/MpInitLib/MpEqu.inc | 4 ++-- UefiCpuPkg/Library/MpInitLib/MpLib.h | 8 ++++---- UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 40 ++++++++++++++++++++---= ----------------- 4 files changed, 28 insertions(+), 28 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c b/UefiCpuPkg/Library/M= pInitLib/DxeMpLib.c index d292277d10..330676b700 100644 --- a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c @@ -547,8 +547,8 @@ InitMpGlobalData ( // 64-bit AMD processors with SEV-ES // Address =3D BASE_4GB - 1; - ApLoopFunc =3D AddressMap->RelocateApLoopFuncAddress; - ApLoopFuncSize =3D AddressMap->RelocateApLoopFuncSize; + ApLoopFunc =3D AddressMap->RelocateApLoopFuncAddressAmdSev; + ApLoopFuncSize =3D AddressMap->RelocateApLoopFuncSizeAmdSev; } else { // // Intel processors (32-bit or 64-bit), 32-bit AMD processors, or 64-b= it AMD processors without SEV-ES diff --git a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc b/UefiCpuPkg/Library/Mp= InitLib/MpEqu.inc index 09c1817426..72af196513 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc +++ b/UefiCpuPkg/Library/MpInitLib/MpEqu.inc @@ -26,8 +26,8 @@ struc MP_ASSEMBLY_ADDRESS_MAP .RendezvousFunnelSize CTYPE_UINTN 1 .RelocateApLoopFuncAddressGeneric CTYPE_UINTN 1 .RelocateApLoopFuncSizeGeneric CTYPE_UINTN 1 - .RelocateApLoopFuncAddress CTYPE_UINTN 1 - .RelocateApLoopFuncSize CTYPE_UINTN 1 + .RelocateApLoopFuncAddressAmdSev CTYPE_UINTN 1 + .RelocateApLoopFuncSizeAmdSev CTYPE_UINTN 1 .ModeTransitionOffset CTYPE_UINTN 1 .SwitchToRealNoNxOffset CTYPE_UINTN 1 .SwitchToRealPM16ModeOffset CTYPE_UINTN 1 diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpIn= itLib/MpLib.h index e137545fc6..6f235dcf6d 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -179,8 +179,8 @@ typedef struct { UINTN RendezvousFunnelSize; UINT8 *RelocateApLoopFuncAddressGeneric; UINTN RelocateApLoopFuncSizeGeneric; - UINT8 *RelocateApLoopFuncAddress; - UINTN RelocateApLoopFuncSize; + UINT8 *RelocateApLoopFuncAddressAmdSev; + UINTN RelocateApLoopFuncSizeAmdSev; UINTN ModeTransitionOffset; UINTN SwitchToRealNoNxOffset; UINTN SwitchToRealPM16ModeOffset; @@ -388,7 +388,7 @@ typedef **/ typedef VOID -(EFIAPI *ASM_RELOCATE_AP_LOOP)( +(EFIAPI *ASM_RELOCATE_AP_LOOP_AMDSEV)( IN BOOLEAN MwaitSupport, IN UINTN ApTargetCState, IN UINTN PmCodeSegment, @@ -429,7 +429,7 @@ AsmExchangeRole ( =20 typedef union { VOID *Data; - ASM_RELOCATE_AP_LOOP AmdSevEntry; // 64-bit AMD Sev processo= rs + ASM_RELOCATE_AP_LOOP_AMDSEV AmdSevEntry; // 64-bit AMD Sev processo= rs ASM_RELOCATE_AP_LOOP_GENERIC GenericEntry; // Intel processors (32-bi= t or 64-bit), 32-bit AMD processors, or AMD non-Sev processors } RELOCATE_AP_LOOP_ENTRY; =20 diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Lib= rary/MpInitLib/X64/MpFuncs.nasm index c0d7355c6b..1a64d5681f 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm @@ -277,14 +277,14 @@ CProcedureInvoke: %include "AmdSev.nasm" =20 RendezvousFunnelProcEnd: - ;-------------------------------------------------------------------------= ------------ -; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfAp= Stack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer); +; AsmRelocateApLoopAmdSev (MwaitSupport, ApTargetCState, PmCodeSegment, T= opOfApStack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer= ); ;-------------------------------------------------------------------------= ------------ -AsmRelocateApLoopStart: + +AsmRelocateApLoopAmdSevStart: BITS 64 cmp qword [rsp + 56], 0 ; SevEsAPJumpTable - je NoSevEs + je NoSevEsAmdSev =20 ; ; Perform some SEV-ES related setup before leaving 64-bit mode @@ -329,7 +329,7 @@ BITS 64 pop rdx pop rcx =20 -NoSevEs: +NoSevEsAmdSev: cli ; Disable interrupt before switching to 3= 2-bit mode mov rax, [rsp + 40] ; CountTofinish lock dec dword [rax] ; (*CountTofinish)-- @@ -345,7 +345,7 @@ NoSevEs: push rcx ; Save MwaitSupport push rdx ; Save ApTargetCState =20 - lea rax, [PmEntry] ; rax <- The start address of transition = code + lea rax, [PmEntryAmdSev] ; rax <- The start address of trans= ition code =20 push r8 push rax @@ -365,10 +365,10 @@ NoSevEs: ; ; Far return into 32-bit mode ; - retfq +o64 retf =20 BITS 32 -PmEntry: +PmEntryAmdSev: mov eax, cr0 btr eax, 31 ; Clear CR0.PG mov cr0, eax ; Disable paging and caches @@ -386,11 +386,11 @@ PmEntry: pop ecx, add esp, 4 =20 -MwaitCheck: +MwaitCheckAmdSev: cmp cl, 1 ; Check mwait-monitor support - jnz HltLoop + jnz HltLoopAmdSev mov ebx, edx ; Save C-State to ebx -MwaitLoop: +MwaitLoopAmdSev: cli mov eax, esp ; Set Monitor Address xor ecx, ecx ; ecx =3D 0 @@ -399,9 +399,9 @@ MwaitLoop: mov eax, ebx ; Mwait Cx, Target C-State per eax[7:4] shl eax, 4 mwait - jmp MwaitLoop + jmp MwaitLoopAmdSev =20 -HltLoop: +HltLoopAmdSev: pop edx ; PM16CodeSegment add esp, 4 pop ebx ; WakeupBuffer @@ -409,7 +409,7 @@ HltLoop: pop eax ; SevEsAPJumpTable add esp, 4 cmp eax, 0 ; Check for SEV-ES - je DoHlt + je DoHltAmdSev =20 cli ; @@ -439,13 +439,13 @@ BITS 32 =20 retf =20 -DoHlt: +DoHltAmdSev: cli hlt - jmp DoHlt + jmp DoHltAmdSev =20 BITS 64 -AsmRelocateApLoopEnd: +AsmRelocateApLoopAmdSevEnd: =20 ;-------------------------------------------------------------------------= ------------ ; AsmRelocateApLoop (MwaitSupport, ApTargetCState, TopOfApStack, CountTof= inish, Cr3); @@ -511,9 +511,9 @@ ASM_PFX(AsmGetAddressMap): lea rax, [AsmRelocateApLoopGenericStart] mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddr= essGeneric], rax mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize= Generic], AsmRelocateApLoopGenericEnd - AsmRelocateApLoopGenericStart - lea rax, [AsmRelocateApLoopStart] - mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddr= ess], rax - mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize= ], AsmRelocateApLoopEnd - AsmRelocateApLoopStart + lea rax, [AsmRelocateApLoopAmdSevStart] + mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddr= essAmdSev], rax + mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize= AmdSev], AsmRelocateApLoopAmdSevEnd - AsmRelocateApLoopAmdSevStart mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.ModeTransitionOffset],= Flat32Start - RendezvousFunnelProcStart mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealNoNxOffset= ], SwitchToRealProcStart - Flat32Start mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealPM16ModeOf= fset], PM16Mode - RendezvousFunnelProcStart --=20 2.36.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100578): https://edk2.groups.io/g/devel/message/100578 Mute This Topic: https://groups.io/mt/97309038/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun Apr 28 03:20:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100579+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100579+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1677651027; cv=none; d=zohomail.com; s=zohoarc; b=MjS4Vmc42Wg3uMHw9xsYRoG1AYcYqESDUU47/0jOThsiPjKm3kGEjfAbhmITycjsG/hLPHSMQ54729nKdXtzfH70j4qiW1OzYh9ohLiZ+5XJnC5iQsz3LdHnbOGPGQN4B2IfzSwWc1hqDuBoybrvB0sx9OK6o8ipvbd7tYwEz8k= ARC-Message-Signature: i=1; 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Tue, 28 Feb 2023 22:10:26 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10635"; a="420590784" X-IronPort-AV: E=Sophos;i="5.98,224,1673942400"; d="scan'208";a="420590784" X-Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 22:10:26 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10635"; a="1003533774" X-IronPort-AV: E=Sophos;i="5.98,224,1673942400"; d="scan'208";a="1003533774" X-Received: from shwdeopenlab705.ccr.corp.intel.com ([10.239.55.55]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 22:10:24 -0800 From: "Yuanhao Xie" To: devel@edk2.groups.io Cc: Guo Dong , Ray Ni , Sean Rhodes , James Lu , Gua Guo Subject: [edk2-devel] [Patch V4 8/8] UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm Date: Wed, 1 Mar 2023 14:09:54 +0800 Message-Id: <20230301060954.1464-9-yuanhao.xie@intel.com> In-Reply-To: <20230301060954.1464-1-yuanhao.xie@intel.com> References: <20230301060954.1464-1-yuanhao.xie@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,yuanhao.xie@intel.com X-Gm-Message-State: 4BWZD9QRE1SrAI0kGGCDGfWUx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1677651027; bh=5q35TiAz1h+RJiejF/BwS/ZeHvcRPqjEZoSXHYs5V8I=; h=Cc:Date:From:Reply-To:Subject:To; b=gFaYueXqkdWbxmhtIxjTsuFEyh3DFtm7WgIFr8N/jnRyXGXH/ciPsFrkGRdtykxBhgI DwW96EHYb+dQL6u++OoKXjJDT7TFLv2qvpvV/488zhjSEASTizTPnKugGRQaucq/aS7xP fQ+FcZcNp0scTp382dsArzT7QnBrdHhtqo0= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1677651029623100009 Content-Type: text/plain; charset="utf-8" Cc: Guo Dong Cc: Ray Ni Cc: Sean Rhodes Cc: James Lu Cc: Gua Guo Signed-off-by: Yuanhao Xie Acked-by: Gerd Hoffmann Reviewed-by: Ray Ni Tested-by: Gerd Hoffmann --- UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm | 170 ++++++++++++++++++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 169 ----------------------= ---------------------------------------------------------------------------= ------------------------------------------------------------------------ 2 files changed, 170 insertions(+), 169 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm b/UefiCpuPkg/Libr= ary/MpInitLib/X64/AmdSev.nasm index 7c2469f9c5..2efa3cb104 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm +++ b/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm @@ -346,3 +346,173 @@ PM16Mode: iret =20 SwitchToRealProcEnd: + +;-------------------------------------------------------------------------= ------------ +; AsmRelocateApLoopAmdSev (MwaitSupport, ApTargetCState, PmCodeSegment, T= opOfApStack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer= ); +;-------------------------------------------------------------------------= ------------ + +AsmRelocateApLoopAmdSevStart: +BITS 64 + cmp qword [rsp + 56], 0 ; SevEsAPJumpTable + je NoSevEsAmdSev + + ; + ; Perform some SEV-ES related setup before leaving 64-bit mode + ; + push rcx + push rdx + + ; + ; Get the RDX reset value using CPUID + ; + mov rax, 1 + cpuid + mov rsi, rax ; Save off the reset value for RDX + + ; + ; Prepare the GHCB for the AP_HLT_LOOP VMGEXIT call + ; - Must be done while in 64-bit long mode so that writes to + ; the GHCB memory will be unencrypted. + ; - No NAE events can be generated once this is set otherwise + ; the AP_RESET_HOLD SW_EXITCODE will be overwritten. + ; + mov rcx, 0xc0010130 + rdmsr ; Retrieve current GHCB address + shl rdx, 32 + or rdx, rax + + mov rdi, rdx + xor rax, rax + mov rcx, 0x800 + shr rcx, 3 + rep stosq ; Clear the GHCB + + mov rax, 0x80000004 ; VMGEXIT AP_RESET_HOLD + mov [rdx + 0x390], rax + mov rax, 114 ; Set SwExitCode valid bit + bts [rdx + 0x3f0], rax + inc rax ; Set SwExitInfo1 valid bit + bts [rdx + 0x3f0], rax + inc rax ; Set SwExitInfo2 valid bit + bts [rdx + 0x3f0], rax + + pop rdx + pop rcx + +NoSevEsAmdSev: + cli ; Disable interrupt before switching to 3= 2-bit mode + mov rax, [rsp + 40] ; CountTofinish + lock dec dword [rax] ; (*CountTofinish)-- + + mov r10, [rsp + 48] ; Pm16CodeSegment + mov rax, [rsp + 56] ; SevEsAPJumpTable + mov rbx, [rsp + 64] ; WakeupBuffer + mov rsp, r9 ; TopOfApStack + + push rax ; Save SevEsAPJumpTable + push rbx ; Save WakeupBuffer + push r10 ; Save Pm16CodeSegment + push rcx ; Save MwaitSupport + push rdx ; Save ApTargetCState + + lea rax, [PmEntryAmdSev] ; rax <- The start address of trans= ition code + + push r8 + push rax + + ; + ; Clear R8 - R15, for reset, before going into 32-bit mode + ; + xor r8, r8 + xor r9, r9 + xor r10, r10 + xor r11, r11 + xor r12, r12 + xor r13, r13 + xor r14, r14 + xor r15, r15 + + ; + ; Far return into 32-bit mode + ; +o64 retf + +BITS 32 +PmEntryAmdSev: + mov eax, cr0 + btr eax, 31 ; Clear CR0.PG + mov cr0, eax ; Disable paging and caches + + mov ecx, 0xc0000080 + rdmsr + and ah, ~ 1 ; Clear LME + wrmsr + mov eax, cr4 + and al, ~ (1 << 5) ; Clear PAE + mov cr4, eax + + pop edx + add esp, 4 + pop ecx, + add esp, 4 + +MwaitCheckAmdSev: + cmp cl, 1 ; Check mwait-monitor support + jnz HltLoopAmdSev + mov ebx, edx ; Save C-State to ebx +MwaitLoopAmdSev: + cli + mov eax, esp ; Set Monitor Address + xor ecx, ecx ; ecx =3D 0 + xor edx, edx ; edx =3D 0 + monitor + mov eax, ebx ; Mwait Cx, Target C-State per eax[7:4] + shl eax, 4 + mwait + jmp MwaitLoopAmdSev + +HltLoopAmdSev: + pop edx ; PM16CodeSegment + add esp, 4 + pop ebx ; WakeupBuffer + add esp, 4 + pop eax ; SevEsAPJumpTable + add esp, 4 + cmp eax, 0 ; Check for SEV-ES + je DoHltAmdSev + + cli + ; + ; SEV-ES is enabled, use VMGEXIT (GHCB information already + ; set by caller) + ; +BITS 64 + rep vmmcall +BITS 32 + + ; + ; Back from VMGEXIT AP_HLT_LOOP + ; Push the FLAGS/CS/IP values to use + ; + push word 0x0002 ; EFLAGS + xor ecx, ecx + mov cx, [eax + 2] ; CS + push cx + mov cx, [eax] ; IP + push cx + push word 0x0000 ; For alignment, will be discarded + + push edx + push ebx + + mov edx, esi ; Restore RDX reset value + + retf + +DoHltAmdSev: + cli + hlt + jmp DoHltAmdSev + +BITS 64 +AsmRelocateApLoopAmdSevEnd: diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Lib= rary/MpInitLib/X64/MpFuncs.nasm index 1a64d5681f..9ebe31795b 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm @@ -277,175 +277,6 @@ CProcedureInvoke: %include "AmdSev.nasm" =20 RendezvousFunnelProcEnd: -;-------------------------------------------------------------------------= ------------ -; AsmRelocateApLoopAmdSev (MwaitSupport, ApTargetCState, PmCodeSegment, T= opOfApStack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer= ); -;-------------------------------------------------------------------------= ------------ - -AsmRelocateApLoopAmdSevStart: -BITS 64 - cmp qword [rsp + 56], 0 ; SevEsAPJumpTable - je NoSevEsAmdSev - - ; - ; Perform some SEV-ES related setup before leaving 64-bit mode - ; - push rcx - push rdx - - ; - ; Get the RDX reset value using CPUID - ; - mov rax, 1 - cpuid - mov rsi, rax ; Save off the reset value for RDX - - ; - ; Prepare the GHCB for the AP_HLT_LOOP VMGEXIT call - ; - Must be done while in 64-bit long mode so that writes to - ; the GHCB memory will be unencrypted. - ; - No NAE events can be generated once this is set otherwise - ; the AP_RESET_HOLD SW_EXITCODE will be overwritten. - ; - mov rcx, 0xc0010130 - rdmsr ; Retrieve current GHCB address - shl rdx, 32 - or rdx, rax - - mov rdi, rdx - xor rax, rax - mov rcx, 0x800 - shr rcx, 3 - rep stosq ; Clear the GHCB - - mov rax, 0x80000004 ; VMGEXIT AP_RESET_HOLD - mov [rdx + 0x390], rax - mov rax, 114 ; Set SwExitCode valid bit - bts [rdx + 0x3f0], rax - inc rax ; Set SwExitInfo1 valid bit - bts [rdx + 0x3f0], rax - inc rax ; Set SwExitInfo2 valid bit - bts [rdx + 0x3f0], rax - - pop rdx - pop rcx - -NoSevEsAmdSev: - cli ; Disable interrupt before switching to 3= 2-bit mode - mov rax, [rsp + 40] ; CountTofinish - lock dec dword [rax] ; (*CountTofinish)-- - - mov r10, [rsp + 48] ; Pm16CodeSegment - mov rax, [rsp + 56] ; SevEsAPJumpTable - mov rbx, [rsp + 64] ; WakeupBuffer - mov rsp, r9 ; TopOfApStack - - push rax ; Save SevEsAPJumpTable - push rbx ; Save WakeupBuffer - push r10 ; Save Pm16CodeSegment - push rcx ; Save MwaitSupport - push rdx ; Save ApTargetCState - - lea rax, [PmEntryAmdSev] ; rax <- The start address of trans= ition code - - push r8 - push rax - - ; - ; Clear R8 - R15, for reset, before going into 32-bit mode - ; - xor r8, r8 - xor r9, r9 - xor r10, r10 - xor r11, r11 - xor r12, r12 - xor r13, r13 - xor r14, r14 - xor r15, r15 - - ; - ; Far return into 32-bit mode - ; -o64 retf - -BITS 32 -PmEntryAmdSev: - mov eax, cr0 - btr eax, 31 ; Clear CR0.PG - mov cr0, eax ; Disable paging and caches - - mov ecx, 0xc0000080 - rdmsr - and ah, ~ 1 ; Clear LME - wrmsr - mov eax, cr4 - and al, ~ (1 << 5) ; Clear PAE - mov cr4, eax - - pop edx - add esp, 4 - pop ecx, - add esp, 4 - -MwaitCheckAmdSev: - cmp cl, 1 ; Check mwait-monitor support - jnz HltLoopAmdSev - mov ebx, edx ; Save C-State to ebx -MwaitLoopAmdSev: - cli - mov eax, esp ; Set Monitor Address - xor ecx, ecx ; ecx =3D 0 - xor edx, edx ; edx =3D 0 - monitor - mov eax, ebx ; Mwait Cx, Target C-State per eax[7:4] - shl eax, 4 - mwait - jmp MwaitLoopAmdSev - -HltLoopAmdSev: - pop edx ; PM16CodeSegment - add esp, 4 - pop ebx ; WakeupBuffer - add esp, 4 - pop eax ; SevEsAPJumpTable - add esp, 4 - cmp eax, 0 ; Check for SEV-ES - je DoHltAmdSev - - cli - ; - ; SEV-ES is enabled, use VMGEXIT (GHCB information already - ; set by caller) - ; -BITS 64 - rep vmmcall -BITS 32 - - ; - ; Back from VMGEXIT AP_HLT_LOOP - ; Push the FLAGS/CS/IP values to use - ; - push word 0x0002 ; EFLAGS - xor ecx, ecx - mov cx, [eax + 2] ; CS - push cx - mov cx, [eax] ; IP - push cx - push word 0x0000 ; For alignment, will be discarded - - push edx - push ebx - - mov edx, esi ; Restore RDX reset value - - retf - -DoHltAmdSev: - cli - hlt - jmp DoHltAmdSev - -BITS 64 -AsmRelocateApLoopAmdSevEnd: =20 ;-------------------------------------------------------------------------= ------------ ; AsmRelocateApLoop (MwaitSupport, ApTargetCState, TopOfApStack, CountTof= inish, Cr3); --=20 2.36.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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