From nobody Sun May 5 06:00:40 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100467+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100467+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1677196510; cv=none; d=zohomail.com; s=zohoarc; b=PpwIXZ3YwQpP38v5A57rSA57Cdw7URT12OH/HtwTfO1D5ELZLToktkwZM67LQad8lqiYg10ijpopAveysi3x3cGArPAfuDRRUxq1dZIAGVAY8/Sw9+pQw1TJ/Krk9Jrrsv1lynryNi1QgRA3EZC66j9axGAOFAcePUZ2MwRKbao= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1677196510; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=dfltNRfGR3bAVBljlf0i2qMx12fckVIMn9cDSzusQZc=; b=i6RAt2hnECF2FS1CvALhF3eQzy2ERC7laNmm1s87tzdIIqpLebRmjRflOFA/+rzBBjoIcxaXv8PmzYgzd03edhVWT0lnyPR5eYW3ZuZaZsafmeibw03hiA1geAiR0AmCGkWCx/jfEt4xoOb/TFDkKF5Gzww0UmGlhD+YYxOGX+E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100467+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1677196510118218.68682778175446; Thu, 23 Feb 2023 15:55:10 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id C0ChYY1788612xjMDWtlH3JN; Thu, 23 Feb 2023 15:55:09 -0800 X-Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web10.5673.1677196505855436099 for ; Thu, 23 Feb 2023 15:55:09 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10630"; a="321549901" X-IronPort-AV: E=Sophos;i="5.97,322,1669104000"; d="scan'208";a="321549901" X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2023 15:55:09 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10630"; a="702984426" X-IronPort-AV: E=Sophos;i="5.97,322,1669104000"; d="scan'208";a="702984426" X-Received: from cywong-mobl.amr.corp.intel.com (HELO awarkent-mobl1.amr.corp.intel.com) ([10.212.53.4]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2023 15:55:08 -0800 From: "Andrei Warkentin" To: devel@edk2.groups.io Cc: Andrei Warkentin , Sunil V L , Jiewen Yao , Ard Biesheuvel Subject: [edk2-devel] [PATCH 1/7] OvmfPkg: RiscVVirt: add SATA support Date: Thu, 23 Feb 2023 17:54:48 -0600 Message-Id: <20230223235454.23556-2-andrei.warkentin@intel.com> In-Reply-To: <20230223235454.23556-1-andrei.warkentin@intel.com> References: <20230223235454.23556-1-andrei.warkentin@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,andrei.warkentin@intel.com X-Gm-Message-State: bfTNAge8EXGycGq4lBHQ4IPrx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1677196509; bh=Z9g1JA5pOT52DTKEjhD54nXc+G+tV3lhEoWZtqLUSEQ=; h=Cc:Date:From:Reply-To:Subject:To; b=cG0S4+KBnqjoIcImuYiq+zhD//AymLpWbF0yMrkiz3PfUnZALFZVcYCd9aP7Tlo86z+ feOiVFKfg9EwlYFDWvBumGhdhC7Bk8Tt0HWGGnId7kq+a9Gyj0yEwSvzW5Jm/mbhl3LzZ UA58Z/DWyKRTJeEh5g+sfZcVSJG7p3NCNzE= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1677196511145100004 Content-Type: text/plain; charset="utf-8" Tested with a PCIe pass-thru'd AHCI controller. Cc: Sunil V L Cc: Jiewen Yao Cc: Ard Biesheuvel Signed-off-by: Andrei Warkentin Reviewed-by: Sunil V L --- OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc | 7 +++++++ OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf | 7 +++++++ 2 files changed, 14 insertions(+) diff --git a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc b/OvmfPkg/RiscVVirt/RiscVV= irtQemu.dsc index 054d511138c3..28d9af4d79b9 100644 --- a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc +++ b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc @@ -426,6 +426,13 @@ [Components] MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf =20 + # + # SATA + # + MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf + MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf + MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf + # # NVME Driver # diff --git a/OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf b/OvmfPkg/RiscVVirt/RiscVV= irtQemu.fdf index 6072c37af03d..354c9271d10c 100644 --- a/OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf +++ b/OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf @@ -137,6 +137,13 @@ [FV.DXEFV] INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf =20 +# +# SATA +# +INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf +INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf +INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf + # # NVME Driver # --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100467): https://edk2.groups.io/g/devel/message/100467 Mute This Topic: https://groups.io/mt/97196078/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 5 06:00:40 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100468+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100468+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1677196512; cv=none; d=zohomail.com; s=zohoarc; b=VssXUY7OWy2jLQHqtgllApUsiW4ZM813mIjjEpVW3tSZpVCYvcifzYePoeVxNay7LU6P2dC0f4At2rk6Xn9upeMzI6C2/ojwp7alvHe2RL4kEs3nPLtVDRJhymE/atRz7WppCyI9ealrDRnSa+lFo66JqJaAIFNYrbWJUAbFbwk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1677196512; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=c0FR377Wh6hxtn0hcj1C1mbYps8FZf/CP4NZgZOISaY=; b=laUYTgpgEB+/iGGunevrTWIuDe+XsJYBZVdxukKxDLdMmZdCXLiXTyMKznpIsGBrgiye7GDywbqJBrJ7HGx8aynU/GO9Ni0jafv0PwiEtO6yyOCiIBI+3Gr1z1HNUqVH+foXj8506UzV/tXxLfLqODn8YHZqxMNFyNa5A5ZWPvQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100468+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1677196512483936.0983684933458; Thu, 23 Feb 2023 15:55:12 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id EXfZYY1788612xNMTTi5eMJM; Thu, 23 Feb 2023 15:55:12 -0800 X-Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web10.5673.1677196505855436099 for ; Thu, 23 Feb 2023 15:55:11 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10630"; a="321549940" X-IronPort-AV: E=Sophos;i="5.97,322,1669104000"; d="scan'208";a="321549940" X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2023 15:55:11 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10630"; a="702984464" X-IronPort-AV: E=Sophos;i="5.97,322,1669104000"; d="scan'208";a="702984464" X-Received: from cywong-mobl.amr.corp.intel.com (HELO awarkent-mobl1.amr.corp.intel.com) ([10.212.53.4]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2023 15:55:10 -0800 From: "Andrei Warkentin" To: devel@edk2.groups.io Cc: Andrei Warkentin , Sunil V L , Daniel Schaefer , Michael D Kinney , Liming Gao , Zhiguang Liu Subject: [edk2-devel] [PATCH 2/7] MdePkg: BasePeCoffLib: Allow AArch64 and x64 images in ImageFormatSupported Date: Thu, 23 Feb 2023 17:54:49 -0600 Message-Id: <20230223235454.23556-3-andrei.warkentin@intel.com> In-Reply-To: <20230223235454.23556-1-andrei.warkentin@intel.com> References: <20230223235454.23556-1-andrei.warkentin@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,andrei.warkentin@intel.com X-Gm-Message-State: jLRRVo44loufaa47odi1dUI0x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1677196512; bh=wbPzFqZuCr/g+mZoEZ35HWn4VwIBMgJu/3vdTIhBZ8g=; h=Cc:Date:From:Reply-To:Subject:To; b=EYZI7kA0TfJ+rMvISn4gcE6NtPUGq96Sc6bKZam9exw6q+3uV33RxfEZtkOuxJi9PkU QWMMvx2wxQZu8fyx/27Em/Q1G3/fzINjExrM1CdoZvSdpthLpA/nalhTWE2iMdyvQSP5d xrGxeGpyn+jofyHmZ95hW6Ik2xHQ/v7KP9Y= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1677196513134100010 Content-Type: text/plain; charset="utf-8" ARM64 and X64 may allow such foreign images to be used when driver implementing EDKII_PECOFF_IMAGE_EMULATOR_PROTOCOL is present. Cc: Sunil V L Cc: Daniel Schaefer Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Signed-off-by: Andrei Warkentin Reviewed-by: Sunil V L --- MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c b/MdePkg/L= ibrary/BasePeCoffLib/RiscV/PeCoffLoaderEx.c index adbfe9ccf580..0e9ee395dc26 100644 --- a/MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c +++ b/MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c @@ -104,7 +104,14 @@ PeCoffLoaderImageFormatSupported ( IN UINT16 Machine ) { - if (Machine =3D=3D IMAGE_FILE_MACHINE_RISCV64) { + /* + * ARM64 and X64 may allow such foreign images to be used when + * a driver implementing EDKII_PECOFF_IMAGE_EMULATOR_PROTOCOL is + * present. + */ + if (Machine =3D=3D IMAGE_FILE_MACHINE_RISCV64 || + Machine =3D=3D IMAGE_FILE_MACHINE_ARM64 || + Machine =3D=3D IMAGE_FILE_MACHINE_X64) { return TRUE; } =20 --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100468): https://edk2.groups.io/g/devel/message/100468 Mute This Topic: https://groups.io/mt/97196081/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 5 06:00:40 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100469+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100469+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1677196514; cv=none; d=zohomail.com; s=zohoarc; b=d7m5M0x7tP8FPkrzZ5FOvxS0sKc7kuQM0OtfLOiQ4B6OJetowLC+9s6vph8rD8W+2SbuNMvZXUJRwdsldTdG5Gt1Hkv7ECnJgHNjDJl4wSZFJR0d1MBZDDAON6EGVFgdN46KwnxiGQGx10yPfy3Potd5Cnh+BZU3XjLay+b/Yqw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1677196514; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=5zFoDqss3ULcHBGzLW/dPsQdIQ87Fe5zMKB8f7gHLyo=; b=lqA+hYBXoAbSNWDFw7HEDqlmhVJA6UU+zPJmvlh/9G8CVK9ZW6GfzTakS1wei3YYkP629m7t03fb+6J6F4aPewHd8mh3XPHLL2s6T9yb3+gNHdMIoorQ/zbXn5dYzcreFs35oledLpEN9lz9iECLA7bIZbUF28PlJwAJNrMX8+I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100469+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1677196514200233.3416868628741; Thu, 23 Feb 2023 15:55:14 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id tg0QYY1788612xEGAUfmD9Uh; Thu, 23 Feb 2023 15:55:13 -0800 X-Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web10.5673.1677196505855436099 for ; Thu, 23 Feb 2023 15:55:13 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10630"; a="321549960" X-IronPort-AV: E=Sophos;i="5.97,322,1669104000"; d="scan'208";a="321549960" X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2023 15:55:12 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10630"; a="702984490" X-IronPort-AV: E=Sophos;i="5.97,322,1669104000"; d="scan'208";a="702984490" X-Received: from cywong-mobl.amr.corp.intel.com (HELO awarkent-mobl1.amr.corp.intel.com) ([10.212.53.4]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2023 15:55:12 -0800 From: "Andrei Warkentin" To: devel@edk2.groups.io Cc: Andrei Warkentin , Daniel Schaefer , Michael D Kinney , Liming Gao , Zhiguang Liu , Sunil V L Subject: [edk2-devel] [PATCH 3/7] MdePkg: BaseLib: don't log in RISCV InternalSwitchStack Date: Thu, 23 Feb 2023 17:54:50 -0600 Message-Id: <20230223235454.23556-4-andrei.warkentin@intel.com> In-Reply-To: <20230223235454.23556-1-andrei.warkentin@intel.com> References: <20230223235454.23556-1-andrei.warkentin@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,andrei.warkentin@intel.com X-Gm-Message-State: Mk6noKZTiAzi8nowsJO40Cdux1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1677196513; bh=lLyMcb1hIzF3TGg9/K23fLzOAt9gEabVYyz1ERcGgx4=; h=Cc:Date:From:Reply-To:Subject:To; b=eY1ntmeX8BKJisbfvX8nAsFMlvbel5pZfB2UoBQrrsyKbMM4I/eZDXJ/l5+XoduPCTF KNgKeRMUs6tIVa1iym2ltoz2GeICo6SLDg/AGNITD+GD8/PW+AXzgnvC+AR6Y/ysakDGy f6QntIBneNEjKW3HakPwu4VU8t/cYj3ahtQ= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1677196515092100014 Content-Type: text/plain; charset="utf-8" InternalSwitchStack may be called with a TPL high enough for a DebugLib implementation to assert. Other arch implementations don't log either. Cc: Daniel Schaefer Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Reviewed-by: Sunil V L Signed-off-by: Andrei Warkentin --- MdePkg/Library/BaseLib/RiscV64/InternalSwitchStack.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/MdePkg/Library/BaseLib/RiscV64/InternalSwitchStack.c b/MdePkg/= Library/BaseLib/RiscV64/InternalSwitchStack.c index cf646e498aba..b78424c16383 100644 --- a/MdePkg/Library/BaseLib/RiscV64/InternalSwitchStack.c +++ b/MdePkg/Library/BaseLib/RiscV64/InternalSwitchStack.c @@ -44,14 +44,6 @@ InternalSwitchStack ( { BASE_LIBRARY_JUMP_BUFFER JumpBuffer; =20 - DEBUG (( - DEBUG_INFO, - "RISC-V InternalSwitchStack Entry:%x Context1:%x Context2:%x NewStack%= x\n", \ - EntryPoint, - Context1, - Context2, - NewStack - )); JumpBuffer.RA =3D (UINTN)EntryPoint; JumpBuffer.SP =3D (UINTN)NewStack - sizeof (VOID *); JumpBuffer.S0 =3D (UINT64)(UINTN)Context1; --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100469): https://edk2.groups.io/g/devel/message/100469 Mute This Topic: https://groups.io/mt/97196082/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 5 06:00:40 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100470+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100470+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1677196515; cv=none; d=zohomail.com; s=zohoarc; b=izWIteSQSApj5c6QLuvCbWBxYuX4Miqm2ztP/HqZEqKMHoUPBvjSYtLEMnD0QPFIde8PS+Qd6T6FjoMBrJy7LbV47oXUPSicg6DMKdeCqAX3rJFpGcBaZ0VvIi75p5Ql5yh3JqUkZx3TkRyH7Qn7HigXDgKRbS/Y0a4JJX/Vi9E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1677196515; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=Sg7K5ZMabj2NbQpSPxShU31K/znBVgTkGWNRnOXMK7w=; b=ifpZGj0To8QmhUAmHD8muOpdL0VWHCYeyhu+30/7+KLH1R3UP4h785aMEu6Q9+i5nh5fsadPzcb0fFcToA1Lcg/ni/jlOWK/f6uJLN8p3bLQD6IHWGVQWDwe9vlziyBCpIQ4U25NxWqI19c0NAoFMsdN2qwyLBmdNJYTd0L/tMQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100470+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1677196515628932.6397480480889; Thu, 23 Feb 2023 15:55:15 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id REWBYY1788612x7dZlhD8mwO; Thu, 23 Feb 2023 15:55:15 -0800 X-Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web10.5673.1677196505855436099 for ; Thu, 23 Feb 2023 15:55:14 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10630"; a="321549977" X-IronPort-AV: E=Sophos;i="5.97,322,1669104000"; d="scan'208";a="321549977" X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2023 15:55:14 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10630"; a="702984518" X-IronPort-AV: E=Sophos;i="5.97,322,1669104000"; d="scan'208";a="702984518" X-Received: from cywong-mobl.amr.corp.intel.com (HELO awarkent-mobl1.amr.corp.intel.com) ([10.212.53.4]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2023 15:55:13 -0800 From: "Andrei Warkentin" To: devel@edk2.groups.io Cc: Andrei Warkentin , Daniel Schaefer , Michael D Kinney , Liming Gao , Zhiguang Liu , Sunil V L Subject: [edk2-devel] [PATCH 4/7] MdePkg: BaseCpuLib: Fix RISCV CpuSleep symbol name. Date: Thu, 23 Feb 2023 17:54:51 -0600 Message-Id: <20230223235454.23556-5-andrei.warkentin@intel.com> In-Reply-To: <20230223235454.23556-1-andrei.warkentin@intel.com> References: <20230223235454.23556-1-andrei.warkentin@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,andrei.warkentin@intel.com X-Gm-Message-State: 1mVnHrahF67Mv5KdaZUsF4Xtx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1677196515; bh=ggH89wKDzutRTK6T5V+2JS5JfI0ySIdnFBRO+ME/8ko=; h=Cc:Date:From:Reply-To:Subject:To; b=Zmwh3rkkqxX9Q5LIxzDI2ttwS8CF9HBJfXELHI+8QA2qQW4uNO29ltv7WD4YQ3TbQ6q 0u3Up6WSCNUUJBBD+MOBectMBvtOceUebIG93fv5sEZPu/wEZEzonTRxsjMCZJSrbOjiD WUxunapfjvvf5MoUhQ54W7lGOFZYXndQZ/M= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1677196517125100017 Content-Type: text/plain; charset="utf-8" CpuSleep, not _CpuSleep. Cc: Daniel Schaefer Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Reviewed-by: Sunil V L Signed-off-by: Andrei Warkentin --- MdePkg/Library/BaseCpuLib/RiscV/Cpu.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/MdePkg/Library/BaseCpuLib/RiscV/Cpu.S b/MdePkg/Library/BaseCpu= Lib/RiscV/Cpu.S index 375b91d31427..d6560087e080 100644 --- a/MdePkg/Library/BaseCpuLib/RiscV/Cpu.S +++ b/MdePkg/Library/BaseCpuLib/RiscV/Cpu.S @@ -10,9 +10,9 @@ .align 3 .section .text =20 -.global ASM_PFX(_CpuSleep) +.global ASM_PFX(CpuSleep) =20 -ASM_PFX(_CpuSleep): +ASM_PFX(CpuSleep): wfi ret =20 --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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Thu, 23 Feb 2023 15:55:16 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10630"; a="321549988" X-IronPort-AV: E=Sophos;i="5.97,322,1669104000"; d="scan'208";a="321549988" X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2023 15:55:15 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10630"; a="702984536" X-IronPort-AV: E=Sophos;i="5.97,322,1669104000"; d="scan'208";a="702984536" X-Received: from cywong-mobl.amr.corp.intel.com (HELO awarkent-mobl1.amr.corp.intel.com) ([10.212.53.4]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2023 15:55:14 -0800 From: "Andrei Warkentin" To: devel@edk2.groups.io Cc: Andrei Warkentin , Daniel Schaefer , Liming Gao , Jian J Wang , Sunil V L Subject: [edk2-devel] [PATCH 5/7] MdeModulePkg: Dxe: add RISCV64 to mMachineTypeInfo Date: Thu, 23 Feb 2023 17:54:52 -0600 Message-Id: <20230223235454.23556-6-andrei.warkentin@intel.com> In-Reply-To: <20230223235454.23556-1-andrei.warkentin@intel.com> References: <20230223235454.23556-1-andrei.warkentin@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,andrei.warkentin@intel.com X-Gm-Message-State: TUDG5YdUqNVHB2H0xODt5CHnx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1677196516; bh=m9sgaEVSUZ2cgxlEZThtDS486Wkxs3yXLys1nJDB0TI=; h=Cc:Date:From:Reply-To:Subject:To; b=uL20e3gBAe8XzbXABukBpIpWHKtep/HGn7c2PWRnY0K4A7P4HEwu0kvyPSO8G19y8tp 35/ISuAOA5pMdzldvUf1SV2UmljBHbZnjZWPcR1wUEjYN96GRRdQmQw0HkNH3cm8u+o1S hll+asE6pUTsG0AySUNpvGBp6XaT8xRf4Qs= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1677196517131100019 Content-Type: text/plain; charset="utf-8" This fixes messages like: "Image type AARCH64 can't be loaded on UEFI system" Cc: Daniel Schaefer Cc: Liming Gao Cc: Jian J Wang Reviewed-by: Sunil V L Signed-off-by: Andrei Warkentin --- MdeModulePkg/Core/Dxe/Image/Image.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/MdeModulePkg/Core/Dxe/Image/Image.c b/MdeModulePkg/Core/Dxe/Im= age/Image.c index 06cc6744b8c6..8704ebea9a7c 100644 --- a/MdeModulePkg/Core/Dxe/Image/Image.c +++ b/MdeModulePkg/Core/Dxe/Image/Image.c @@ -81,7 +81,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED MACHINE_TYPE_INFO mMachine= TypeInfo[] =3D { { EFI_IMAGE_MACHINE_IA64, L"IA64" }, { EFI_IMAGE_MACHINE_X64, L"X64" }, { EFI_IMAGE_MACHINE_ARMTHUMB_MIXED, L"ARM" }, - { EFI_IMAGE_MACHINE_AARCH64, L"AARCH64" } + { EFI_IMAGE_MACHINE_AARCH64, L"AARCH64" }, + { EFI_IMAGE_MACHINE_RISCV64, L"RISCV64" }, }; =20 UINT16 mDxeCoreImageMachineType =3D 0; --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100471): https://edk2.groups.io/g/devel/message/100471 Mute This Topic: https://groups.io/mt/97196084/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 5 06:00:40 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100472+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100472+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1677196517; cv=none; d=zohomail.com; s=zohoarc; b=OGHsEn6viHadg1Y4WGBhpdpCkNXuBMOGiV2bZKPBwPzYY9HAbc8Ap5YUpIn/Nwt/4Mi1clgKun/qm1+839qH69yqGnf6Y4/XHVd75GdAjPo5SqQMbJBMA2eW61MJvcSm0oCCGhOkyN2aNuMMoau09B1SUGE0gAtV0A8o5qEurIY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1677196517; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=MEPbmrTVff4nXeJiRZux0tlIkbJOd7uveDy5VDgEssg=; b=bRyYwKjD2877bpCoZWlVMt166dd90FLXIG5Sz1GCc+9+dalUhndoEHUPPM4uZtDC/k1mCzq34pHvOr6IbtF/QVWaxwQM/nAQz+KYfCi+kGtKNrrQUfhGuQUtwgV17fMb1nNqDZFeK0hEb3tEG2wZyjosStLd4jR0Y551Hjy867Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100472+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1677196517955132.10968691552068; Thu, 23 Feb 2023 15:55:17 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id F1Q0YY1788612xUIR084mFfp; Thu, 23 Feb 2023 15:55:17 -0800 X-Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web10.5673.1677196505855436099 for ; Thu, 23 Feb 2023 15:55:17 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10630"; a="321549998" X-IronPort-AV: E=Sophos;i="5.97,322,1669104000"; d="scan'208";a="321549998" X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2023 15:55:17 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10630"; a="702984553" X-IronPort-AV: E=Sophos;i="5.97,322,1669104000"; d="scan'208";a="702984553" X-Received: from cywong-mobl.amr.corp.intel.com (HELO awarkent-mobl1.amr.corp.intel.com) ([10.212.53.4]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2023 15:55:16 -0800 From: "Andrei Warkentin" To: devel@edk2.groups.io Cc: Andrei Warkentin , Sunil V L , Daniel Schaefer Subject: [edk2-devel] [PATCH 6/7] [PATCH v2] UefiCpuPkg: CpuTimerDxeRiscV64: fix tick duration accounting Date: Thu, 23 Feb 2023 17:54:53 -0600 Message-Id: <20230223235454.23556-7-andrei.warkentin@intel.com> In-Reply-To: <20230223235454.23556-1-andrei.warkentin@intel.com> References: <20230223235454.23556-1-andrei.warkentin@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,andrei.warkentin@intel.com X-Gm-Message-State: AWb5TDt4vCJ8Z420Ae7hBmVPx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1677196517; bh=gyPSdoLOGSt2v4NVA7Oyut9AiNYNReWaMmFvqANu4AY=; h=Cc:Date:From:Reply-To:Subject:To; b=HASv3Juz5QpdwLfO4PsemAw6CrNXpPhTPhYM50F3kQDGWdrKX/hdYyGTrztZnTu8Od8 elfH9rx2UGCvgXaNb9p0SlEV5bcjlvcEqX5glTy+/qzc2hBiMKmdNtLgNAD8cjjfjJYKG eE/pE1n9YxHWIMtLdJw1hKMO3Te1lBTnhvU= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1677196519123100023 Content-Type: text/plain; charset="utf-8" The TimerDxe implementation doesn't account for the physical time passed due to timer handler execution or (perhaps even more importantly) time spent with interrupts masked. Other implementations (e.g. like the Arm one) do. If the timer tick is always incremented at a fixed rate, then you can slow down UEFI's perception of time by running long sections of code in a critical section. Cc: Sunil V L Cc: Daniel Schaefer Signed-off-by: Andrei Warkentin Reviewed-by: Sunil V L --- UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c | 33 +++++++++++++++------------ 1 file changed, 19 insertions(+), 14 deletions(-) diff --git a/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c b/UefiCpuPkg/CpuTimerDxe= RiscV64/Timer.c index db153f715e60..50f57a9780f0 100644 --- a/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c +++ b/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c @@ -40,7 +40,8 @@ STATIC EFI_TIMER_NOTIFY mTimerNotifyFunction; // // The current period of the timer interrupt // -STATIC UINT64 mTimerPeriod =3D 0; +STATIC UINT64 mTimerPeriod =3D 0; +STATIC UINT64 mLastPeriodStart =3D 0; =20 /** Timer Interrupt Handler. @@ -56,25 +57,31 @@ TimerInterruptHandler ( ) { EFI_TPL OriginalTPL; - UINT64 RiscvTimer; + UINT64 PeriodStart =3D RiscVReadTimer (); =20 OriginalTPL =3D gBS->RaiseTPL (TPL_HIGH_LEVEL); if (mTimerNotifyFunction !=3D NULL) { - mTimerNotifyFunction (mTimerPeriod); + // + // For any number of reasons, the ticks could be coming + // in slower than mTimerPeriod. For example, some code + // is doing a *lot* of stuff inside an EFI_TPL_HIGH + // critical section, and this should not cause the EFI + // time to increment slower. So when we take an interrupt, + // account for the actual time passed. + // + mTimerNotifyFunction (PeriodStart - mLastPeriodStart); } =20 - RiscVDisableTimerInterrupt (); // Disable SMode timer int - RiscVClearPendingTimerInterrupt (); if (mTimerPeriod =3D=3D 0) { + RiscVDisableTimerInterrupt (); gBS->RestoreTPL (OriginalTPL); - RiscVDisableTimerInterrupt (); // Disable SMode timer int return; } =20 - RiscvTimer =3D RiscVReadTimer (); - SbiSetTimer (RiscvTimer +=3D mTimerPeriod); + mLastPeriodStart =3D PeriodStart; + SbiSetTimer (PeriodStart +=3D mTimerPeriod); + RiscVEnableTimerInterrupt (); // enable SMode timer int gBS->RestoreTPL (OriginalTPL); - RiscVEnableTimerInterrupt (); // enable SMode timer int } =20 /** @@ -154,8 +161,6 @@ TimerDriverSetTimerPeriod ( IN UINT64 TimerPeriod ) { - UINT64 RiscvTimer; - DEBUG ((DEBUG_INFO, "TimerDriverSetTimerPeriod(0x%lx)\n", TimerPeriod)); =20 if (TimerPeriod =3D=3D 0) { @@ -164,9 +169,9 @@ TimerDriverSetTimerPeriod ( return EFI_SUCCESS; } =20 - mTimerPeriod =3D TimerPeriod / 10; // convert unit from 100ns to 1us - RiscvTimer =3D RiscVReadTimer (); - SbiSetTimer (RiscvTimer + mTimerPeriod); + mTimerPeriod =3D TimerPeriod / 10; // convert unit from 100ns to 1us + mLastPeriodStart =3D RiscVReadTimer (); + SbiSetTimer (mLastPeriodStart + mTimerPeriod); =20 mCpu->EnableInterrupt (mCpu); RiscVEnableTimerInterrupt (); // enable SMode timer int --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100472): https://edk2.groups.io/g/devel/message/100472 Mute This Topic: https://groups.io/mt/97196085/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 5 06:00:40 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+100473+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100473+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1677196520; cv=none; d=zohomail.com; s=zohoarc; b=BJ4aazpWYPSy4NYdE3fxQ4QJAaWnKtfE6Wuk6tSBpqUTij8QPBJoOIBNMp5+ymfWXW6L/E6TnehyAnl4x7MiRIEY9n8YlWQOOd3FSR2fu1YLm5+i9rmE7iaQPOgPE/BeyjfKHahIkdrWfvxgO7gEgY/9Tukz39+Lnku/N8C/C08= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1677196520; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=ZSR6oArGwQku13NQ+L0Pm/HKaNxBa3Kpt/Sz2K+4ywM=; b=Boyu51HnU4jxdCVd2JCOIWCmRk1FnwCoETNjMDNkFnrDbWQmnERc3DpaPN+ARm6UyNjyv1sxj8nKUD8VylprrTuBoSIF/7KXkngrVGuTCmRkzW7KsYagyoYu3vIUyWHT3YD9Yx0+Wtg7J2a2boXRbF1eKT9uDaCSGlY0ogJYybw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+100473+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1677196519990718.6855038132204; Thu, 23 Feb 2023 15:55:19 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id baX1YY1788612xwDrs4uBg2i; Thu, 23 Feb 2023 15:55:19 -0800 X-Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web10.5673.1677196505855436099 for ; Thu, 23 Feb 2023 15:55:19 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10630"; a="321550019" X-IronPort-AV: E=Sophos;i="5.97,322,1669104000"; d="scan'208";a="321550019" X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2023 15:55:18 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10630"; a="702984570" X-IronPort-AV: E=Sophos;i="5.97,322,1669104000"; d="scan'208";a="702984570" X-Received: from cywong-mobl.amr.corp.intel.com (HELO awarkent-mobl1.amr.corp.intel.com) ([10.212.53.4]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2023 15:55:17 -0800 From: "Andrei Warkentin" To: devel@edk2.groups.io Cc: Andrei Warkentin , Sunil V L , Daniel Schaefer Subject: [edk2-devel] [PATCH 7/7] [PATCH v2] UefiCpuPkg: BaseRiscV64CpuExceptionHandlerLib: clean up exception handling Date: Thu, 23 Feb 2023 17:54:54 -0600 Message-Id: <20230223235454.23556-8-andrei.warkentin@intel.com> In-Reply-To: <20230223235454.23556-1-andrei.warkentin@intel.com> References: <20230223235454.23556-1-andrei.warkentin@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,andrei.warkentin@intel.com X-Gm-Message-State: rT7sRdc2WZOa7nbummWb3fcfx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1677196519; bh=JmbejzPMfoXwFyNPfMtrkm+XrGeeMg6vmEnONRuh0Lw=; h=Cc:Date:From:Reply-To:Subject:To; b=VrUzFqW+wJgrYTdKmpVBM8JHFkhaON7b90j9V2S3F+SiMzr7sFkrQXkr3jssTX5Ki7u n8ee3bISvQZ0CWv58SvH2MOQmZa3K9rgVW8yfWRmiwMiCBrAtKc8jER731zQaKUkjQvdG OjlyXzquC+UEVK5FOeC7TxF2IZB90PvfXYY= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1677196521152100029 Content-Type: text/plain; charset="utf-8" RegisterCpuInterruptHandler did not allow setting exception handlers for anything beyond the timer IRQ. Beyond that, it didn't meet the spec around handling of inputs. RiscVSupervisorModeTrapHandler now will invoke set handlers for both exceptions and interrupts. Two arrays of handlers are maintained - one for exceptions and one for interrupts. For unhandled traps, RiscVSupervisorModeTrapHandler dumps state using the now implemented DumpCpuContext. For EFI_SYSTEM_CONTEXT_RISCV64, extend this with the trapped PC address (SEPC), just like on AArch64 (ELR). This is necessary for X86EmulatorPkg to work as it allows a trap handler to return execution to a different place. Add SSTATUS/STVAL as well, at least for debugging purposes. There is no value in hiding this. Fix nested exception handling. Handler code should not be saving SIE (the value is saved in SSTATUS.SPIE) or directly restored (that's done by SRET). Save and restore the entire SSTATUS and STVAL, too. Cc: Sunil V L Cc: Daniel Schaefer Signed-off-by: Andrei Warkentin Reviewed-by: Sunil V L --- MdePkg/Include/Protocol/DebugSupport.h | 32 ++- .../CpuExceptionHandlerLib.h | 11 +- UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c | 6 +- .../CpuExceptionHandlerLib.c | 232 ++++++++++++++++-- .../SupervisorTrapHandler.S | 17 +- 5 files changed, 254 insertions(+), 44 deletions(-) diff --git a/MdePkg/Include/Protocol/DebugSupport.h b/MdePkg/Include/Protoc= ol/DebugSupport.h index 2b0ae2d1577b..9742663619c5 100644 --- a/MdePkg/Include/Protocol/DebugSupport.h +++ b/MdePkg/Include/Protocol/DebugSupport.h @@ -613,11 +613,34 @@ typedef struct { #define EXCEPT_RISCV_STORE_AMO_ACCESS_FAULT 7 #define EXCEPT_RISCV_ENV_CALL_FROM_UMODE 8 #define EXCEPT_RISCV_ENV_CALL_FROM_SMODE 9 -#define EXCEPT_RISCV_ENV_CALL_FROM_HMODE 10 +#define EXCEPT_RISCV_ENV_CALL_FROM_VS_MODE 10 #define EXCEPT_RISCV_ENV_CALL_FROM_MMODE 11 +#define EXCEPT_RISCV_INST_ACCESS_PAGE_FAULT 12 +#define EXCEPT_RISCV_LOAD_ACCESS_PAGE_FAULT 13 +#define EXCEPT_RISCV_14 14 +#define EXCEPT_RISCV_STORE_ACCESS_PAGE_FAULT 15 +#define EXCEPT_RISCV_16 16 +#define EXCEPT_RISCV_17 17 +#define EXCEPT_RISCV_18 18 +#define EXCEPT_RISCV_19 19 +#define EXCEPT_RISCV_INST_GUEST_PAGE_FAULT 20 +#define EXCEPT_RISCV_LOAD_GUEST_PAGE_FAULT 21 +#define EXCEPT_RISCV_VIRTUAL_INSTRUCTION 22 +#define EXCEPT_RISCV_STORE_GUEST_PAGE_FAULT 23 +#define EXCEPT_RISCV_MAX_EXCEPTIONS (EXCEPT_RISCV_STORE_GUE= ST_PAGE_FAULT) =20 -#define EXCEPT_RISCV_SOFTWARE_INT 0x0 -#define EXCEPT_RISCV_TIMER_INT 0x1 +/// +/// RISC-V processor exception types for interrupts. +/// +#define EXCEPT_RISCV_IS_IRQ(x) ((x & 0x8000000000000000UL) !=3D 0) +#define EXCEPT_RISCV_IRQ_INDEX(x) (x & 0x7FFFFFFFFFFFFFFFUL) +#define EXCEPT_RISCV_IRQ_0 0x8000000000000000UL +#define EXCEPT_RISCV_IRQ_SOFT_FROM_SMODE 0x8000000000000001UL +#define EXCEPT_RISCV_IRQ_SOFT_FROM_VSMODE 0x8000000000000002UL +#define EXCEPT_RISCV_IRQ_SOFT_FROM_MMODE 0x8000000000000003UL +#define EXCEPT_RISCV_IRQ_4 0x8000000000000004UL +#define EXCEPT_RISCV_IRQ_TIMER_FROM_SMODE 0x8000000000000005UL +#define EXCEPT_RISCV_MAX_IRQS (EXCEPT_RISCV_IRQ_INDEX(EXCEPT_= RISCV_IRQ_TIMER_FROM_SMODE)) =20 typedef struct { UINT64 X0; @@ -652,6 +675,9 @@ typedef struct { UINT64 X29; UINT64 X30; UINT64 X31; + UINT64 SEPC; + UINT32 SSTATUS; + UINT32 STVAL; } EFI_SYSTEM_CONTEXT_RISCV64; =20 // diff --git a/UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/CpuExcept= ionHandlerLib.h b/UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/CpuE= xceptionHandlerLib.h index 30f47e87552b..9b7e1304dd3b 100644 --- a/UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/CpuExceptionHand= lerLib.h +++ b/UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/CpuExceptionHand= lerLib.h @@ -59,7 +59,7 @@ SupervisorModeTrap ( #define SMODE_TRAP_REGS_t6 31 #define SMODE_TRAP_REGS_sepc 32 #define SMODE_TRAP_REGS_sstatus 33 -#define SMODE_TRAP_REGS_sie 34 +#define SMODE_TRAP_REGS_stval 34 #define SMODE_TRAP_REGS_last 35 =20 #define SMODE_TRAP_REGS_OFFSET(x) ((SMODE_TRAP_REGS_##x) * __SIZEOF_POINT= ER__) @@ -68,7 +68,7 @@ SupervisorModeTrap ( #pragma pack(1) typedef struct { // - // Below are follow the format of EFI_SYSTEM_CONTEXT + // Below follow the format of EFI_SYSTEM_CONTEXT. // UINT64 zero; UINT64 ra; @@ -102,14 +102,9 @@ typedef struct { UINT64 t4; UINT64 t5; UINT64 t6; - // - // Below are the additional information to - // EFI_SYSTEM_CONTEXT, private to supervisor mode trap - // and not public to EFI environment. - // UINT64 sepc; UINT64 sstatus; - UINT64 sie; + UINT64 stval; } SMODE_TRAP_REGISTERS; #pragma pack() =20 diff --git a/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c b/UefiCpuPkg/CpuTimerDxe= RiscV64/Timer.c index 50f57a9780f0..ab280d3b2d7d 100644 --- a/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c +++ b/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c @@ -276,7 +276,11 @@ TimerDriverInitialize ( // // Install interrupt handler for RISC-V Timer. // - Status =3D mCpu->RegisterInterruptHandler (mCpu, EXCEPT_RISCV_TIMER_INT,= TimerInterruptHandler); + Status =3D mCpu->RegisterInterruptHandler ( + mCpu, + EXCEPT_RISCV_IRQ_TIMER_FROM_SMODE, + TimerInterruptHandler + ); ASSERT_EFI_ERROR (Status); =20 // diff --git a/UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/CpuExcept= ionHandlerLib.c b/UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/CpuE= xceptionHandlerLib.c index f1ee7d236aec..1beaf5ac513e 100644 --- a/UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/CpuExceptionHand= lerLib.c +++ b/UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/CpuExceptionHand= lerLib.c @@ -11,11 +11,162 @@ #include #include #include +#include +#include #include - #include "CpuExceptionHandlerLib.h" =20 -STATIC EFI_CPU_INTERRUPT_HANDLER mInterruptHandlers[2]; +// +// Define the maximum message length +// +#define MAX_DEBUG_MESSAGE_LENGTH 0x100 + +STATIC EFI_CPU_INTERRUPT_HANDLER mExceptionHandlers[EXCEPT_RISCV_MAX_EXCE= PTIONS + 1]; +STATIC EFI_CPU_INTERRUPT_HANDLER mIrqHandlers[EXCEPT_RISCV_MAX_IRQS + 1]; + +STATIC CONST CHAR8 mExceptionOrIrqUnknown[] = =3D "Unknown"; +STATIC CONST CHAR8 *mExceptionNameStr[EXCEPT_RISCV_MAX_EXCEPTIONS + 1] = =3D { + "EXCEPT_RISCV_INST_MISALIGNED", + "EXCEPT_RISCV_INST_ACCESS_FAULT", + "EXCEPT_RISCV_ILLEGAL_INST", + "EXCEPT_RISCV_BREAKPOINT", + "EXCEPT_RISCV_LOAD_ADDRESS_MISALIGNED", + "EXCEPT_RISCV_LOAD_ACCESS_FAULT", + "EXCEPT_RISCV_STORE_AMO_ADDRESS_MISALIGNED", + "EXCEPT_RISCV_STORE_AMO_ACCESS_FAULT", + "EXCEPT_RISCV_ENV_CALL_FROM_UMODE", + "EXCEPT_RISCV_ENV_CALL_FROM_SMODE", + "EXCEPT_RISCV_ENV_CALL_FROM_VS_MODE", + "EXCEPT_RISCV_ENV_CALL_FROM_MMODE", + "EXCEPT_RISCV_INST_ACCESS_PAGE_FAULT", + "EXCEPT_RISCV_LOAD_ACCESS_PAGE_FAULT", + "EXCEPT_RISCV_14", + "EXCEPT_RISCV_STORE_ACCESS_PAGE_FAULT", + "EXCEPT_RISCV_16", + "EXCEPT_RISCV_17", + "EXCEPT_RISCV_18", + "EXCEPT_RISCV_19", + "EXCEPT_RISCV_INST_GUEST_PAGE_FAULT", + "EXCEPT_RISCV_LOAD_GUEST_PAGE_FAULT", + "EXCEPT_RISCV_VIRTUAL_INSTRUCTION", + "EXCEPT_RISCV_STORE_GUEST_PAGE_FAULT" +}; + +STATIC CONST CHAR8 *mIrqNameStr[EXCEPT_RISCV_MAX_IRQS + 1] =3D { + "EXCEPT_RISCV_IRQ_0", + "EXCEPT_RISCV_IRQ_SOFT_FROM_SMODE", + "EXCEPT_RISCV_IRQ_SOFT_FROM_VSMODE", + "EXCEPT_RISCV_IRQ_SOFT_FROM_MMODE", + "EXCEPT_RISCV_IRQ_4", + "EXCEPT_RISCV_IRQ_TIMER_FROM_SMODE", +}; + +/** + Prints a message to the serial port. + + @param Format Format string for the message to print. + @param ... Variable argument list whose contents are accessed + based on the format string specified by Format. + +**/ +STATIC +VOID +EFIAPI +InternalPrintMessage ( + IN CONST CHAR8 *Format, + ... + ) +{ + CHAR8 Buffer[MAX_DEBUG_MESSAGE_LENGTH]; + VA_LIST Marker; + + // + // Convert the message to an ASCII String + // + VA_START (Marker, Format); + AsciiVSPrint (Buffer, sizeof (Buffer), Format, Marker); + VA_END (Marker); + + // + // Send the print string to a Serial Port + // + SerialPortWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer)); +} + +/** + Get ASCII format string exception name by exception type. + + @param ExceptionType Exception type. + + @return ASCII format string exception name. +**/ +STATIC +CONST CHAR8 * +GetExceptionNameStr ( + IN EFI_EXCEPTION_TYPE ExceptionType + ) +{ + if (EXCEPT_RISCV_IS_IRQ (ExceptionType)) { + if (EXCEPT_RISCV_IRQ_INDEX (ExceptionType) > EXCEPT_RISCV_MAX_IRQS) { + return mExceptionOrIrqUnknown; + } + + return mIrqNameStr[EXCEPT_RISCV_IRQ_INDEX (ExceptionType)]; + } + + if (ExceptionType > EXCEPT_RISCV_MAX_EXCEPTIONS) { + return mExceptionOrIrqUnknown; + } + + return mExceptionNameStr[ExceptionType]; +} + +/** + Display CPU information. This can be called by 3rd-party handlers + set by RegisterCpuInterruptHandler. + + @param ExceptionType Exception type. + @param SystemContext Pointer to EFI_SYSTEM_CONTEXT. +**/ +VOID +EFIAPI +DumpCpuContext ( + IN EFI_EXCEPTION_TYPE ExceptionType, + IN EFI_SYSTEM_CONTEXT SystemContext + ) +{ + UINTN Printed =3D 0; + SMODE_TRAP_REGISTERS *Regs =3D (SMODE_TRAP_REGISTERS *) + SystemContext.SystemContextRiscV64; + + InternalPrintMessage ( + "!!!! RISCV64 Exception Type - %016x(%a) !!!!\n", + ExceptionType, + GetExceptionNameStr (ExceptionType) + ); + + #define REGS() \ + REG (t0); REG (t1); REG (t2); REG (t3); REG (t4); REG (t5); REG (t6); \ + REG (s0); REG (s1); REG (s2); REG (s3); REG (s4); REG (s5); REG (s6); \ + REG (s7); REG (s8); REG (s9); REG (s10); REG (s11); \ + REG (a0); REG (a1); REG (a2); REG (a3); REG (a4); REG (a5); REG (a6); \ + REG (a7); \ + REG (zero); REG (ra); REG (sp); REG (gp); REG (tp); \ + REG (sepc); REG (sstatus); REG (stval); + + #define REG(x) do { \ + InternalPrintMessage ("%7a =3D 0x%017lx%c", #x, Regs->x, \ + (++Printed % 2) ? L'\t' : L'\n'); \ + } while (0); + + REGS (); + if (Printed % 2) { + InternalPrintMessage ("\n"); + } + + #undef REG + #undef REGS +} =20 /** Initializes all CPU exceptions entries and provides the default exceptio= n handlers. @@ -47,34 +198,59 @@ InitializeCpuExceptionHandlers ( Registers a function to be called from the processor interrupt handler. =20 This function registers and enables the handler specified by InterruptHa= ndler for a processor - interrupt or exception type specified by InterruptType. If InterruptHand= ler is NULL, then the - handler for the processor interrupt or exception type specified by Inter= ruptType is uninstalled. + interrupt or exception type specified by ExceptionType. If InterruptHand= ler is NULL, then the + handler for the processor interrupt or exception type specified by Excep= tionType is uninstalled. The installed handler is called once for each processor interrupt or exc= eption. NOTE: This function should be invoked after InitializeCpuExceptionHandle= rs() or InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED retu= rned. =20 - @param[in] InterruptType Defines which interrupt or exception to ho= ok. + @param[in] ExceptionType Defines which interrupt or exception to ho= ok. @param[in] InterruptHandler A pointer to a function of type EFI_CPU_IN= TERRUPT_HANDLER that is called when a processor interrupt occurs. If this= parameter is NULL, then the handler will be uninstalled. =20 @retval EFI_SUCCESS The handler for the processor interrupt wa= s successfully installed or uninstalled. - @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handle= r for InterruptType was + @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handle= r for ExceptionType was previously installed. - @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler fo= r InterruptType was not + @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler fo= r ExceptionType was not previously installed. - @retval EFI_UNSUPPORTED The interrupt specified by InterruptType i= s not supported, + @retval EFI_UNSUPPORTED The interrupt specified by ExceptionType i= s not supported, or this function is not supported. **/ EFI_STATUS EFIAPI RegisterCpuInterruptHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, + IN EFI_EXCEPTION_TYPE ExceptionType, IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler ) { - DEBUG ((DEBUG_INFO, "%a: Type:%x Handler: %x\n", __FUNCTION__, Interrupt= Type, InterruptHandler)); - mInterruptHandlers[InterruptType] =3D InterruptHandler; + DEBUG ((DEBUG_INFO, "%a: Type:%x Handler: %x\n", __FUNCTION__, Exception= Type, InterruptHandler)); + if (EXCEPT_RISCV_IS_IRQ (ExceptionType)) { + if (EXCEPT_RISCV_IRQ_INDEX (ExceptionType) > EXCEPT_RISCV_MAX_IRQS) { + return EFI_UNSUPPORTED; + } + + if (mIrqHandlers[EXCEPT_RISCV_IRQ_INDEX (ExceptionType)] !=3D NULL) { + return EFI_ALREADY_STARTED; + } else if (InterruptHandler =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + mIrqHandlers[EXCEPT_RISCV_IRQ_INDEX (ExceptionType)] =3D InterruptHand= ler; + } else { + if (ExceptionType > EXCEPT_RISCV_MAX_EXCEPTIONS) { + return EFI_UNSUPPORTED; + } + + if (mExceptionHandlers[ExceptionType] !=3D NULL) { + return EFI_ALREADY_STARTED; + } else if (InterruptHandler =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + mExceptionHandlers[ExceptionType] =3D InterruptHandler; + } + return EFI_SUCCESS; } =20 @@ -113,21 +289,31 @@ RiscVSupervisorModeTrapHandler ( SMODE_TRAP_REGISTERS *SmodeTrapReg ) { - UINTN SCause; + EFI_EXCEPTION_TYPE ExceptionType; EFI_SYSTEM_CONTEXT RiscVSystemContext; =20 RiscVSystemContext.SystemContextRiscV64 =3D (EFI_SYSTEM_CONTEXT_RISCV64 = *)SmodeTrapReg; - // - // Check scasue register. - // - SCause =3D (UINTN)RiscVGetSupervisorTrapCause (); - if ((SCause & (1UL << (sizeof (UINTN) * 8- 1))) !=3D 0) { - // - // This is interrupt event. - // - SCause &=3D ~(1UL << (sizeof (UINTN) * 8- 1)); - if ((SCause =3D=3D IRQ_S_TIMER) && (mInterruptHandlers[EXCEPT_RISCV_TI= MER_INT] !=3D NULL)) { - mInterruptHandlers[EXCEPT_RISCV_TIMER_INT](EXCEPT_RISCV_TIMER_INT, R= iscVSystemContext); + ExceptionType =3D (UINTN)RiscVGetSupervisorTra= pCause (); + + if (EXCEPT_RISCV_IS_IRQ (ExceptionType)) { + UINTN IrqIndex =3D EXCEPT_RISCV_IRQ_INDEX (ExceptionType); + + if ((IrqIndex <=3D EXCEPT_RISCV_MAX_IRQS) && + (mIrqHandlers[IrqIndex] !=3D NULL)) + { + mIrqHandlers[IrqIndex](ExceptionType, RiscVSystemContext); + return; } + } else { + if ((ExceptionType <=3D EXCEPT_RISCV_MAX_EXCEPTIONS) && + (mExceptionHandlers[ExceptionType] !=3D 0)) + { + mExceptionHandlers[ExceptionType](ExceptionType, RiscVSystemContext); + return; + } + } + + DumpCpuContext (ExceptionType, RiscVSystemContext); + while (1) { } } diff --git a/UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/Superviso= rTrapHandler.S b/UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/Super= visorTrapHandler.S index 649c4c5becf4..45070b5cda04 100644 --- a/UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/SupervisorTrapHa= ndler.S +++ b/UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/SupervisorTrapHa= ndler.S @@ -20,14 +20,14 @@ SupervisorModeTrap: sd t0, SMODE_TRAP_REGS_OFFSET(t0)(sp) =20 csrr t0, CSR_SSTATUS - and t0, t0, (SSTATUS_SIE | SSTATUS_SPIE) sd t0, SMODE_TRAP_REGS_OFFSET(sstatus)(sp) csrr t0, CSR_SEPC sd t0, SMODE_TRAP_REGS_OFFSET(sepc)(sp) - csrr t0, CSR_SIE - sd t0, SMODE_TRAP_REGS_OFFSET(sie)(sp) + csrr t0, CSR_STVAL + sd t0, SMODE_TRAP_REGS_OFFSET(stval)(sp) ld t0, SMODE_TRAP_REGS_OFFSET(t0)(sp) =20 + sd zero, SMODE_TRAP_REGS_OFFSET(zero)(sp) sd ra, SMODE_TRAP_REGS_OFFSET(ra)(sp) sd gp, SMODE_TRAP_REGS_OFFSET(gp)(sp) sd tp, SMODE_TRAP_REGS_OFFSET(tp)(sp) @@ -59,6 +59,7 @@ SupervisorModeTrap: sd t6, SMODE_TRAP_REGS_OFFSET(t6)(sp) =20 /* Call to Supervisor mode trap handler in CpuExceptionHandlerLib.c */ + mv a0, sp call RiscVSupervisorModeTrapHandler =20 /* Restore all general regisers except SP */ @@ -66,6 +67,7 @@ SupervisorModeTrap: ld gp, SMODE_TRAP_REGS_OFFSET(gp)(sp) ld tp, SMODE_TRAP_REGS_OFFSET(tp)(sp) ld t2, SMODE_TRAP_REGS_OFFSET(t2)(sp) + ld t1, SMODE_TRAP_REGS_OFFSET(t1)(sp) ld s0, SMODE_TRAP_REGS_OFFSET(s0)(sp) ld s1, SMODE_TRAP_REGS_OFFSET(s1)(sp) ld a0, SMODE_TRAP_REGS_OFFSET(a0)(sp) @@ -93,13 +95,10 @@ SupervisorModeTrap: =20 ld t0, SMODE_TRAP_REGS_OFFSET(sepc)(sp) csrw CSR_SEPC, t0 - ld t0, SMODE_TRAP_REGS_OFFSET(sie)(sp) - csrw CSR_SIE, t0 - csrr t0, CSR_SSTATUS - ld t1, SMODE_TRAP_REGS_OFFSET(sstatus)(sp) - or t0, t0, t1 + ld t0, SMODE_TRAP_REGS_OFFSET(sstatus)(sp) csrw CSR_SSTATUS, t0 - ld t1, SMODE_TRAP_REGS_OFFSET(t1)(sp) + ld t0, SMODE_TRAP_REGS_OFFSET(stval)(sp) + csrw CSR_STVAL, t0 ld t0, SMODE_TRAP_REGS_OFFSET(t0)(sp) addi sp, sp, SMODE_TRAP_REGS_SIZE sret --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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