From nobody Fri May 17 05:26:36 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+99920+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99920+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1675963259; cv=none; d=zohomail.com; s=zohoarc; b=dkFyQ5mPuuCAlS8BL4T+qUQ3XhWUsF6QcQZaRBZ43CW9RluDAj4fA2mTR0tq1KHfAyLWnnZ76NuiaXE4xpTUOlgZWjh3wjlc3xOEPpLKWGHtl2niNdQ7aOYZ4Ubv1DgWvkO5VRrukX64KGwxX1vlrCx94G8vMB5juMETHSU5B6I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1675963259; h=Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=VXClw4yWj52PvJwIDRCltwZaintqt0+wIzv5yQbXBpo=; b=iM47zoY20Tk5PQ30etkmUnWoNXHx3++jAh4uz1gzofF4CMk5eFbJ64+nLlreYFgCcBZsl12WeUov/l91gzjji8QDolhd/UCcl44s1Ptu58A/687itOS1kEVMg9dbtNBB9SKKEjHemEgvDLaLVJVdbJNhQsaz300CjtH06nIWQm4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99920+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1675963259493819.9836669962316; Thu, 9 Feb 2023 09:20:59 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id NUC4YY1788612xTugR85aTtq; Thu, 09 Feb 2023 09:20:59 -0800 X-Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web11.22480.1675963258576834863 for ; Thu, 09 Feb 2023 09:20:58 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10616"; a="313826443" X-IronPort-AV: E=Sophos;i="5.97,284,1669104000"; d="scan'208";a="313826443" X-Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2023 09:20:25 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10616"; a="996610711" X-IronPort-AV: E=Sophos;i="5.97,284,1669104000"; d="scan'208";a="996610711" X-Received: from cchiu4-mobl.gar.corp.intel.com ([10.212.151.147]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2023 09:20:24 -0800 From: "Chiu, Chasel" To: devel@edk2.groups.io Cc: Chasel Chiu , Ashraf Ali S , Isaac Oram , Rangasai V Chaganty , Ray Ni , Michael Kubacki Subject: [edk2-devel] [edk2-platforms: PATCH v3] IntelSiliconPkg/SpiFvbServiceSmm: Support Additional NVS region. Date: Thu, 9 Feb 2023 09:20:08 -0800 Message-Id: <20230209172008.1568-1-chasel.chiu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,chasel.chiu@intel.com X-Gm-Message-State: nSaB03IB6td8bXOP1iszJpnyx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1675963259; bh=8wbu43bpIw0TTnpb2bxrOL0ACA/z9ktf4+rde5bO36Y=; h=Cc:Date:From:Reply-To:Subject:To; b=TEQfu/slMWhyaIL0+niuCd03qhgK0j+jiZKA1X1eS7fXoQP2C+vdfKH6OqSIwLR1p5D ZJfM783TBm4loVGU/MNSVM/0JyZT27QYxdsmrYDHzKYetZ9kVfmNZTV3vAD37X0Ysk1YU PFxFwrLsZMc8BSH1a3l1+05ACJHxB9kOFdU= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1675963260213100001 Content-Type: text/plain; charset="utf-8" Platform may implement an additional NVS region following Regular variable region and in this case SpiFvbService should include both region size when calculating the total NVS region size. One usage model is EventLog NVS region and there could be others. Example NVS flash map for such usage model: -------------- |UEI Variable| -------------- |EventLog | <=3D this is Additional NVS region -------------- |FTW Working | -------------- |FTW Spare | -------------- Cc: Ashraf Ali S Cc: Isaac Oram Cc: Rangasai V Chaganty Cc: Ray Ni Cc: Michael Kubacki Signed-off-by: Chasel Chiu Reviewed-by: Michael Kubacki --- Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCom= mon.c | 17 +++++++++++++++++ Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm= .inf | 7 ++++--- Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec = | 8 ++++++++ 3 files changed, 29 insertions(+), 3 deletions(-) diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiF= vbServiceCommon.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbServi= ce/SpiFvbServiceCommon.c index 942abf95a6..cf5a40bf27 100644 --- a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceCommon.c +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceCommon.c @@ -568,6 +568,23 @@ GetVariableFvInfo ( return; } =20 + // + // GetVariableFlashNvStorageInfo () only reports regular variable region= information, + // if platform implemented an additional NVS region following the regula= r variable region, + // the both region size should be included as overall NVS region size. + // Example NVS flash map for such usage model: + // -------------- + // |UEI Variable| + // -------------- + // |EventLog | <=3D this is Additional NVS region + // -------------- + // |FTW Working | + // -------------- + // |FTW Spare | + // -------------- + // + NvStoreLength +=3D PcdGet32 (PcdFlashNvStorageAdditionalSize); + Status =3D GetVariableFlashFtwSpareInfo (&NvBaseAddress, &Length64); if (!EFI_ERROR (Status)) { // Stay within the current UINT32 size assumptions in the variable sta= ck. diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiF= vbServiceSmm.inf b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbServic= e/SpiFvbServiceSmm.inf index 73049eceb2..f4009d8d8c 100644 --- a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceSmm.inf +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceSmm.inf @@ -43,9 +43,10 @@ IntelSiliconPkg/IntelSiliconPkg.dec =20 [Pcd] - gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUM= ES - gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUM= ES - gIntelSiliconPkgTokenSpaceGuid.PcdFlashVariableStoreType ## SOMETI= MES_CONSUMES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CON= SUMES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CON= SUMES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashVariableStoreType ## SOM= ETIMES_CONSUMES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashNvStorageAdditionalSize ## CON= SUMES =20 [Sources] FvbInfo.c diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/In= tel/IntelSiliconPkg/IntelSiliconPkg.dec index 63dae756ad..b10529b69d 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec @@ -194,3 +194,11 @@ # Other value: reserved for future use.
# @Prompt Flash Variable Store type. gIntelSiliconPkgTokenSpaceGuid.PcdFlashVariableStoreType|0x00|UINT8|0x00= 00000E + + ## Declares Additional NVS Variable Region Size.

+ # Platform may implement a Regular variable region and an additional va= riable region, which will require this PCD + # to tell SpiFvbService to include both regions.
+ # 0: No additional variable region.
+ # non-zero: The size of an additional variable region following the Reg= ular variable region.
+ # @Prompt Additional NVS Variable Region Size. + gIntelSiliconPkgTokenSpaceGuid.PcdFlashNvStorageAdditionalSize|0x0000000= 0|UINT32|0x0000000F --=20 2.35.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#99920): https://edk2.groups.io/g/devel/message/99920 Mute This Topic: https://groups.io/mt/96858004/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-