From nobody Sun May 19 13:34:31 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+99857+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99857+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1675919658; cv=none; d=zohomail.com; s=zohoarc; b=TZxQB4OM9dcpO9Val0cbKrgIn2pY5ljAIemgOYeWmseD/1d2XATCaqVS5oXG1+4Ri4xPe09wCmbWnPSzTNUP2LkFpPJ82aBKvC7h6JaSwokKLRgx6WNdnjOqo0e2HBbk0DyXb7pAfHe3gZbt97aY/7s9ulP9FPKUIYvQMOp3TA4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1675919658; h=Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=j4X5a/tqwnq7ORGjdW/lwpB1I0FFtw8b3wS1reGDeNw=; b=LHIB+mRhJvmDa4tz7rreJSVTSl1bCnmOgWX31e3+yQSRnr9NeErkww7HNaUxefLADo/R3WL3/fC0x9jC9+xN1EdQoaxAwe+EDZbTuMCM5I5jr59ZaBBsvM5BVipSnxsZNDD1mOg2cJlf4b3N8sVixx21rMgV+8ZhlxL5oa9qh30= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99857+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1675919658819553.0429071711177; Wed, 8 Feb 2023 21:14:18 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id rowZYY1788612xqLlr2jWYiG; Wed, 08 Feb 2023 21:14:18 -0800 X-Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mx.groups.io with SMTP id smtpd.web11.7359.1675919657812050493 for ; Wed, 08 Feb 2023 21:14:17 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10615"; a="357416545" X-IronPort-AV: E=Sophos;i="5.97,281,1669104000"; d="scan'208";a="357416545" X-Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2023 21:14:17 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10615"; a="996401980" X-IronPort-AV: E=Sophos;i="5.97,281,1669104000"; d="scan'208";a="996401980" X-Received: from cchiu4-mobl.gar.corp.intel.com ([10.212.221.164]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2023 21:14:16 -0800 From: "Chiu, Chasel" To: devel@edk2.groups.io Cc: Chasel Chiu , Ashraf Ali S , Isaac Oram , Rangasai V Chaganty , Ray Ni , Michael Kubacki Subject: [edk2-devel] [edk2-platforms: PATCH] IntelSiliconPkg/SpiFvbServiceSmm: Support Other NVS variable region. Date: Wed, 8 Feb 2023 21:14:02 -0800 Message-Id: <20230209051402.1319-1-chasel.chiu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,chasel.chiu@intel.com X-Gm-Message-State: j7iu94AsRox032dMvXbR9scQx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1675919658; bh=uW2AX8JOgY1LpNlhHs0N/VCAOwC1yOt4/UR8IsvGAro=; h=Cc:Date:From:Reply-To:Subject:To; b=Nu+2vWH+Ijx+THqmpegl1m0kTHZqJRUN4dxXo3c4RMKwrHC+EShuVZS/dxq4nfxeSK5 qu6CW0L5Qg1K9dfOByGnn5H1Q+DZHxyA24LbsmNoGfXydMphfgNfK+YIZzdybAwW6oe09 GYIxxcJAJKdtexAdeB25FVoK+6Ob4TaRG8s= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1675919660295100002 Content-Type: text/plain; charset="utf-8" Platform may implement Other NVS variable region following Regular variable region and in this case SpiFvbService should include both region size when calculating the total NVS region size. One usage model is EventLog NVS region and there could be others. Cc: Ashraf Ali S Cc: Isaac Oram Cc: Rangasai V Chaganty Cc: Ray Ni Cc: Michael Kubacki Signed-off-by: Chasel Chiu Reviewed-by: Michael Kubacki --- Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCom= mon.c | 7 +++++++ Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm= .inf | 7 ++++--- Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec = | 8 ++++++++ 3 files changed, 19 insertions(+), 3 deletions(-) diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiF= vbServiceCommon.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbServi= ce/SpiFvbServiceCommon.c index 942abf95a6..bcde98131d 100644 --- a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceCommon.c +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceCommon.c @@ -568,6 +568,13 @@ GetVariableFvInfo ( return; } =20 + // + // GetVariableFlashNvStorageInfo () only reports regular variable region= information, + // if platform implemented a separate Other variable region following th= e regular variable region, + // the size should be included as overall NVS variable region size. + // + NvStoreLength +=3D PcdGet32 (PcdFlashNvStorageOtherVariableSize); + Status =3D GetVariableFlashFtwSpareInfo (&NvBaseAddress, &Length64); if (!EFI_ERROR (Status)) { // Stay within the current UINT32 size assumptions in the variable sta= ck. diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiF= vbServiceSmm.inf b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbServic= e/SpiFvbServiceSmm.inf index 73049eceb2..f40067418a 100644 --- a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceSmm.inf +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceSmm.inf @@ -43,9 +43,10 @@ IntelSiliconPkg/IntelSiliconPkg.dec =20 [Pcd] - gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUM= ES - gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUM= ES - gIntelSiliconPkgTokenSpaceGuid.PcdFlashVariableStoreType ## SOMETI= MES_CONSUMES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CON= SUMES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CON= SUMES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashVariableStoreType ## SOM= ETIMES_CONSUMES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashNvStorageOtherVariableSize ## CON= SUMES =20 [Sources] FvbInfo.c diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/In= tel/IntelSiliconPkg/IntelSiliconPkg.dec index 63dae756ad..7034ab93b0 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec @@ -194,3 +194,11 @@ # Other value: reserved for future use.
# @Prompt Flash Variable Store type. gIntelSiliconPkgTokenSpaceGuid.PcdFlashVariableStoreType|0x00|UINT8|0x00= 00000E + + ## Declares Separate NVS Variable Region Size.

+ # Platform may implement a Regular variable region and an Other variabl= e region, which will require this PCD + # to tell SpiFvbService to include both regions.
+ # 0: No separate Other variable region.
+ # non-zero: The size of a separate Other variable region following the = Regular variable region.
+ # @Prompt Separate NVS Variable Region Size. + gIntelSiliconPkgTokenSpaceGuid.PcdFlashNvStorageOtherVariableSize|0x0000= 0000|UINT32|0x0000000F --=20 2.35.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#99857): https://edk2.groups.io/g/devel/message/99857 Mute This Topic: https://groups.io/mt/96847771/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-