From nobody Mon Apr 29 09:12:31 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+96006+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96006+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1667780860; cv=none; d=zohomail.com; s=zohoarc; b=ew0Cnfmmp6Qhn/JSJTMiNqDgsx9dGkQYb8EINjkiQtCZE+waywic833U67dWF0FGEn+X4EmGLiP+ekbvwCMlvZ5k+k5cB9/uum40FX/Bmu6F7ITdno2CgkSizHj7VwEEP1nGNGjaJ0PYZn4OpMnFPRnP3NEu9vFbjM110uObBKM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1667780860; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=8fAoyf645Ii4kDLRjUQWL+7UC7+2uu3sVUoaB2rvjlc=; b=KoTmlBFkkJ+Y4WfqkgdMogSHBi/LDkHW1s4IVtFg4tpTKOybDQmMILTnSOR66hsjvakYc3maON7/79Z61UeUBqiCkFLgyogt9aL2wvkku5llqtV+bVt8AnjTSF+8HfPJjRF9CD61z4k8ANbiQgAbqmiqgIOGHiCu4IY/8UZOxzM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96006+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1667780860179379.4126525856491; Sun, 6 Nov 2022 16:27:40 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id ne6lYY1788612xxPAuWwXC1S; Sun, 06 Nov 2022 16:27:39 -0800 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web08.4939.1667780856864962924 for ; Sun, 06 Nov 2022 16:27:39 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="396593388" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="396593388" X-Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:38 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="613681454" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="613681454" X-Received: from mxu9-mobl1.ccr.corp.intel.com ([10.238.0.61]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:36 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min M Xu , Eric Dong , Ray Ni , Brijesh Singh , Erdem Aktas , Gerd Hoffmann , James Bottomley , Jiewen Yao , Tom Lendacky Subject: [edk2-devel] [PATCH V3 1/9] UefiCpuPkg: Add CcExitLib Date: Mon, 7 Nov 2022 08:27:09 +0800 Message-Id: <20221107002717.461-2-min.m.xu@intel.com> In-Reply-To: <20221107002717.461-1-min.m.xu@intel.com> References: <20221107002717.461-1-min.m.xu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,min.m.xu@intel.com X-Gm-Message-State: yCqz6mWUUkP86PG5yDPypz0Zx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1667780859; bh=hyKBSdfLvVQgORma3RLteRQqUwUL+YMX3GJTGIYDl1E=; h=Cc:Date:From:Reply-To:Subject:To; b=qoyj+VBm7rLi5zvsIkBw/c74HAoKFON5LSXe6LYEyuRUa4mKaRveA02cEbyf3WSv3ft 08RVuWWPFbECtZ07J/vlLu4E5bvoHqm6E8hBYtJs10HNS33zrHcnnyVLpiFDnPBZtLgMc 0WaXVRpu6ZYH7SNHlJJWGK5xM4Nk1CsVKF4= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1667780861510100006 Content-Type: text/plain; charset="utf-8" From: Min M Xu BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4123 CcExitLib is designed to support handling #VC/#VE exceptions and issuing VMGEXIT instructions. It can be used to perform these: - Handling #VC exceptions - Handling #VE exceptions - Preparing for and issuing a VMGEXIT - Performing MMIO-related write operations to support flash emulation - Performing AP related boot opeations The base functions in this driver will not do anything and will return an error if a return value is required. It is expected that other packages (like OvmfPkg) will create a version of the library to fully support an CC gueste (such as SEV-ES and TDX). Cc: Eric Dong Cc: Ray Ni Cc: Brijesh Singh Cc: Erdem Aktas Cc: Gerd Hoffmann Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Signed-off-by: Min Xu Reviewed-by: Jiewen Yao --- UefiCpuPkg/Include/Library/CcExitLib.h | 176 ++++++++++++++++ .../Library/CcExitLibNull/CcExitLibNull.c | 194 ++++++++++++++++++ .../Library/CcExitLibNull/CcExitLibNull.inf | 28 +++ .../Library/CcExitLibNull/CcExitLibNull.uni | 14 ++ UefiCpuPkg/UefiCpuPkg.dec | 3 + 5 files changed, 415 insertions(+) create mode 100644 UefiCpuPkg/Include/Library/CcExitLib.h create mode 100644 UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.c create mode 100644 UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf create mode 100644 UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.uni diff --git a/UefiCpuPkg/Include/Library/CcExitLib.h b/UefiCpuPkg/Include/Li= brary/CcExitLib.h new file mode 100644 index 000000000000..af6001ccf7d4 --- /dev/null +++ b/UefiCpuPkg/Include/Library/CcExitLib.h @@ -0,0 +1,176 @@ +/** @file + Public header file for the CcExitLib. + + This library class defines some routines used for below CcExit handler. + - Invoking the VMGEXIT instruction in support of SEV-ES and to handle + #VC exceptions. + - Handle #VE exception in TDX. + + Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
+ Copyright (c) 2020 - 2022, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef CC_EXIT_LIB_H_ +#define CC_EXIT_LIB_H_ + +#include +#include + +#define VE_EXCEPTION 20 + +/** + Perform VMGEXIT. + + Sets the necessary fields of the GHCB, invokes the VMGEXIT instruction a= nd + then handles the return actions. + + @param[in, out] Ghcb A pointer to the GHCB + @param[in] ExitCode VMGEXIT code to be assigned to the SwExitCode + field of the GHCB. + @param[in] ExitInfo1 VMGEXIT information to be assigned to the + SwExitInfo1 field of the GHCB. + @param[in] ExitInfo2 VMGEXIT information to be assigned to the + SwExitInfo2 field of the GHCB. + + @retval 0 VMGEXIT succeeded. + @return Exception number to be propagated, VMGEXIT + processing did not succeed. + +**/ +UINT64 +EFIAPI +CcExitLibVmgExit ( + IN OUT GHCB *Ghcb, + IN UINT64 ExitCode, + IN UINT64 ExitInfo1, + IN UINT64 ExitInfo2 + ); + +/** + Perform pre-VMGEXIT initialization/preparation. + + Performs the necessary steps in preparation for invoking VMGEXIT. Must be + called before setting any fields within the GHCB. + + @param[in, out] Ghcb A pointer to the GHCB + @param[in, out] InterruptState A pointer to hold the current interrupt + state, used for restoring in CcExitLibV= mgDone () + +**/ +VOID +EFIAPI +CcExitLibVmgInit ( + IN OUT GHCB *Ghcb, + IN OUT BOOLEAN *InterruptState + ); + +/** + Perform post-VMGEXIT cleanup. + + Performs the necessary steps to cleanup after invoking VMGEXIT. Must be + called after obtaining needed fields within the GHCB. + + @param[in, out] Ghcb A pointer to the GHCB + @param[in] InterruptState An indicator to conditionally (re)enable + interrupts + +**/ +VOID +EFIAPI +CcExitLibVmgDone ( + IN OUT GHCB *Ghcb, + IN BOOLEAN InterruptState + ); + +/** + Marks a specified offset as valid in the GHCB. + + The ValidBitmap area represents the areas of the GHCB that have been mar= ked + valid. Set the bit in ValidBitmap for the input offset. + + @param[in, out] Ghcb A pointer to the GHCB + @param[in] Offset Qword offset in the GHCB to mark valid + +**/ +VOID +EFIAPI +CcExitLibVmgSetOffsetValid ( + IN OUT GHCB *Ghcb, + IN GHCB_REGISTER Offset + ); + +/** + Checks if a specified offset is valid in the GHCB. + + The ValidBitmap area represents the areas of the GHCB that have been mar= ked + valid. Return whether the bit in the ValidBitmap is set for the input of= fset. + + @param[in] Ghcb A pointer to the GHCB + @param[in] Offset Qword offset in the GHCB to mark valid + + @retval TRUE Offset is marked valid in the GHCB + @retval FALSE Offset is not marked valid in the GHCB + +**/ +BOOLEAN +EFIAPI +CcExitLibVmgIsOffsetValid ( + IN GHCB *Ghcb, + IN GHCB_REGISTER Offset + ); + +/** + Handle a #VC exception. + + Performs the necessary processing to handle a #VC exception. + + The base library function returns an error equal to VC_EXCEPTION, + to be propagated to the standard exception handling stack. + + @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et + as value to use on error. + @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT + + @retval EFI_SUCCESS Exception handled + @retval EFI_UNSUPPORTED #VC not supported, (new) exception value= to + propagate provided + @retval EFI_PROTOCOL_ERROR #VC handling failed, (new) exception val= ue to + propagate provided + +**/ +EFI_STATUS +EFIAPI +CcExitLibHandleVc ( + IN OUT EFI_EXCEPTION_TYPE *ExceptionType, + IN OUT EFI_SYSTEM_CONTEXT SystemContext + ); + +/** + Handle a #VE exception. + + Performs the necessary processing to handle a #VE exception. + + The base library function returns an error equal to VE_EXCEPTION, + to be propagated to the standard exception handling stack. + + @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et + as value to use on error. + @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT + + @retval EFI_SUCCESS Exception handled + @retval EFI_UNSUPPORTED #VE not supported, (new) exception value= to + propagate provided + @retval EFI_PROTOCOL_ERROR #VE handling failed, (new) exception val= ue to + propagate provided + +**/ +EFI_STATUS +EFIAPI +CcExitLibHandleVe ( + IN OUT EFI_EXCEPTION_TYPE *ExceptionType, + IN OUT EFI_SYSTEM_CONTEXT SystemContext + ); + +#endif diff --git a/UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.c b/UefiCpuPkg/= Library/CcExitLibNull/CcExitLibNull.c new file mode 100644 index 000000000000..bd23793f1e04 --- /dev/null +++ b/UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.c @@ -0,0 +1,194 @@ +/** @file + CcExit Base Support Library. + + Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
+ Copyright (c) 2020 - 2022, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include + +/** + Perform VMGEXIT. + + Sets the necessary fields of the GHCB, invokes the VMGEXIT instruction a= nd + then handles the return actions. + + The base library function returns an error in the form of a + GHCB_EVENT_INJECTION representing a GP_EXCEPTION. + + @param[in, out] Ghcb A pointer to the GHCB + @param[in] ExitCode VMGEXIT code to be assigned to the SwExitCode + field of the GHCB. + @param[in] ExitInfo1 VMGEXIT information to be assigned to the + SwExitInfo1 field of the GHCB. + @param[in] ExitInfo2 VMGEXIT information to be assigned to the + SwExitInfo2 field of the GHCB. + + @retval 0 VMGEXIT succeeded. + @return Exception number to be propagated, VMGEXIT + processing did not succeed. + +**/ +UINT64 +EFIAPI +CcExitLibVmgExit ( + IN OUT GHCB *Ghcb, + IN UINT64 ExitCode, + IN UINT64 ExitInfo1, + IN UINT64 ExitInfo2 + ) +{ + GHCB_EVENT_INJECTION Event; + + Event.Uint64 =3D 0; + Event.Elements.Vector =3D GP_EXCEPTION; + Event.Elements.Type =3D GHCB_EVENT_INJECTION_TYPE_EXCEPTION; + Event.Elements.Valid =3D 1; + + return Event.Uint64; +} + +/** + Perform pre-VMGEXIT initialization/preparation. + + Performs the necessary steps in preparation for invoking VMGEXIT. Must be + called before setting any fields within the GHCB. + + @param[in, out] Ghcb A pointer to the GHCB + @param[in, out] InterruptState A pointer to hold the current interrupt + state, used for restoring in CcExitLibV= mgDone () + +**/ +VOID +EFIAPI +CcExitLibVmgInit ( + IN OUT GHCB *Ghcb, + IN OUT BOOLEAN *InterruptState + ) +{ +} + +/** + Perform post-VMGEXIT cleanup. + + Performs the necessary steps to cleanup after invoking VMGEXIT. Must be + called after obtaining needed fields within the GHCB. + + @param[in, out] Ghcb A pointer to the GHCB + @param[in] InterruptState An indicator to conditionally (re)enable + interrupts + +**/ +VOID +EFIAPI +CcExitLibVmgDone ( + IN OUT GHCB *Ghcb, + IN BOOLEAN InterruptState + ) +{ +} + +/** + Marks a field at the specified offset as valid in the GHCB. + + The ValidBitmap area represents the areas of the GHCB that have been mar= ked + valid. Set the bit in ValidBitmap for the input offset. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communication Bl= ock + @param[in] Offset Qword offset in the GHCB to mark valid + +**/ +VOID +EFIAPI +CcExitLibVmgSetOffsetValid ( + IN OUT GHCB *Ghcb, + IN GHCB_REGISTER Offset + ) +{ +} + +/** + Checks if a specified offset is valid in the GHCB. + + The ValidBitmap area represents the areas of the GHCB that have been mar= ked + valid. Return whether the bit in the ValidBitmap is set for the input of= fset. + + @param[in] Ghcb A pointer to the GHCB + @param[in] Offset Qword offset in the GHCB to mark valid + + @retval TRUE Offset is marked valid in the GHCB + @retval FALSE Offset is not marked valid in the GHCB + +**/ +BOOLEAN +EFIAPI +CcExitLibVmgIsOffsetValid ( + IN GHCB *Ghcb, + IN GHCB_REGISTER Offset + ) +{ + return FALSE; +} + +/** + Handle a #VC exception. + + Performs the necessary processing to handle a #VC exception. + + The base library function returns an error equal to VC_EXCEPTION, + to be propagated to the standard exception handling stack. + + @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et + as value to use on error. + @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT + + @retval EFI_SUCCESS Exception handled + @retval EFI_UNSUPPORTED #VC not supported, (new) exception value= to + propagate provided + @retval EFI_PROTOCOL_ERROR #VC handling failed, (new) exception val= ue to + propagate provided + +**/ +EFI_STATUS +EFIAPI +CcExitHandleVc ( + IN OUT EFI_EXCEPTION_TYPE *ExceptionType, + IN OUT EFI_SYSTEM_CONTEXT SystemContext + ) +{ + *ExceptionType =3D VC_EXCEPTION; + + return EFI_UNSUPPORTED; +} + +/** + Handle a #VE exception. + + Performs the necessary processing to handle a #VE exception. + + @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et + as value to use on error. + @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT + + @retval EFI_SUCCESS Exception handled + @retval EFI_UNSUPPORTED #VE not supported, (new) exception value= to + propagate provided + @retval EFI_PROTOCOL_ERROR #VE handling failed, (new) exception val= ue to + propagate provided + +**/ +EFI_STATUS +EFIAPI +CcExitHandleVe ( + IN OUT EFI_EXCEPTION_TYPE *ExceptionType, + IN OUT EFI_SYSTEM_CONTEXT SystemContext + ) +{ + *ExceptionType =3D VE_EXCEPTION; + + return EFI_UNSUPPORTED; +} diff --git a/UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf b/UefiCpuPk= g/Library/CcExitLibNull/CcExitLibNull.inf new file mode 100644 index 000000000000..c1f53e42dbe4 --- /dev/null +++ b/UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf @@ -0,0 +1,28 @@ +## @file +# CcExit Base Support Library. +# +# Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved. +# Copyright (c) 2020 - 2022, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D CcExitLibNull + MODULE_UNI_FILE =3D CcExitLibNull.uni + FILE_GUID =3D 4029bbf2-ed6c-4cf6-ac17-a0213684ae41 + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D CcExitLib + +[Sources.common] + CcExitLibNull.c + +[Packages] + MdePkg/MdePkg.dec + UefiCpuPkg/UefiCpuPkg.dec + +[LibraryClasses] + BaseLib + diff --git a/UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.uni b/UefiCpuPk= g/Library/CcExitLibNull/CcExitLibNull.uni new file mode 100644 index 000000000000..b18ae8792ed7 --- /dev/null +++ b/UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.uni @@ -0,0 +1,14 @@ +// /** @file +// CcExitLib instance. +// +// Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved. +// Copyright (c) 2020 - 2022, Intel Corporation. All rights reserved.
+// SPDX-License-Identifier: BSD-2-Clause-Patent +// +// **/ + + +#string STR_MODULE_ABSTRACT #language en-US "CcExitLib NULL in= stance" + +#string STR_MODULE_DESCRIPTION #language en-US "CcExitLib NULL in= stance." + diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index 718323d9042c..8058b679412f 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -56,6 +56,9 @@ ## @libraryclass Provides function to support VMGEXIT processing. VmgExitLib|Include/Library/VmgExitLib.h =20 + ## @libraryclass Provides function to support CcExit processing. + CcExitLib|Include/Library/CcExitLib.h + ## @libraryclass Provides function to get CPU cache information. CpuCacheInfoLib|Include/Library/CpuCacheInfoLib.h =20 --=20 2.29.2.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#96006): https://edk2.groups.io/g/devel/message/96006 Mute This Topic: https://groups.io/mt/94856323/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 09:12:31 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+96007+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96007+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1667780863; cv=none; d=zohomail.com; s=zohoarc; b=cyg+vj5Jr0aguO4VqQdHI3o8xWQ5yDW1FAaHLPLJCaATz6wtxt76h666ednZ87/EdwRVPh7kG9sHgE9xGHoGET7+wTgLNN01I99TRG+buO8dApNCOLQ/lQOaE/6vQbNfSVlEQOJvHwrBueQ/Xv4l73XQ/ydTvMtW5I0CwcNMRAY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1667780863; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=IPfGcePTEELS2Sh7bNsNuVTci0A/Y+lbTDFjXJuN6h0=; b=lHBT2cBIoCRH7VBSUVXGyCG0LNBCJxcS7d/f/wU4mzlXnabFTgCu2EB53uuvAdigbB+3WT8FtF9kCmF9GN1zfobyS7d0pn5p4nSeAAqsq8PCYEBfLhEtVtXOkrmYVAQSr7KoH6hvfgfDFaNgRfik/DVRgp0LXV4E8VuqCQEKR4Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96007+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1667780863954246.08043255839436; Sun, 6 Nov 2022 16:27:43 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id n2ajYY1788612x492hJumvho; Sun, 06 Nov 2022 16:27:42 -0800 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web08.4939.1667780856864962924 for ; Sun, 06 Nov 2022 16:27:42 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="396593390" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="396593390" X-Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:41 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="613681457" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="613681457" X-Received: from mxu9-mobl1.ccr.corp.intel.com ([10.238.0.61]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:39 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min M Xu , Brijesh Singh , Erdem Aktas , Gerd Hoffmann , James Bottomley , Jiewen Yao , Tom Lendacky Subject: [edk2-devel] [PATCH V3 2/9] OvmfPkg: Implement CcExitLib Date: Mon, 7 Nov 2022 08:27:10 +0800 Message-Id: <20221107002717.461-3-min.m.xu@intel.com> In-Reply-To: <20221107002717.461-1-min.m.xu@intel.com> References: <20221107002717.461-1-min.m.xu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,min.m.xu@intel.com X-Gm-Message-State: A2ScIehH0AknL0o71EgKaYkux1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1667780862; bh=HIYHfqvHuSaS8ARCbNKdStovH4Gnq/6fLEq0D+Jlcp4=; h=Cc:Date:From:Reply-To:Subject:To; b=no/mhTW/fxgaZyizJQYmeRwxPjB/2Mx9sTe1xORujyrCDaYDTGbmtbXUy5ay0EA48bW uQYhnoHhaLPZhHKSHGiQxkL5PMi3k8B5/Pi754ZhiOc3VXbCLB3XI7T+tVoF66fIHDcsq SZJRPakh682hjNeSwgyidHwycd+TzkH0z5o= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1667780865589100013 Content-Type: text/plain; charset="utf-8" From: Min M Xu https://bugzilla.tianocore.org/show_bug.cgi?id=3D4123 The base CcExitLib library provides a default limited interface. As it does not provide full support, create an OVMF version of this library to begin the process of providing full support of Cc guest (such as SEV-ES, TDX) within OVMF. Cc: Brijesh Singh Cc: Erdem Aktas Cc: Gerd Hoffmann Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Signed-off-by: Min Xu Reviewed-by: Jiewen Yao --- .../Library/CcExitLib/CcExitLib.c | 183 +- OvmfPkg/Library/CcExitLib/CcExitLib.inf | 46 + OvmfPkg/Library/CcExitLib/CcExitTd.h | 32 + OvmfPkg/Library/CcExitLib/CcExitVcHandler.c | 2355 +++++++++++++++++ OvmfPkg/Library/CcExitLib/CcExitVcHandler.h | 53 + OvmfPkg/Library/CcExitLib/CcExitVeHandler.c | 577 ++++ .../Library/CcExitLib/PeiDxeCcExitVcHandler.c | 103 + OvmfPkg/Library/CcExitLib/SecCcExitLib.inf | 48 + .../Library/CcExitLib/SecCcExitVcHandler.c | 109 + .../Library/CcExitLib/X64/TdVmcallCpuid.nasm | 146 + .../Library/CcExitLibNull/CcExitLibNull.c | 4 +- 11 files changed, 3585 insertions(+), 71 deletions(-) copy UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.c =3D> OvmfPkg/Library= /CcExitLib/CcExitLib.c (50%) create mode 100644 OvmfPkg/Library/CcExitLib/CcExitLib.inf create mode 100644 OvmfPkg/Library/CcExitLib/CcExitTd.h create mode 100644 OvmfPkg/Library/CcExitLib/CcExitVcHandler.c create mode 100644 OvmfPkg/Library/CcExitLib/CcExitVcHandler.h create mode 100644 OvmfPkg/Library/CcExitLib/CcExitVeHandler.c create mode 100644 OvmfPkg/Library/CcExitLib/PeiDxeCcExitVcHandler.c create mode 100644 OvmfPkg/Library/CcExitLib/SecCcExitLib.inf create mode 100644 OvmfPkg/Library/CcExitLib/SecCcExitVcHandler.c create mode 100644 OvmfPkg/Library/CcExitLib/X64/TdVmcallCpuid.nasm diff --git a/UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.c b/OvmfPkg/Lib= rary/CcExitLib/CcExitLib.c similarity index 50% copy from UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.c copy to OvmfPkg/Library/CcExitLib/CcExitLib.c index bd23793f1e04..2e9ce141f33b 100644 --- a/UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.c +++ b/OvmfPkg/Library/CcExitLib/CcExitLib.c @@ -1,15 +1,86 @@ /** @file - CcExit Base Support Library. + CcExitLib Support Library. =20 Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
- Copyright (c) 2020 - 2022, Intel Corporation. All rights reserved.
+ Copyright (C) 2020 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ =20 #include #include +#include #include +#include + +/** + Check for VMGEXIT error + + Check if the hypervisor has returned an error after completion of the VM= GEXIT + by examining the SwExitInfo1 field of the GHCB. + + @param[in] Ghcb A pointer to the GHCB + + @retval 0 VMGEXIT succeeded. + @return Exception number to be propagated, VMGEXIT proces= sing + did not succeed. + +**/ +STATIC +UINT64 +VmgExitErrorCheck ( + IN GHCB *Ghcb + ) +{ + GHCB_EVENT_INJECTION Event; + GHCB_EXIT_INFO ExitInfo; + UINT64 Status; + + ExitInfo.Uint64 =3D Ghcb->SaveArea.SwExitInfo1; + ASSERT ( + (ExitInfo.Elements.Lower32Bits =3D=3D 0) || + (ExitInfo.Elements.Lower32Bits =3D=3D 1) + ); + + Status =3D 0; + if (ExitInfo.Elements.Lower32Bits =3D=3D 0) { + return Status; + } + + if (ExitInfo.Elements.Lower32Bits =3D=3D 1) { + ASSERT (Ghcb->SaveArea.SwExitInfo2 !=3D 0); + + // + // Check that the return event is valid + // + Event.Uint64 =3D Ghcb->SaveArea.SwExitInfo2; + if (Event.Elements.Valid && + (Event.Elements.Type =3D=3D GHCB_EVENT_INJECTION_TYPE_EXCEPTION)) + { + switch (Event.Elements.Vector) { + case GP_EXCEPTION: + case UD_EXCEPTION: + // + // Use returned event as return code + // + Status =3D Event.Uint64; + } + } + } + + if (Status =3D=3D 0) { + GHCB_EVENT_INJECTION GpEvent; + + GpEvent.Uint64 =3D 0; + GpEvent.Elements.Vector =3D GP_EXCEPTION; + GpEvent.Elements.Type =3D GHCB_EVENT_INJECTION_TYPE_EXCEPTION; + GpEvent.Elements.Valid =3D 1; + + Status =3D GpEvent.Uint64; + } + + return Status; +} =20 /** Perform VMGEXIT. @@ -17,9 +88,6 @@ Sets the necessary fields of the GHCB, invokes the VMGEXIT instruction a= nd then handles the return actions. =20 - The base library function returns an error in the form of a - GHCB_EVENT_INJECTION representing a GP_EXCEPTION. - @param[in, out] Ghcb A pointer to the GHCB @param[in] ExitCode VMGEXIT code to be assigned to the SwExitCode field of the GHCB. @@ -42,14 +110,24 @@ CcExitLibVmgExit ( IN UINT64 ExitInfo2 ) { - GHCB_EVENT_INJECTION Event; + Ghcb->SaveArea.SwExitCode =3D ExitCode; + Ghcb->SaveArea.SwExitInfo1 =3D ExitInfo1; + Ghcb->SaveArea.SwExitInfo2 =3D ExitInfo2; =20 - Event.Uint64 =3D 0; - Event.Elements.Vector =3D GP_EXCEPTION; - Event.Elements.Type =3D GHCB_EVENT_INJECTION_TYPE_EXCEPTION; - Event.Elements.Valid =3D 1; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbSwExitCode); + CcExitLibVmgSetOffsetValid (Ghcb, GhcbSwExitInfo1); + CcExitLibVmgSetOffsetValid (Ghcb, GhcbSwExitInfo2); =20 - return Event.Uint64; + // + // Guest memory is used for the guest-hypervisor communication, so fence + // the invocation of the VMGEXIT instruction to ensure GHCB accesses are + // synchronized properly. + // + MemoryFence (); + AsmVmgExit (); + MemoryFence (); + + return VmgExitErrorCheck (Ghcb); } =20 /** @@ -70,6 +148,16 @@ CcExitLibVmgInit ( IN OUT BOOLEAN *InterruptState ) { + // + // Be sure that an interrupt can't cause a #VC while the GHCB is + // being used. + // + *InterruptState =3D GetInterruptState (); + if (*InterruptState) { + DisableInterrupts (); + } + + SetMem (&Ghcb->SaveArea, sizeof (Ghcb->SaveArea), 0); } =20 /** @@ -90,6 +178,9 @@ CcExitLibVmgDone ( IN BOOLEAN InterruptState ) { + if (InterruptState) { + EnableInterrupts (); + } } =20 /** @@ -109,6 +200,13 @@ CcExitLibVmgSetOffsetValid ( IN GHCB_REGISTER Offset ) { + UINT32 OffsetIndex; + UINT32 OffsetBit; + + OffsetIndex =3D Offset / 8; + OffsetBit =3D Offset % 8; + + Ghcb->SaveArea.ValidBitmap[OffsetIndex] |=3D (1 << OffsetBit); } =20 /** @@ -131,64 +229,11 @@ CcExitLibVmgIsOffsetValid ( IN GHCB_REGISTER Offset ) { - return FALSE; -} - -/** - Handle a #VC exception. - - Performs the necessary processing to handle a #VC exception. - - The base library function returns an error equal to VC_EXCEPTION, - to be propagated to the standard exception handling stack. - - @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et - as value to use on error. - @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT - - @retval EFI_SUCCESS Exception handled - @retval EFI_UNSUPPORTED #VC not supported, (new) exception value= to - propagate provided - @retval EFI_PROTOCOL_ERROR #VC handling failed, (new) exception val= ue to - propagate provided - -**/ -EFI_STATUS -EFIAPI -CcExitHandleVc ( - IN OUT EFI_EXCEPTION_TYPE *ExceptionType, - IN OUT EFI_SYSTEM_CONTEXT SystemContext - ) -{ - *ExceptionType =3D VC_EXCEPTION; - - return EFI_UNSUPPORTED; -} - -/** - Handle a #VE exception. - - Performs the necessary processing to handle a #VE exception. - - @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et - as value to use on error. - @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT - - @retval EFI_SUCCESS Exception handled - @retval EFI_UNSUPPORTED #VE not supported, (new) exception value= to - propagate provided - @retval EFI_PROTOCOL_ERROR #VE handling failed, (new) exception val= ue to - propagate provided + UINT32 OffsetIndex; + UINT32 OffsetBit; =20 -**/ -EFI_STATUS -EFIAPI -CcExitHandleVe ( - IN OUT EFI_EXCEPTION_TYPE *ExceptionType, - IN OUT EFI_SYSTEM_CONTEXT SystemContext - ) -{ - *ExceptionType =3D VE_EXCEPTION; + OffsetIndex =3D Offset / 8; + OffsetBit =3D Offset % 8; =20 - return EFI_UNSUPPORTED; + return ((Ghcb->SaveArea.ValidBitmap[OffsetIndex] & (1 << OffsetBit)) != =3D 0); } diff --git a/OvmfPkg/Library/CcExitLib/CcExitLib.inf b/OvmfPkg/Library/CcEx= itLib/CcExitLib.inf new file mode 100644 index 000000000000..85906c831fbc --- /dev/null +++ b/OvmfPkg/Library/CcExitLib/CcExitLib.inf @@ -0,0 +1,46 @@ +## @file +# CcExitLib Library. +# +# Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved. +# Copyright (C) 2020 - 2022, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D CcExitLib + FILE_GUID =3D 6edfe409-72d0-4574-adcd-78c972d8fd87 + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D CcExitLib|PEIM DXE_CORE DXE_DRIVER DX= E_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_DRIVER + +# +# The following information is for reference only and not required by the = build tools. +# +# VALID_ARCHITECTURES =3D X64 +# + +[Sources.common] + CcExitLib.c + CcExitVcHandler.c + CcExitVcHandler.h + PeiDxeCcExitVcHandler.c + CcExitVeHandler.c + X64/TdVmcallCpuid.nasm + +[Packages] + MdePkg/MdePkg.dec + OvmfPkg/OvmfPkg.dec + UefiCpuPkg/UefiCpuPkg.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + LocalApicLib + MemEncryptSevLib + +[Pcd] + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidSize diff --git a/OvmfPkg/Library/CcExitLib/CcExitTd.h b/OvmfPkg/Library/CcExitL= ib/CcExitTd.h new file mode 100644 index 000000000000..4afc5794d226 --- /dev/null +++ b/OvmfPkg/Library/CcExitLib/CcExitTd.h @@ -0,0 +1,32 @@ +/** @file + + Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef CC_EXIT_TD_H_ +#define CC_EXIT_TD_H_ + +#include +#include + +/** + This function enable the TD guest to request the VMM to emulate CPUID + operation, especially for non-architectural, CPUID leaves. + + @param[in] Eax Main leaf of the CPUID + @param[in] Ecx Sub-leaf of the CPUID + @param[out] Results Returned result of CPUID operation + + @return EFI_SUCCESS +**/ +EFI_STATUS +EFIAPI +CcExitLibTdVmCallCpuid ( + IN UINT64 Eax, + IN UINT64 Ecx, + OUT VOID *Results + ); + +#endif diff --git a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c b/OvmfPkg/Library/= CcExitLib/CcExitVcHandler.c new file mode 100644 index 000000000000..c4a0284d1b5e --- /dev/null +++ b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c @@ -0,0 +1,2355 @@ +/** @file + X64 #VC Exception Handler functon. + + Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "CcExitVcHandler.h" + +// +// Instruction execution mode definition +// +typedef enum { + LongMode64Bit =3D 0, + LongModeCompat32Bit, + LongModeCompat16Bit, +} SEV_ES_INSTRUCTION_MODE; + +// +// Instruction size definition (for operand and address) +// +typedef enum { + Size8Bits =3D 0, + Size16Bits, + Size32Bits, + Size64Bits, +} SEV_ES_INSTRUCTION_SIZE; + +// +// Intruction segment definition +// +typedef enum { + SegmentEs =3D 0, + SegmentCs, + SegmentSs, + SegmentDs, + SegmentFs, + SegmentGs, +} SEV_ES_INSTRUCTION_SEGMENT; + +// +// Instruction rep function definition +// +typedef enum { + RepNone =3D 0, + RepZ, + RepNZ, +} SEV_ES_INSTRUCTION_REP; + +typedef struct { + UINT8 Rm; + UINT8 Reg; + UINT8 Mod; +} SEV_ES_INSTRUCTION_MODRM_EXT; + +typedef struct { + UINT8 Base; + UINT8 Index; + UINT8 Scale; +} SEV_ES_INSTRUCTION_SIB_EXT; + +// +// Instruction opcode definition +// +typedef struct { + SEV_ES_INSTRUCTION_MODRM_EXT ModRm; + + SEV_ES_INSTRUCTION_SIB_EXT Sib; + + UINTN RegData; + UINTN RmData; +} SEV_ES_INSTRUCTION_OPCODE_EXT; + +// +// Instruction parsing context definition +// +typedef struct { + GHCB *Ghcb; + + SEV_ES_INSTRUCTION_MODE Mode; + SEV_ES_INSTRUCTION_SIZE DataSize; + SEV_ES_INSTRUCTION_SIZE AddrSize; + BOOLEAN SegmentSpecified; + SEV_ES_INSTRUCTION_SEGMENT Segment; + SEV_ES_INSTRUCTION_REP RepMode; + + UINT8 *Begin; + UINT8 *End; + + UINT8 *Prefixes; + UINT8 *OpCodes; + UINT8 *Displacement; + UINT8 *Immediate; + + INSTRUCTION_REX_PREFIX RexPrefix; + + BOOLEAN ModRmPresent; + INSTRUCTION_MODRM ModRm; + + BOOLEAN SibPresent; + INSTRUCTION_SIB Sib; + + UINTN PrefixSize; + UINTN OpCodeSize; + UINTN DisplacementSize; + UINTN ImmediateSize; + + SEV_ES_INSTRUCTION_OPCODE_EXT Ext; +} SEV_ES_INSTRUCTION_DATA; + +// +// Non-automatic Exit function prototype +// +typedef +UINT64 +(*NAE_EXIT) ( + GHCB *Ghcb, + EFI_SYSTEM_CONTEXT_X64 *Regs, + SEV_ES_INSTRUCTION_DATA *InstructionData + ); + +// +// SEV-SNP Cpuid table entry/function +// +typedef PACKED struct { + UINT32 EaxIn; + UINT32 EcxIn; + UINT64 Unused; + UINT64 Unused2; + UINT32 Eax; + UINT32 Ebx; + UINT32 Ecx; + UINT32 Edx; + UINT64 Reserved; +} SEV_SNP_CPUID_FUNCTION; + +// +// SEV-SNP Cpuid page format +// +typedef PACKED struct { + UINT32 Count; + UINT32 Reserved1; + UINT64 Reserved2; + SEV_SNP_CPUID_FUNCTION function[0]; +} SEV_SNP_CPUID_INFO; + +/** + Return a pointer to the contents of the specified register. + + Based upon the input register, return a pointer to the registers contents + in the x86 processor context. + + @param[in] Regs x64 processor context + @param[in] Register Register to obtain pointer for + + @return Pointer to the contents of the requested register + +**/ +STATIC +UINT64 * +GetRegisterPointer ( + IN EFI_SYSTEM_CONTEXT_X64 *Regs, + IN UINT8 Register + ) +{ + UINT64 *Reg; + + switch (Register) { + case 0: + Reg =3D &Regs->Rax; + break; + case 1: + Reg =3D &Regs->Rcx; + break; + case 2: + Reg =3D &Regs->Rdx; + break; + case 3: + Reg =3D &Regs->Rbx; + break; + case 4: + Reg =3D &Regs->Rsp; + break; + case 5: + Reg =3D &Regs->Rbp; + break; + case 6: + Reg =3D &Regs->Rsi; + break; + case 7: + Reg =3D &Regs->Rdi; + break; + case 8: + Reg =3D &Regs->R8; + break; + case 9: + Reg =3D &Regs->R9; + break; + case 10: + Reg =3D &Regs->R10; + break; + case 11: + Reg =3D &Regs->R11; + break; + case 12: + Reg =3D &Regs->R12; + break; + case 13: + Reg =3D &Regs->R13; + break; + case 14: + Reg =3D &Regs->R14; + break; + case 15: + Reg =3D &Regs->R15; + break; + default: + Reg =3D NULL; + } + + ASSERT (Reg !=3D NULL); + + return Reg; +} + +/** + Update the instruction parsing context for displacement bytes. + + @param[in, out] InstructionData Instruction parsing context + @param[in] Size The instruction displacement size + +**/ +STATIC +VOID +UpdateForDisplacement ( + IN OUT SEV_ES_INSTRUCTION_DATA *InstructionData, + IN UINTN Size + ) +{ + InstructionData->DisplacementSize =3D Size; + InstructionData->Immediate +=3D Size; + InstructionData->End +=3D Size; +} + +/** + Determine if an instruction address if RIP relative. + + Examine the instruction parsing context to determine if the address offs= et + is relative to the instruction pointer. + + @param[in] InstructionData Instruction parsing context + + @retval TRUE Instruction addressing is RIP relative + @retval FALSE Instruction addressing is not RIP relative + +**/ +STATIC +BOOLEAN +IsRipRelative ( + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + SEV_ES_INSTRUCTION_OPCODE_EXT *Ext; + + Ext =3D &InstructionData->Ext; + + return ((InstructionData->Mode =3D=3D LongMode64Bit) && + (Ext->ModRm.Mod =3D=3D 0) && + (Ext->ModRm.Rm =3D=3D 5) && + (InstructionData->SibPresent =3D=3D FALSE)); +} + +/** + Return the effective address of a memory operand. + + Examine the instruction parsing context to obtain the effective memory + address of a memory operand. + + @param[in] Regs x64 processor context + @param[in] InstructionData Instruction parsing context + + @return The memory operand effective address + +**/ +STATIC +UINT64 +GetEffectiveMemoryAddress ( + IN EFI_SYSTEM_CONTEXT_X64 *Regs, + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + SEV_ES_INSTRUCTION_OPCODE_EXT *Ext; + UINT64 EffectiveAddress; + + Ext =3D &InstructionData->Ext; + EffectiveAddress =3D 0; + + if (IsRipRelative (InstructionData)) { + // + // RIP-relative displacement is a 32-bit signed value + // + INT32 RipRelative; + + RipRelative =3D *(INT32 *)InstructionData->Displacement; + + UpdateForDisplacement (InstructionData, 4); + + // + // Negative displacement is handled by standard UINT64 wrap-around. + // + return Regs->Rip + (UINT64)RipRelative; + } + + switch (Ext->ModRm.Mod) { + case 1: + UpdateForDisplacement (InstructionData, 1); + EffectiveAddress +=3D (UINT64)(*(INT8 *)(InstructionData->Displaceme= nt)); + break; + case 2: + switch (InstructionData->AddrSize) { + case Size16Bits: + UpdateForDisplacement (InstructionData, 2); + EffectiveAddress +=3D (UINT64)(*(INT16 *)(InstructionData->Displ= acement)); + break; + default: + UpdateForDisplacement (InstructionData, 4); + EffectiveAddress +=3D (UINT64)(*(INT32 *)(InstructionData->Displ= acement)); + break; + } + + break; + } + + if (InstructionData->SibPresent) { + INT64 Displacement; + + if (Ext->Sib.Index !=3D 4) { + CopyMem ( + &Displacement, + GetRegisterPointer (Regs, Ext->Sib.Index), + sizeof (Displacement) + ); + Displacement *=3D (INT64)(1 << Ext->Sib.Scale); + + // + // Negative displacement is handled by standard UINT64 wrap-around. + // + EffectiveAddress +=3D (UINT64)Displacement; + } + + if ((Ext->Sib.Base !=3D 5) || Ext->ModRm.Mod) { + EffectiveAddress +=3D *GetRegisterPointer (Regs, Ext->Sib.Base); + } else { + UpdateForDisplacement (InstructionData, 4); + EffectiveAddress +=3D (UINT64)(*(INT32 *)(InstructionData->Displacem= ent)); + } + } else { + EffectiveAddress +=3D *GetRegisterPointer (Regs, Ext->ModRm.Rm); + } + + return EffectiveAddress; +} + +/** + Decode a ModRM byte. + + Examine the instruction parsing context to decode a ModRM byte and the S= IB + byte, if present. + + @param[in] Regs x64 processor context + @param[in, out] InstructionData Instruction parsing context + +**/ +STATIC +VOID +DecodeModRm ( + IN EFI_SYSTEM_CONTEXT_X64 *Regs, + IN OUT SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + SEV_ES_INSTRUCTION_OPCODE_EXT *Ext; + INSTRUCTION_REX_PREFIX *RexPrefix; + INSTRUCTION_MODRM *ModRm; + INSTRUCTION_SIB *Sib; + + RexPrefix =3D &InstructionData->RexPrefix; + Ext =3D &InstructionData->Ext; + ModRm =3D &InstructionData->ModRm; + Sib =3D &InstructionData->Sib; + + InstructionData->ModRmPresent =3D TRUE; + ModRm->Uint8 =3D *(InstructionData->End); + + InstructionData->Displacement++; + InstructionData->Immediate++; + InstructionData->End++; + + Ext->ModRm.Mod =3D ModRm->Bits.Mod; + Ext->ModRm.Reg =3D (RexPrefix->Bits.BitR << 3) | ModRm->Bits.Reg; + Ext->ModRm.Rm =3D (RexPrefix->Bits.BitB << 3) | ModRm->Bits.Rm; + + Ext->RegData =3D *GetRegisterPointer (Regs, Ext->ModRm.Reg); + + if (Ext->ModRm.Mod =3D=3D 3) { + Ext->RmData =3D *GetRegisterPointer (Regs, Ext->ModRm.Rm); + } else { + if (ModRm->Bits.Rm =3D=3D 4) { + InstructionData->SibPresent =3D TRUE; + Sib->Uint8 =3D *(InstructionData->End); + + InstructionData->Displacement++; + InstructionData->Immediate++; + InstructionData->End++; + + Ext->Sib.Scale =3D Sib->Bits.Scale; + Ext->Sib.Index =3D (RexPrefix->Bits.BitX << 3) | Sib->Bits.Index; + Ext->Sib.Base =3D (RexPrefix->Bits.BitB << 3) | Sib->Bits.Base; + } + + Ext->RmData =3D GetEffectiveMemoryAddress (Regs, InstructionData); + } +} + +/** + Decode instruction prefixes. + + Parse the instruction data to track the instruction prefixes that have + been used. + + @param[in] Regs x64 processor context + @param[in, out] InstructionData Instruction parsing context + +**/ +STATIC +VOID +DecodePrefixes ( + IN EFI_SYSTEM_CONTEXT_X64 *Regs, + IN OUT SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + SEV_ES_INSTRUCTION_MODE Mode; + SEV_ES_INSTRUCTION_SIZE ModeDataSize; + SEV_ES_INSTRUCTION_SIZE ModeAddrSize; + UINT8 *Byte; + + // + // Always in 64-bit mode + // + Mode =3D LongMode64Bit; + ModeDataSize =3D Size32Bits; + ModeAddrSize =3D Size64Bits; + + InstructionData->Mode =3D Mode; + InstructionData->DataSize =3D ModeDataSize; + InstructionData->AddrSize =3D ModeAddrSize; + + InstructionData->Prefixes =3D InstructionData->Begin; + + Byte =3D InstructionData->Prefixes; + for ( ; ; Byte++, InstructionData->PrefixSize++) { + // + // Check the 0x40 to 0x4F range using an if statement here since some + // compilers don't like the "case 0x40 ... 0x4F:" syntax. This avoids + // 16 case statements below. + // + if ((*Byte >=3D REX_PREFIX_START) && (*Byte <=3D REX_PREFIX_STOP)) { + InstructionData->RexPrefix.Uint8 =3D *Byte; + if ((*Byte & REX_64BIT_OPERAND_SIZE_MASK) !=3D 0) { + InstructionData->DataSize =3D Size64Bits; + } + + continue; + } + + switch (*Byte) { + case OVERRIDE_SEGMENT_CS: + case OVERRIDE_SEGMENT_DS: + case OVERRIDE_SEGMENT_ES: + case OVERRIDE_SEGMENT_SS: + if (Mode !=3D LongMode64Bit) { + InstructionData->SegmentSpecified =3D TRUE; + InstructionData->Segment =3D (*Byte >> 3) & 3; + } + + break; + + case OVERRIDE_SEGMENT_FS: + case OVERRIDE_SEGMENT_GS: + InstructionData->SegmentSpecified =3D TRUE; + InstructionData->Segment =3D *Byte & 7; + break; + + case OVERRIDE_OPERAND_SIZE: + if (InstructionData->RexPrefix.Uint8 =3D=3D 0) { + InstructionData->DataSize =3D + (Mode =3D=3D LongMode64Bit) ? Size16Bits : + (Mode =3D=3D LongModeCompat32Bit) ? Size16Bits : + (Mode =3D=3D LongModeCompat16Bit) ? Size32Bits : 0; + } + + break; + + case OVERRIDE_ADDRESS_SIZE: + InstructionData->AddrSize =3D + (Mode =3D=3D LongMode64Bit) ? Size32Bits : + (Mode =3D=3D LongModeCompat32Bit) ? Size16Bits : + (Mode =3D=3D LongModeCompat16Bit) ? Size32Bits : 0; + break; + + case LOCK_PREFIX: + break; + + case REPZ_PREFIX: + InstructionData->RepMode =3D RepZ; + break; + + case REPNZ_PREFIX: + InstructionData->RepMode =3D RepNZ; + break; + + default: + InstructionData->OpCodes =3D Byte; + InstructionData->OpCodeSize =3D (*Byte =3D=3D TWO_BYTE_OPCODE_ESCA= PE) ? 2 : 1; + + InstructionData->End =3D Byte + InstructionData->OpCodeSi= ze; + InstructionData->Displacement =3D InstructionData->End; + InstructionData->Immediate =3D InstructionData->End; + return; + } + } +} + +/** + Determine instruction length + + Return the total length of the parsed instruction. + + @param[in] InstructionData Instruction parsing context + + @return Length of parsed instruction + +**/ +STATIC +UINT64 +InstructionLength ( + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + return (UINT64)(InstructionData->End - InstructionData->Begin); +} + +/** + Initialize the instruction parsing context. + + Initialize the instruction parsing context, which includes decoding the + instruction prefixes. + + @param[in, out] InstructionData Instruction parsing context + @param[in] Ghcb Pointer to the Guest-Hypervisor Communi= cation + Block + @param[in] Regs x64 processor context + +**/ +STATIC +VOID +InitInstructionData ( + IN OUT SEV_ES_INSTRUCTION_DATA *InstructionData, + IN GHCB *Ghcb, + IN EFI_SYSTEM_CONTEXT_X64 *Regs + ) +{ + SetMem (InstructionData, sizeof (*InstructionData), 0); + InstructionData->Ghcb =3D Ghcb; + InstructionData->Begin =3D (UINT8 *)Regs->Rip; + InstructionData->End =3D (UINT8 *)Regs->Rip; + + DecodePrefixes (Regs, InstructionData); +} + +/** + Report an unsupported event to the hypervisor + + Use the VMGEXIT support to report an unsupported event to the hypervisor. + + @param[in] Ghcb Pointer to the Guest-Hypervisor Communication + Block + @param[in] Regs x64 processor context + @param[in] InstructionData Instruction parsing context + + @return New exception value to propagate + +**/ +STATIC +UINT64 +UnsupportedExit ( + IN GHCB *Ghcb, + IN EFI_SYSTEM_CONTEXT_X64 *Regs, + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + UINT64 Status; + + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_UNSUPPORTED, Regs->Exception= Data, 0); + if (Status =3D=3D 0) { + GHCB_EVENT_INJECTION Event; + + Event.Uint64 =3D 0; + Event.Elements.Vector =3D GP_EXCEPTION; + Event.Elements.Type =3D GHCB_EVENT_INJECTION_TYPE_EXCEPTION; + Event.Elements.Valid =3D 1; + + Status =3D Event.Uint64; + } + + return Status; +} + +/** + Validate that the MMIO memory access is not to encrypted memory. + + Examine the pagetable entry for the memory specified. MMIO should not be + performed against encrypted memory. MMIO to the APIC page is always allo= wed. + + @param[in] Ghcb Pointer to the Guest-Hypervisor Communication = Block + @param[in] MemoryAddress Memory address to validate + @param[in] MemoryLength Memory length to validate + + @retval 0 Memory is not encrypted + @return New exception value to propogate + +**/ +STATIC +UINT64 +ValidateMmioMemory ( + IN GHCB *Ghcb, + IN UINTN MemoryAddress, + IN UINTN MemoryLength + ) +{ + MEM_ENCRYPT_SEV_ADDRESS_RANGE_STATE State; + GHCB_EVENT_INJECTION GpEvent; + UINTN Address; + + // + // Allow APIC accesses (which will have the encryption bit set during + // SEC and PEI phases). + // + Address =3D MemoryAddress & ~(SIZE_4KB - 1); + if (Address =3D=3D GetLocalApicBaseAddress ()) { + return 0; + } + + State =3D MemEncryptSevGetAddressRangeState ( + 0, + MemoryAddress, + MemoryLength + ); + if (State =3D=3D MemEncryptSevAddressRangeUnencrypted) { + return 0; + } + + // + // Any state other than unencrypted is an error, issue a #GP. + // + DEBUG (( + DEBUG_ERROR, + "MMIO using encrypted memory: %lx\n", + (UINT64)MemoryAddress + )); + GpEvent.Uint64 =3D 0; + GpEvent.Elements.Vector =3D GP_EXCEPTION; + GpEvent.Elements.Type =3D GHCB_EVENT_INJECTION_TYPE_EXCEPTION; + GpEvent.Elements.Valid =3D 1; + + return GpEvent.Uint64; +} + +/** + Handle an MMIO event. + + Use the VMGEXIT instruction to handle either an MMIO read or an MMIO wri= te. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation + Block + @param[in, out] Regs x64 processor context + @param[in, out] InstructionData Instruction parsing context + + @retval 0 Event handled successfully + @return New exception value to propagate + +**/ +STATIC +UINT64 +MmioExit ( + IN OUT GHCB *Ghcb, + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN OUT SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + UINT64 ExitInfo1, ExitInfo2, Status; + UINTN Bytes; + UINT64 *Register; + UINT8 OpCode, SignByte; + UINTN Address; + + Bytes =3D 0; + + OpCode =3D *(InstructionData->OpCodes); + if (OpCode =3D=3D TWO_BYTE_OPCODE_ESCAPE) { + OpCode =3D *(InstructionData->OpCodes + 1); + } + + switch (OpCode) { + // + // MMIO write (MOV reg/memX, regX) + // + case 0x88: + Bytes =3D 1; + // + // fall through + // + case 0x89: + DecodeModRm (Regs, InstructionData); + Bytes =3D ((Bytes !=3D 0) ? Bytes : + (InstructionData->DataSize =3D=3D Size16Bits) ? 2 : + (InstructionData->DataSize =3D=3D Size32Bits) ? 4 : + (InstructionData->DataSize =3D=3D Size64Bits) ? 8 : + 0); + + if (InstructionData->Ext.ModRm.Mod =3D=3D 3) { + // + // NPF on two register operands??? + // + return UnsupportedExit (Ghcb, Regs, InstructionData); + } + + Status =3D ValidateMmioMemory (Ghcb, InstructionData->Ext.RmData, By= tes); + if (Status !=3D 0) { + return Status; + } + + ExitInfo1 =3D InstructionData->Ext.RmData; + ExitInfo2 =3D Bytes; + CopyMem (Ghcb->SharedBuffer, &InstructionData->Ext.RegData, Bytes); + + Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbSwScratch); + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_MMIO_WRITE, ExitInfo1, E= xitInfo2); + if (Status !=3D 0) { + return Status; + } + + break; + + // + // MMIO write (MOV moffsetX, aX) + // + case 0xA2: + Bytes =3D 1; + // + // fall through + // + case 0xA3: + Bytes =3D ((Bytes !=3D 0) ? Bytes : + (InstructionData->DataSize =3D=3D Size16Bits) ? 2 : + (InstructionData->DataSize =3D=3D Size32Bits) ? 4 : + (InstructionData->DataSize =3D=3D Size64Bits) ? 8 : + 0); + + InstructionData->ImmediateSize =3D (UINTN)(1 << InstructionData->Add= rSize); + InstructionData->End +=3D InstructionData->ImmediateSize; + + // + // This code is X64 only, so a possible 8-byte copy to a UINTN is ok. + // Use a STATIC_ASSERT to be certain the code is being built as X64. + // + STATIC_ASSERT ( + sizeof (UINTN) =3D=3D sizeof (UINT64), + "sizeof (UINTN) !=3D sizeof (UINT64), this file must be built as X= 64" + ); + + Address =3D 0; + CopyMem ( + &Address, + InstructionData->Immediate, + InstructionData->ImmediateSize + ); + + Status =3D ValidateMmioMemory (Ghcb, Address, Bytes); + if (Status !=3D 0) { + return Status; + } + + ExitInfo1 =3D Address; + ExitInfo2 =3D Bytes; + CopyMem (Ghcb->SharedBuffer, &Regs->Rax, Bytes); + + Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbSwScratch); + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_MMIO_WRITE, ExitInfo1, E= xitInfo2); + if (Status !=3D 0) { + return Status; + } + + break; + + // + // MMIO write (MOV reg/memX, immX) + // + case 0xC6: + Bytes =3D 1; + // + // fall through + // + case 0xC7: + DecodeModRm (Regs, InstructionData); + Bytes =3D ((Bytes !=3D 0) ? Bytes : + (InstructionData->DataSize =3D=3D Size16Bits) ? 2 : + (InstructionData->DataSize =3D=3D Size32Bits) ? 4 : + 0); + + InstructionData->ImmediateSize =3D Bytes; + InstructionData->End +=3D Bytes; + + Status =3D ValidateMmioMemory (Ghcb, InstructionData->Ext.RmData, By= tes); + if (Status !=3D 0) { + return Status; + } + + ExitInfo1 =3D InstructionData->Ext.RmData; + ExitInfo2 =3D Bytes; + CopyMem (Ghcb->SharedBuffer, InstructionData->Immediate, Bytes); + + Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbSwScratch); + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_MMIO_WRITE, ExitInfo1, E= xitInfo2); + if (Status !=3D 0) { + return Status; + } + + break; + + // + // MMIO read (MOV regX, reg/memX) + // + case 0x8A: + Bytes =3D 1; + // + // fall through + // + case 0x8B: + DecodeModRm (Regs, InstructionData); + Bytes =3D ((Bytes !=3D 0) ? Bytes : + (InstructionData->DataSize =3D=3D Size16Bits) ? 2 : + (InstructionData->DataSize =3D=3D Size32Bits) ? 4 : + (InstructionData->DataSize =3D=3D Size64Bits) ? 8 : + 0); + if (InstructionData->Ext.ModRm.Mod =3D=3D 3) { + // + // NPF on two register operands??? + // + return UnsupportedExit (Ghcb, Regs, InstructionData); + } + + Status =3D ValidateMmioMemory (Ghcb, InstructionData->Ext.RmData, By= tes); + if (Status !=3D 0) { + return Status; + } + + ExitInfo1 =3D InstructionData->Ext.RmData; + ExitInfo2 =3D Bytes; + + Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbSwScratch); + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_MMIO_READ, ExitInfo1, Ex= itInfo2); + if (Status !=3D 0) { + return Status; + } + + Register =3D GetRegisterPointer (Regs, InstructionData->Ext.ModRm.Re= g); + if (Bytes =3D=3D 4) { + // + // Zero-extend for 32-bit operation + // + *Register =3D 0; + } + + CopyMem (Register, Ghcb->SharedBuffer, Bytes); + break; + + // + // MMIO read (MOV aX, moffsetX) + // + case 0xA0: + Bytes =3D 1; + // + // fall through + // + case 0xA1: + Bytes =3D ((Bytes !=3D 0) ? Bytes : + (InstructionData->DataSize =3D=3D Size16Bits) ? 2 : + (InstructionData->DataSize =3D=3D Size32Bits) ? 4 : + (InstructionData->DataSize =3D=3D Size64Bits) ? 8 : + 0); + + InstructionData->ImmediateSize =3D (UINTN)(1 << InstructionData->Add= rSize); + InstructionData->End +=3D InstructionData->ImmediateSize; + + // + // This code is X64 only, so a possible 8-byte copy to a UINTN is ok. + // Use a STATIC_ASSERT to be certain the code is being built as X64. + // + STATIC_ASSERT ( + sizeof (UINTN) =3D=3D sizeof (UINT64), + "sizeof (UINTN) !=3D sizeof (UINT64), this file must be built as X= 64" + ); + + Address =3D 0; + CopyMem ( + &Address, + InstructionData->Immediate, + InstructionData->ImmediateSize + ); + + Status =3D ValidateMmioMemory (Ghcb, Address, Bytes); + if (Status !=3D 0) { + return Status; + } + + ExitInfo1 =3D Address; + ExitInfo2 =3D Bytes; + + Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbSwScratch); + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_MMIO_READ, ExitInfo1, Ex= itInfo2); + if (Status !=3D 0) { + return Status; + } + + if (Bytes =3D=3D 4) { + // + // Zero-extend for 32-bit operation + // + Regs->Rax =3D 0; + } + + CopyMem (&Regs->Rax, Ghcb->SharedBuffer, Bytes); + break; + + // + // MMIO read w/ zero-extension ((MOVZX regX, reg/memX) + // + case 0xB6: + Bytes =3D 1; + // + // fall through + // + case 0xB7: + DecodeModRm (Regs, InstructionData); + Bytes =3D (Bytes !=3D 0) ? Bytes : 2; + + Status =3D ValidateMmioMemory (Ghcb, InstructionData->Ext.RmData, By= tes); + if (Status !=3D 0) { + return Status; + } + + ExitInfo1 =3D InstructionData->Ext.RmData; + ExitInfo2 =3D Bytes; + + Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbSwScratch); + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_MMIO_READ, ExitInfo1, Ex= itInfo2); + if (Status !=3D 0) { + return Status; + } + + Register =3D GetRegisterPointer (Regs, InstructionData->Ext.ModRm.Re= g); + SetMem (Register, (UINTN)(1 << InstructionData->DataSize), 0); + CopyMem (Register, Ghcb->SharedBuffer, Bytes); + break; + + // + // MMIO read w/ sign-extension (MOVSX regX, reg/memX) + // + case 0xBE: + Bytes =3D 1; + // + // fall through + // + case 0xBF: + DecodeModRm (Regs, InstructionData); + Bytes =3D (Bytes !=3D 0) ? Bytes : 2; + + Status =3D ValidateMmioMemory (Ghcb, InstructionData->Ext.RmData, By= tes); + if (Status !=3D 0) { + return Status; + } + + ExitInfo1 =3D InstructionData->Ext.RmData; + ExitInfo2 =3D Bytes; + + Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbSwScratch); + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_MMIO_READ, ExitInfo1, Ex= itInfo2); + if (Status !=3D 0) { + return Status; + } + + if (Bytes =3D=3D 1) { + UINT8 *Data; + + Data =3D (UINT8 *)Ghcb->SharedBuffer; + SignByte =3D ((*Data & BIT7) !=3D 0) ? 0xFF : 0x00; + } else { + UINT16 *Data; + + Data =3D (UINT16 *)Ghcb->SharedBuffer; + SignByte =3D ((*Data & BIT15) !=3D 0) ? 0xFF : 0x00; + } + + Register =3D GetRegisterPointer (Regs, InstructionData->Ext.ModRm.Re= g); + SetMem (Register, (UINTN)(1 << InstructionData->DataSize), SignByte); + CopyMem (Register, Ghcb->SharedBuffer, Bytes); + break; + + default: + DEBUG ((DEBUG_ERROR, "Invalid MMIO opcode (%x)\n", OpCode)); + Status =3D GP_EXCEPTION; + ASSERT (FALSE); + } + + return Status; +} + +/** + Handle a MWAIT event. + + Use the VMGEXIT instruction to handle a MWAIT event. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation + Block + @param[in, out] Regs x64 processor context + @param[in] InstructionData Instruction parsing context + + @retval 0 Event handled successfully + @return New exception value to propagate + +**/ +STATIC +UINT64 +MwaitExit ( + IN OUT GHCB *Ghcb, + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + DecodeModRm (Regs, InstructionData); + + Ghcb->SaveArea.Rax =3D Regs->Rax; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbRax); + Ghcb->SaveArea.Rcx =3D Regs->Rcx; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbRcx); + + return CcExitLibVmgExit (Ghcb, SVM_EXIT_MWAIT, 0, 0); +} + +/** + Handle a MONITOR event. + + Use the VMGEXIT instruction to handle a MONITOR event. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation + Block + @param[in, out] Regs x64 processor context + @param[in] InstructionData Instruction parsing context + + @retval 0 Event handled successfully + @return New exception value to propagate + +**/ +STATIC +UINT64 +MonitorExit ( + IN OUT GHCB *Ghcb, + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + DecodeModRm (Regs, InstructionData); + + Ghcb->SaveArea.Rax =3D Regs->Rax; // Identity mapped, so VA =3D PA + CcExitLibVmgSetOffsetValid (Ghcb, GhcbRax); + Ghcb->SaveArea.Rcx =3D Regs->Rcx; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbRcx); + Ghcb->SaveArea.Rdx =3D Regs->Rdx; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbRdx); + + return CcExitLibVmgExit (Ghcb, SVM_EXIT_MONITOR, 0, 0); +} + +/** + Handle a WBINVD event. + + Use the VMGEXIT instruction to handle a WBINVD event. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation + Block + @param[in, out] Regs x64 processor context + @param[in] InstructionData Instruction parsing context + + @retval 0 Event handled successfully + @return New exception value to propagate + +**/ +STATIC +UINT64 +WbinvdExit ( + IN OUT GHCB *Ghcb, + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + return CcExitLibVmgExit (Ghcb, SVM_EXIT_WBINVD, 0, 0); +} + +/** + Handle a RDTSCP event. + + Use the VMGEXIT instruction to handle a RDTSCP event. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation + Block + @param[in, out] Regs x64 processor context + @param[in] InstructionData Instruction parsing context + + @retval 0 Event handled successfully + @return New exception value to propagate + +**/ +STATIC +UINT64 +RdtscpExit ( + IN OUT GHCB *Ghcb, + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + UINT64 Status; + + DecodeModRm (Regs, InstructionData); + + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_RDTSCP, 0, 0); + if (Status !=3D 0) { + return Status; + } + + if (!CcExitLibVmgIsOffsetValid (Ghcb, GhcbRax) || + !CcExitLibVmgIsOffsetValid (Ghcb, GhcbRcx) || + !CcExitLibVmgIsOffsetValid (Ghcb, GhcbRdx)) + { + return UnsupportedExit (Ghcb, Regs, InstructionData); + } + + Regs->Rax =3D Ghcb->SaveArea.Rax; + Regs->Rcx =3D Ghcb->SaveArea.Rcx; + Regs->Rdx =3D Ghcb->SaveArea.Rdx; + + return 0; +} + +/** + Handle a VMMCALL event. + + Use the VMGEXIT instruction to handle a VMMCALL event. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation + Block + @param[in, out] Regs x64 processor context + @param[in] InstructionData Instruction parsing context + + @retval 0 Event handled successfully + @return New exception value to propagate + +**/ +STATIC +UINT64 +VmmCallExit ( + IN OUT GHCB *Ghcb, + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + UINT64 Status; + + DecodeModRm (Regs, InstructionData); + + Ghcb->SaveArea.Rax =3D Regs->Rax; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbRax); + Ghcb->SaveArea.Cpl =3D (UINT8)(Regs->Cs & 0x3); + CcExitLibVmgSetOffsetValid (Ghcb, GhcbCpl); + + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_VMMCALL, 0, 0); + if (Status !=3D 0) { + return Status; + } + + if (!CcExitLibVmgIsOffsetValid (Ghcb, GhcbRax)) { + return UnsupportedExit (Ghcb, Regs, InstructionData); + } + + Regs->Rax =3D Ghcb->SaveArea.Rax; + + return 0; +} + +/** + Handle an MSR event. + + Use the VMGEXIT instruction to handle either a RDMSR or WRMSR event. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation + Block + @param[in, out] Regs x64 processor context + @param[in] InstructionData Instruction parsing context + + @retval 0 Event handled successfully + @return New exception value to propagate + +**/ +STATIC +UINT64 +MsrExit ( + IN OUT GHCB *Ghcb, + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + UINT64 ExitInfo1, Status; + + ExitInfo1 =3D 0; + + switch (*(InstructionData->OpCodes + 1)) { + case 0x30: // WRMSR + ExitInfo1 =3D 1; + Ghcb->SaveArea.Rax =3D Regs->Rax; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbRax); + Ghcb->SaveArea.Rdx =3D Regs->Rdx; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbRdx); + // + // fall through + // + case 0x32: // RDMSR + Ghcb->SaveArea.Rcx =3D Regs->Rcx; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbRcx); + break; + default: + return UnsupportedExit (Ghcb, Regs, InstructionData); + } + + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_MSR, ExitInfo1, 0); + if (Status !=3D 0) { + return Status; + } + + if (ExitInfo1 =3D=3D 0) { + if (!CcExitLibVmgIsOffsetValid (Ghcb, GhcbRax) || + !CcExitLibVmgIsOffsetValid (Ghcb, GhcbRdx)) + { + return UnsupportedExit (Ghcb, Regs, InstructionData); + } + + Regs->Rax =3D Ghcb->SaveArea.Rax; + Regs->Rdx =3D Ghcb->SaveArea.Rdx; + } + + return 0; +} + +/** + Build the IOIO event information. + + The IOIO event information identifies the type of IO operation to be per= formed + by the hypervisor. Build this information based on the instruction data. + + @param[in] Regs x64 processor context + @param[in, out] InstructionData Instruction parsing context + + @return IOIO event information value + +**/ +STATIC +UINT64 +IoioExitInfo ( + IN EFI_SYSTEM_CONTEXT_X64 *Regs, + IN OUT SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + UINT64 ExitInfo; + + ExitInfo =3D 0; + + switch (*(InstructionData->OpCodes)) { + // + // INS opcodes + // + case 0x6C: + case 0x6D: + ExitInfo |=3D IOIO_TYPE_INS; + ExitInfo |=3D IOIO_SEG_ES; + ExitInfo |=3D ((Regs->Rdx & 0xffff) << 16); + break; + + // + // OUTS opcodes + // + case 0x6E: + case 0x6F: + ExitInfo |=3D IOIO_TYPE_OUTS; + ExitInfo |=3D IOIO_SEG_DS; + ExitInfo |=3D ((Regs->Rdx & 0xffff) << 16); + break; + + // + // IN immediate opcodes + // + case 0xE4: + case 0xE5: + InstructionData->ImmediateSize =3D 1; + InstructionData->End++; + ExitInfo |=3D IOIO_TYPE_IN; + ExitInfo |=3D ((*(InstructionData->OpCodes + 1)) << 16); + break; + + // + // OUT immediate opcodes + // + case 0xE6: + case 0xE7: + InstructionData->ImmediateSize =3D 1; + InstructionData->End++; + ExitInfo |=3D IOIO_TYPE_OUT; + ExitInfo |=3D ((*(InstructionData->OpCodes + 1)) << 16) | IOIO_TYPE_= OUT; + break; + + // + // IN register opcodes + // + case 0xEC: + case 0xED: + ExitInfo |=3D IOIO_TYPE_IN; + ExitInfo |=3D ((Regs->Rdx & 0xffff) << 16); + break; + + // + // OUT register opcodes + // + case 0xEE: + case 0xEF: + ExitInfo |=3D IOIO_TYPE_OUT; + ExitInfo |=3D ((Regs->Rdx & 0xffff) << 16); + break; + + default: + return 0; + } + + switch (*(InstructionData->OpCodes)) { + // + // Single-byte opcodes + // + case 0x6C: + case 0x6E: + case 0xE4: + case 0xE6: + case 0xEC: + case 0xEE: + ExitInfo |=3D IOIO_DATA_8; + break; + + // + // Length determined by instruction parsing + // + default: + ExitInfo |=3D (InstructionData->DataSize =3D=3D Size16Bits) ? IOIO_D= ATA_16 + : IOIO_DATA_32; + } + + switch (InstructionData->AddrSize) { + case Size16Bits: + ExitInfo |=3D IOIO_ADDR_16; + break; + + case Size32Bits: + ExitInfo |=3D IOIO_ADDR_32; + break; + + case Size64Bits: + ExitInfo |=3D IOIO_ADDR_64; + break; + + default: + break; + } + + if (InstructionData->RepMode !=3D 0) { + ExitInfo |=3D IOIO_REP; + } + + return ExitInfo; +} + +/** + Handle an IOIO event. + + Use the VMGEXIT instruction to handle an IOIO event. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation + Block + @param[in, out] Regs x64 processor context + @param[in] InstructionData Instruction parsing context + + @retval 0 Event handled successfully + @return New exception value to propagate + +**/ +STATIC +UINT64 +IoioExit ( + IN OUT GHCB *Ghcb, + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + UINT64 ExitInfo1, ExitInfo2, Status; + BOOLEAN IsString; + + ExitInfo1 =3D IoioExitInfo (Regs, InstructionData); + if (ExitInfo1 =3D=3D 0) { + return UnsupportedExit (Ghcb, Regs, InstructionData); + } + + IsString =3D ((ExitInfo1 & IOIO_TYPE_STR) !=3D 0) ? TRUE : FALSE; + if (IsString) { + UINTN IoBytes, VmgExitBytes; + UINTN GhcbCount, OpCount; + + Status =3D 0; + + IoBytes =3D IOIO_DATA_BYTES (ExitInfo1); + GhcbCount =3D sizeof (Ghcb->SharedBuffer) / IoBytes; + + OpCount =3D ((ExitInfo1 & IOIO_REP) !=3D 0) ? Regs->Rcx : 1; + while (OpCount !=3D 0) { + ExitInfo2 =3D MIN (OpCount, GhcbCount); + VmgExitBytes =3D ExitInfo2 * IoBytes; + + if ((ExitInfo1 & IOIO_TYPE_IN) =3D=3D 0) { + CopyMem (Ghcb->SharedBuffer, (VOID *)Regs->Rsi, VmgExitBytes); + Regs->Rsi +=3D VmgExitBytes; + } + + Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbSwScratch); + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_IOIO_PROT, ExitInfo1, Ex= itInfo2); + if (Status !=3D 0) { + return Status; + } + + if ((ExitInfo1 & IOIO_TYPE_IN) !=3D 0) { + CopyMem ((VOID *)Regs->Rdi, Ghcb->SharedBuffer, VmgExitBytes); + Regs->Rdi +=3D VmgExitBytes; + } + + if ((ExitInfo1 & IOIO_REP) !=3D 0) { + Regs->Rcx -=3D ExitInfo2; + } + + OpCount -=3D ExitInfo2; + } + } else { + if ((ExitInfo1 & IOIO_TYPE_IN) !=3D 0) { + Ghcb->SaveArea.Rax =3D 0; + } else { + CopyMem (&Ghcb->SaveArea.Rax, &Regs->Rax, IOIO_DATA_BYTES (ExitInfo1= )); + } + + CcExitLibVmgSetOffsetValid (Ghcb, GhcbRax); + + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_IOIO_PROT, ExitInfo1, 0); + if (Status !=3D 0) { + return Status; + } + + if ((ExitInfo1 & IOIO_TYPE_IN) !=3D 0) { + if (!CcExitLibVmgIsOffsetValid (Ghcb, GhcbRax)) { + return UnsupportedExit (Ghcb, Regs, InstructionData); + } + + CopyMem (&Regs->Rax, &Ghcb->SaveArea.Rax, IOIO_DATA_BYTES (ExitInfo1= )); + } + } + + return 0; +} + +/** + Handle a INVD event. + + Use the VMGEXIT instruction to handle a INVD event. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation + Block + @param[in, out] Regs x64 processor context + @param[in] InstructionData Instruction parsing context + + @retval 0 Event handled successfully + @return New exception value to propagate + +**/ +STATIC +UINT64 +InvdExit ( + IN OUT GHCB *Ghcb, + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + return CcExitLibVmgExit (Ghcb, SVM_EXIT_INVD, 0, 0); +} + +/** + Fetch CPUID leaf/function via hypervisor/VMGEXIT. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communicati= on + Block + @param[in] EaxIn EAX input for cpuid instruction + @param[in] EcxIn ECX input for cpuid instruction + @param[in] Xcr0In XCR0 at time of cpuid instruction + @param[in, out] Eax Pointer to store leaf's EAX value + @param[in, out] Ebx Pointer to store leaf's EBX value + @param[in, out] Ecx Pointer to store leaf's ECX value + @param[in, out] Edx Pointer to store leaf's EDX value + @param[in, out] Status Pointer to store status from VMGEXIT (alway= s 0 + unless return value indicates failure) + @param[in, out] Unsupported Pointer to store indication of unsupported + VMGEXIT (always false unless return value + indicates failure) + + @retval TRUE CPUID leaf fetch successfully. + @retval FALSE Error occurred while fetching CPUID leaf. C= allers + should Status and Unsupported and handle + accordingly if they indicate a more precise + error condition. + +**/ +STATIC +BOOLEAN +GetCpuidHyp ( + IN OUT GHCB *Ghcb, + IN UINT32 EaxIn, + IN UINT32 EcxIn, + IN UINT64 XCr0, + IN OUT UINT32 *Eax, + IN OUT UINT32 *Ebx, + IN OUT UINT32 *Ecx, + IN OUT UINT32 *Edx, + IN OUT UINT64 *Status, + IN OUT BOOLEAN *UnsupportedExit + ) +{ + *UnsupportedExit =3D FALSE; + Ghcb->SaveArea.Rax =3D EaxIn; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbRax); + Ghcb->SaveArea.Rcx =3D EcxIn; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbRcx); + if (EaxIn =3D=3D CPUID_EXTENDED_STATE) { + Ghcb->SaveArea.XCr0 =3D XCr0; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbXCr0); + } + + *Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_CPUID, 0, 0); + if (*Status !=3D 0) { + return FALSE; + } + + if (!CcExitLibVmgIsOffsetValid (Ghcb, GhcbRax) || + !CcExitLibVmgIsOffsetValid (Ghcb, GhcbRbx) || + !CcExitLibVmgIsOffsetValid (Ghcb, GhcbRcx) || + !CcExitLibVmgIsOffsetValid (Ghcb, GhcbRdx)) + { + *UnsupportedExit =3D TRUE; + return FALSE; + } + + if (Eax) { + *Eax =3D (UINT32)(UINTN)Ghcb->SaveArea.Rax; + } + + if (Ebx) { + *Ebx =3D (UINT32)(UINTN)Ghcb->SaveArea.Rbx; + } + + if (Ecx) { + *Ecx =3D (UINT32)(UINTN)Ghcb->SaveArea.Rcx; + } + + if (Edx) { + *Edx =3D (UINT32)(UINTN)Ghcb->SaveArea.Rdx; + } + + return TRUE; +} + +/** + Check if SEV-SNP enabled. + + @retval TRUE SEV-SNP is enabled. + @retval FALSE SEV-SNP is disabled. + +**/ +STATIC +BOOLEAN +SnpEnabled ( + VOID + ) +{ + MSR_SEV_STATUS_REGISTER Msr; + + Msr.Uint32 =3D AsmReadMsr32 (MSR_SEV_STATUS); + + return !!Msr.Bits.SevSnpBit; +} + +/** + Calculate the total XSAVE area size for enabled XSAVE areas + + @param[in] XFeaturesEnabled Bit-mask of enabled XSAVE features/are= as as + indicated by XCR0/MSR_IA32_XSS bits + @param[in] XSaveBaseSize Base/legacy XSAVE area size (e.g. when + XCR0 is 1) + @param[in, out] XSaveSize Pointer to storage for calculated XSAV= E area + size + @param[in] Compacted Whether or not the calculation is for = the + normal XSAVE area size (leaf 0xD,0x0,E= BX) or + compacted XSAVE area size (leaf 0xD,0x= 1,EBX) + + + @retval TRUE XSAVE size calculation was successful. + @retval FALSE XSAVE size calculation was unsuccessfu= l. +**/ +STATIC +BOOLEAN +GetCpuidXSaveSize ( + IN UINT64 XFeaturesEnabled, + IN UINT32 XSaveBaseSize, + IN OUT UINT32 *XSaveSize, + IN BOOLEAN Compacted + ) +{ + SEV_SNP_CPUID_INFO *CpuidInfo; + UINT64 XFeaturesFound =3D 0; + UINT32 Idx; + + *XSaveSize =3D XSaveBaseSize; + CpuidInfo =3D (SEV_SNP_CPUID_INFO *)(UINT64)PcdGet32 (PcdOvmfCpuidBase); + + for (Idx =3D 0; Idx < CpuidInfo->Count; Idx++) { + SEV_SNP_CPUID_FUNCTION *CpuidFn =3D &CpuidInfo->function[Idx]; + + if (!((CpuidFn->EaxIn =3D=3D 0xD) && + ((CpuidFn->EcxIn =3D=3D 0) || (CpuidFn->EcxIn =3D=3D 1)))) + { + continue; + } + + if (XFeaturesFound & (1ULL << CpuidFn->EcxIn) || + !(XFeaturesEnabled & (1ULL << CpuidFn->EcxIn))) + { + continue; + } + + XFeaturesFound |=3D (1ULL << CpuidFn->EcxIn); + if (Compacted) { + *XSaveSize +=3D CpuidFn->Eax; + } else { + *XSaveSize =3D MAX (*XSaveSize, CpuidFn->Eax + CpuidFn->Ebx); + } + } + + /* + * Either the guest set unsupported XCR0/XSS bits, or the corresponding + * entries in the CPUID table were not present. This is an invalid state. + */ + if (XFeaturesFound !=3D (XFeaturesEnabled & ~3UL)) { + return FALSE; + } + + return TRUE; +} + +/** + Check if a CPUID leaf/function is indexed via ECX sub-leaf/sub-function + + @param[in] EaxIn EAX input for cpuid instruction + + @retval FALSE cpuid leaf/function is not indexed by ECX i= nput + @retval TRUE cpuid leaf/function is indexed by ECX input + +**/ +STATIC +BOOLEAN +IsFunctionIndexed ( + IN UINT32 EaxIn + ) +{ + switch (EaxIn) { + case CPUID_CACHE_PARAMS: + case CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS: + case CPUID_EXTENDED_TOPOLOGY: + case CPUID_EXTENDED_STATE: + case CPUID_INTEL_RDT_MONITORING: + case CPUID_INTEL_RDT_ALLOCATION: + case CPUID_INTEL_SGX: + case CPUID_INTEL_PROCESSOR_TRACE: + case CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS: + case CPUID_V2_EXTENDED_TOPOLOGY: + case 0x8000001D: /* Cache Topology Information */ + return TRUE; + } + + return FALSE; +} + +/** + Fetch CPUID leaf/function via SEV-SNP CPUID table. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communicati= on + Block + @param[in] EaxIn EAX input for cpuid instruction + @param[in] EcxIn ECX input for cpuid instruction + @param[in] Xcr0In XCR0 at time of cpuid instruction + @param[in, out] Eax Pointer to store leaf's EAX value + @param[in, out] Ebx Pointer to store leaf's EBX value + @param[in, out] Ecx Pointer to store leaf's ECX value + @param[in, out] Edx Pointer to store leaf's EDX value + @param[in, out] Status Pointer to store status from VMGEXIT (alway= s 0 + unless return value indicates failure) + @param[in, out] Unsupported Pointer to store indication of unsupported + VMGEXIT (always false unless return value + indicates failure) + + @retval TRUE CPUID leaf fetch successfully. + @retval FALSE Error occurred while fetching CPUID leaf. C= allers + should Status and Unsupported and handle + accordingly if they indicate a more precise + error condition. + +**/ +STATIC +BOOLEAN +GetCpuidFw ( + IN OUT GHCB *Ghcb, + IN UINT32 EaxIn, + IN UINT32 EcxIn, + IN UINT64 XCr0, + IN OUT UINT32 *Eax, + IN OUT UINT32 *Ebx, + IN OUT UINT32 *Ecx, + IN OUT UINT32 *Edx, + IN OUT UINT64 *Status, + IN OUT BOOLEAN *Unsupported + ) +{ + SEV_SNP_CPUID_INFO *CpuidInfo; + BOOLEAN Found; + UINT32 Idx; + + CpuidInfo =3D (SEV_SNP_CPUID_INFO *)(UINT64)PcdGet32 (PcdOvmfCpuidBase); + Found =3D FALSE; + + for (Idx =3D 0; Idx < CpuidInfo->Count; Idx++) { + SEV_SNP_CPUID_FUNCTION *CpuidFn =3D &CpuidInfo->function[Idx]; + + if (CpuidFn->EaxIn !=3D EaxIn) { + continue; + } + + if (IsFunctionIndexed (CpuidFn->EaxIn) && (CpuidFn->EcxIn !=3D EcxIn))= { + continue; + } + + *Eax =3D CpuidFn->Eax; + *Ebx =3D CpuidFn->Ebx; + *Ecx =3D CpuidFn->Ecx; + *Edx =3D CpuidFn->Edx; + + Found =3D TRUE; + break; + } + + if (!Found) { + *Eax =3D *Ebx =3D *Ecx =3D *Edx =3D 0; + goto Out; + } + + if (EaxIn =3D=3D CPUID_VERSION_INFO) { + IA32_CR4 Cr4; + UINT32 Ebx2; + UINT32 Edx2; + + if (!GetCpuidHyp ( + Ghcb, + EaxIn, + EcxIn, + XCr0, + NULL, + &Ebx2, + NULL, + &Edx2, + Status, + Unsupported + )) + { + return FALSE; + } + + /* initial APIC ID */ + *Ebx =3D (*Ebx & 0x00FFFFFF) | (Ebx2 & 0xFF000000); + /* APIC enabled bit */ + *Edx =3D (*Edx & ~BIT9) | (Edx2 & BIT9); + /* OSXSAVE enabled bit */ + Cr4.UintN =3D AsmReadCr4 (); + *Ecx =3D (Cr4.Bits.OSXSAVE) ? (*Ecx & ~BIT27) | (*Ecx & BIT27) + : (*Ecx & ~BIT27); + } else if (EaxIn =3D=3D CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS) { + IA32_CR4 Cr4; + + Cr4.UintN =3D AsmReadCr4 (); + /* OSPKE enabled bit */ + *Ecx =3D (Cr4.Bits.PKE) ? (*Ecx | BIT4) : (*Ecx & ~BIT4); + } else if (EaxIn =3D=3D CPUID_EXTENDED_TOPOLOGY) { + if (!GetCpuidHyp ( + Ghcb, + EaxIn, + EcxIn, + XCr0, + NULL, + NULL, + NULL, + Edx, + Status, + Unsupported + )) + { + return FALSE; + } + } else if ((EaxIn =3D=3D CPUID_EXTENDED_STATE) && ((EcxIn =3D=3D 0) || (= EcxIn =3D=3D 1))) { + MSR_IA32_XSS_REGISTER XssMsr; + BOOLEAN Compacted; + UINT32 XSaveSize; + + XssMsr.Uint64 =3D 0; + Compacted =3D FALSE; + if (EcxIn =3D=3D 1) { + /* + * The PPR and APM aren't clear on what size should be encoded in + * 0xD:0x1:EBX when compaction is not enabled by either XSAVEC or + * XSAVES, as these are generally fixed to 1 on real CPUs. Report + * this undefined case as an error. + */ + if (!(*Eax & (BIT3 | BIT1))) { + /* (XSAVES | XSAVEC) */ + return FALSE; + } + + Compacted =3D TRUE; + XssMsr.Uint64 =3D AsmReadMsr64 (MSR_IA32_XSS); + } + + if (!GetCpuidXSaveSize ( + XCr0 | XssMsr.Uint64, + *Ebx, + &XSaveSize, + Compacted + )) + { + return FALSE; + } + + *Ebx =3D XSaveSize; + } else if (EaxIn =3D=3D 0x8000001E) { + UINT32 Ebx2; + UINT32 Ecx2; + + /* extended APIC ID */ + if (!GetCpuidHyp ( + Ghcb, + EaxIn, + EcxIn, + XCr0, + Eax, + &Ebx2, + &Ecx2, + NULL, + Status, + Unsupported + )) + { + return FALSE; + } + + /* compute ID */ + *Ebx =3D (*Ebx & 0xFFFFFF00) | (Ebx2 & 0x000000FF); + /* node ID */ + *Ecx =3D (*Ecx & 0xFFFFFF00) | (Ecx2 & 0x000000FF); + } + +Out: + *Status =3D 0; + *Unsupported =3D FALSE; + return TRUE; +} + +/** + Handle a CPUID event. + + Use VMGEXIT instruction or CPUID table to handle a CPUID event. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation + Block + @param[in, out] Regs x64 processor context + @param[in] InstructionData Instruction parsing context + + @retval 0 Event handled successfully + @return New exception value to propagate + +**/ +STATIC +UINT64 +CpuidExit ( + IN OUT GHCB *Ghcb, + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + BOOLEAN Unsupported; + UINT64 Status; + UINT32 EaxIn; + UINT32 EcxIn; + UINT64 XCr0; + UINT32 Eax; + UINT32 Ebx; + UINT32 Ecx; + UINT32 Edx; + + EaxIn =3D (UINT32)(UINTN)Regs->Rax; + EcxIn =3D (UINT32)(UINTN)Regs->Rcx; + + if (EaxIn =3D=3D CPUID_EXTENDED_STATE) { + IA32_CR4 Cr4; + + Cr4.UintN =3D AsmReadCr4 (); + Ghcb->SaveArea.XCr0 =3D (Cr4.Bits.OSXSAVE =3D=3D 1) ? AsmXGetBv (0) : = 1; + XCr0 =3D (Cr4.Bits.OSXSAVE =3D=3D 1) ? AsmXGetBv (0) : = 1; + } + + if (SnpEnabled ()) { + if (!GetCpuidFw ( + Ghcb, + EaxIn, + EcxIn, + XCr0, + &Eax, + &Ebx, + &Ecx, + &Edx, + &Status, + &Unsupported + )) + { + goto CpuidFail; + } + } else { + if (!GetCpuidHyp ( + Ghcb, + EaxIn, + EcxIn, + XCr0, + &Eax, + &Ebx, + &Ecx, + &Edx, + &Status, + &Unsupported + )) + { + goto CpuidFail; + } + } + + Regs->Rax =3D Eax; + Regs->Rbx =3D Ebx; + Regs->Rcx =3D Ecx; + Regs->Rdx =3D Edx; + + return 0; + +CpuidFail: + if (Unsupported) { + return UnsupportedExit (Ghcb, Regs, InstructionData); + } + + return Status; +} + +/** + Handle a RDPMC event. + + Use the VMGEXIT instruction to handle a RDPMC event. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation + Block + @param[in, out] Regs x64 processor context + @param[in] InstructionData Instruction parsing context + + @retval 0 Event handled successfully + @return New exception value to propagate + +**/ +STATIC +UINT64 +RdpmcExit ( + IN OUT GHCB *Ghcb, + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + UINT64 Status; + + Ghcb->SaveArea.Rcx =3D Regs->Rcx; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbRcx); + + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_RDPMC, 0, 0); + if (Status !=3D 0) { + return Status; + } + + if (!CcExitLibVmgIsOffsetValid (Ghcb, GhcbRax) || + !CcExitLibVmgIsOffsetValid (Ghcb, GhcbRdx)) + { + return UnsupportedExit (Ghcb, Regs, InstructionData); + } + + Regs->Rax =3D Ghcb->SaveArea.Rax; + Regs->Rdx =3D Ghcb->SaveArea.Rdx; + + return 0; +} + +/** + Handle a RDTSC event. + + Use the VMGEXIT instruction to handle a RDTSC event. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation + Block + @param[in, out] Regs x64 processor context + @param[in] InstructionData Instruction parsing context + + @retval 0 Event handled successfully + @return New exception value to propagate + +**/ +STATIC +UINT64 +RdtscExit ( + IN OUT GHCB *Ghcb, + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + UINT64 Status; + + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_RDTSC, 0, 0); + if (Status !=3D 0) { + return Status; + } + + if (!CcExitLibVmgIsOffsetValid (Ghcb, GhcbRax) || + !CcExitLibVmgIsOffsetValid (Ghcb, GhcbRdx)) + { + return UnsupportedExit (Ghcb, Regs, InstructionData); + } + + Regs->Rax =3D Ghcb->SaveArea.Rax; + Regs->Rdx =3D Ghcb->SaveArea.Rdx; + + return 0; +} + +/** + Handle a DR7 register write event. + + Use the VMGEXIT instruction to handle a DR7 write event. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation + Block + @param[in, out] Regs x64 processor context + @param[in] InstructionData Instruction parsing context + + @retval 0 Event handled successfully + @return New exception value to propagate + +**/ +STATIC +UINT64 +Dr7WriteExit ( + IN OUT GHCB *Ghcb, + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + SEV_ES_INSTRUCTION_OPCODE_EXT *Ext; + SEV_ES_PER_CPU_DATA *SevEsData; + UINT64 *Register; + UINT64 Status; + + Ext =3D &InstructionData->Ext; + SevEsData =3D (SEV_ES_PER_CPU_DATA *)(Ghcb + 1); + + DecodeModRm (Regs, InstructionData); + + // + // MOV DRn always treats MOD =3D=3D 3 no matter how encoded + // + Register =3D GetRegisterPointer (Regs, Ext->ModRm.Rm); + + // + // Using a value of 0 for ExitInfo1 means RAX holds the value + // + Ghcb->SaveArea.Rax =3D *Register; + CcExitLibVmgSetOffsetValid (Ghcb, GhcbRax); + + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_DR7_WRITE, 0, 0); + if (Status !=3D 0) { + return Status; + } + + SevEsData->Dr7 =3D *Register; + SevEsData->Dr7Cached =3D 1; + + return 0; +} + +/** + Handle a DR7 register read event. + + Use the VMGEXIT instruction to handle a DR7 read event. + + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation + Block + @param[in, out] Regs x64 processor context + @param[in] InstructionData Instruction parsing context + + @retval 0 Event handled successfully + +**/ +STATIC +UINT64 +Dr7ReadExit ( + IN OUT GHCB *Ghcb, + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + SEV_ES_INSTRUCTION_OPCODE_EXT *Ext; + SEV_ES_PER_CPU_DATA *SevEsData; + UINT64 *Register; + + Ext =3D &InstructionData->Ext; + SevEsData =3D (SEV_ES_PER_CPU_DATA *)(Ghcb + 1); + + DecodeModRm (Regs, InstructionData); + + // + // MOV DRn always treats MOD =3D=3D 3 no matter how encoded + // + Register =3D GetRegisterPointer (Regs, Ext->ModRm.Rm); + + // + // If there is a cached valued for DR7, return that. Otherwise return the + // DR7 standard reset value of 0x400 (no debug breakpoints set). + // + *Register =3D (SevEsData->Dr7Cached =3D=3D 1) ? SevEsData->Dr7 : 0x400; + + return 0; +} + +/** + Handle a #VC exception. + + Performs the necessary processing to handle a #VC exception. + + @param[in, out] Ghcb Pointer to the GHCB + @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et + as value to use on error. + @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT + + @retval EFI_SUCCESS Exception handled + @retval EFI_UNSUPPORTED #VC not supported, (new) exception value= to + propagate provided + @retval EFI_PROTOCOL_ERROR #VC handling failed, (new) exception val= ue to + propagate provided + +**/ +EFI_STATUS +EFIAPI +CcExitLibInternalVmgExitHandleVc ( + IN OUT GHCB *Ghcb, + IN OUT EFI_EXCEPTION_TYPE *ExceptionType, + IN OUT EFI_SYSTEM_CONTEXT SystemContext + ) +{ + EFI_SYSTEM_CONTEXT_X64 *Regs; + NAE_EXIT NaeExit; + SEV_ES_INSTRUCTION_DATA InstructionData; + UINT64 ExitCode, Status; + EFI_STATUS VcRet; + BOOLEAN InterruptState; + + VcRet =3D EFI_SUCCESS; + + Regs =3D SystemContext.SystemContextX64; + + CcExitLibVmgInit (Ghcb, &InterruptState); + + ExitCode =3D Regs->ExceptionData; + switch (ExitCode) { + case SVM_EXIT_DR7_READ: + NaeExit =3D Dr7ReadExit; + break; + + case SVM_EXIT_DR7_WRITE: + NaeExit =3D Dr7WriteExit; + break; + + case SVM_EXIT_RDTSC: + NaeExit =3D RdtscExit; + break; + + case SVM_EXIT_RDPMC: + NaeExit =3D RdpmcExit; + break; + + case SVM_EXIT_CPUID: + NaeExit =3D CpuidExit; + break; + + case SVM_EXIT_INVD: + NaeExit =3D InvdExit; + break; + + case SVM_EXIT_IOIO_PROT: + NaeExit =3D IoioExit; + break; + + case SVM_EXIT_MSR: + NaeExit =3D MsrExit; + break; + + case SVM_EXIT_VMMCALL: + NaeExit =3D VmmCallExit; + break; + + case SVM_EXIT_RDTSCP: + NaeExit =3D RdtscpExit; + break; + + case SVM_EXIT_WBINVD: + NaeExit =3D WbinvdExit; + break; + + case SVM_EXIT_MONITOR: + NaeExit =3D MonitorExit; + break; + + case SVM_EXIT_MWAIT: + NaeExit =3D MwaitExit; + break; + + case SVM_EXIT_NPF: + NaeExit =3D MmioExit; + break; + + default: + NaeExit =3D UnsupportedExit; + } + + InitInstructionData (&InstructionData, Ghcb, Regs); + + Status =3D NaeExit (Ghcb, Regs, &InstructionData); + if (Status =3D=3D 0) { + Regs->Rip +=3D InstructionLength (&InstructionData); + } else { + GHCB_EVENT_INJECTION Event; + + Event.Uint64 =3D Status; + if (Event.Elements.ErrorCodeValid !=3D 0) { + Regs->ExceptionData =3D Event.Elements.ErrorCode; + } else { + Regs->ExceptionData =3D 0; + } + + *ExceptionType =3D Event.Elements.Vector; + + VcRet =3D EFI_PROTOCOL_ERROR; + } + + CcExitLibVmgDone (Ghcb, InterruptState); + + return VcRet; +} + +/** + Routine to allow ASSERT from within #VC. + + @param[in, out] SevEsData Pointer to the per-CPU data + +**/ +VOID +EFIAPI +CcExitLibVmgExitIssueAssert ( + IN OUT SEV_ES_PER_CPU_DATA *SevEsData + ) +{ + // + // Progress will be halted, so set VcCount to allow for ASSERT output + // to be seen. + // + SevEsData->VcCount =3D 0; + + ASSERT (FALSE); + CpuDeadLoop (); +} diff --git a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.h b/OvmfPkg/Library/= CcExitLib/CcExitVcHandler.h new file mode 100644 index 000000000000..d8084130fae4 --- /dev/null +++ b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.h @@ -0,0 +1,53 @@ +/** @file + X64 #VC Exception Handler functon header file. + + Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef CC_EXIT_VC_HANDLER_H_ +#define CC_EXIT_VC_HANDLER_H_ + +#include +#include +#include + +/** + Handle a #VC exception. + + Performs the necessary processing to handle a #VC exception. + + @param[in, out] Ghcb Pointer to the GHCB + @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et + as value to use on error. + @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT + + @retval EFI_SUCCESS Exception handled + @retval EFI_UNSUPPORTED #VC not supported, (new) exception value= to + propagate provided + @retval EFI_PROTOCOL_ERROR #VC handling failed, (new) exception val= ue to + propagate provided + +**/ +EFI_STATUS +EFIAPI +CcExitLibInternalVmgExitHandleVc ( + IN OUT GHCB *Ghcb, + IN OUT EFI_EXCEPTION_TYPE *ExceptionType, + IN OUT EFI_SYSTEM_CONTEXT SystemContext + ); + +/** + Routine to allow ASSERT from within #VC. + + @param[in, out] SevEsData Pointer to the per-CPU data + +**/ +VOID +EFIAPI +CcExitLibVmgExitIssueAssert ( + IN OUT SEV_ES_PER_CPU_DATA *SevEsData + ); + +#endif diff --git a/OvmfPkg/Library/CcExitLib/CcExitVeHandler.c b/OvmfPkg/Library/= CcExitLib/CcExitVeHandler.c new file mode 100644 index 000000000000..baafb64551ab --- /dev/null +++ b/OvmfPkg/Library/CcExitLib/CcExitVeHandler.c @@ -0,0 +1,577 @@ +/** @file + + Copyright (c) 2021, Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include "CcExitTd.h" +#include +#include +#include +#include + +typedef union { + struct { + UINT32 Eax; + UINT32 Edx; + } Regs; + UINT64 Val; +} MSR_DATA; + +typedef union { + UINT8 Val; + struct { + UINT8 B : 1; + UINT8 X : 1; + UINT8 R : 1; + UINT8 W : 1; + } Bits; +} REX; + +typedef union { + UINT8 Val; + struct { + UINT8 Rm : 3; + UINT8 Reg : 3; + UINT8 Mod : 2; + } Bits; +} MODRM; + +typedef struct { + UINT64 Regs[4]; +} CPUID_DATA; + +/** + Handle an CPUID event. + + Use the TDVMCALL instruction to handle cpuid #ve + + @param[in, out] Regs x64 processor context + @param[in] Veinfo VE Info + + @retval 0 Event handled successfully + @return New exception value to propagate +**/ +STATIC +UINT64 +EFIAPI +CpuIdExit ( + IN EFI_SYSTEM_CONTEXT_X64 *Regs, + IN TDCALL_VEINFO_RETURN_DATA *Veinfo + ) +{ + CPUID_DATA CpuIdData; + UINT64 Status; + + Status =3D CcExitLibTdVmCallCpuid (Regs->Rax, Regs->Rcx, &CpuIdData); + + if (Status =3D=3D 0) { + Regs->Rax =3D CpuIdData.Regs[0]; + Regs->Rbx =3D CpuIdData.Regs[1]; + Regs->Rcx =3D CpuIdData.Regs[2]; + Regs->Rdx =3D CpuIdData.Regs[3]; + } + + return Status; +} + +/** + Handle an IO event. + + Use the TDVMCALL instruction to handle either an IO read or an IO write. + + @param[in, out] Regs x64 processor context + @param[in] Veinfo VE Info + + @retval 0 Event handled successfully + @return New exception value to propagate +**/ +STATIC +UINT64 +EFIAPI +IoExit ( + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN TDCALL_VEINFO_RETURN_DATA *Veinfo + ) +{ + BOOLEAN Write; + UINTN Size; + UINTN Port; + UINT64 Val; + UINT64 RepCnt; + UINT64 Status; + + Val =3D 0; + Write =3D Veinfo->ExitQualification.Io.Direction ? FALSE : TRUE; + Size =3D Veinfo->ExitQualification.Io.Size + 1; + Port =3D Veinfo->ExitQualification.Io.Port; + + if (Veinfo->ExitQualification.Io.String) { + // + // If REP is set, get rep-cnt from Rcx + // + RepCnt =3D Veinfo->ExitQualification.Io.Rep ? Regs->Rcx : 1; + + while (RepCnt) { + Val =3D 0; + if (Write =3D=3D TRUE) { + CopyMem (&Val, (VOID *)Regs->Rsi, Size); + Regs->Rsi +=3D Size; + } + + Status =3D TdVmCall (EXIT_REASON_IO_INSTRUCTION, Size, Write, Port, = Val, (Write ? NULL : &Val)); + if (Status !=3D 0) { + break; + } + + if (Write =3D=3D FALSE) { + CopyMem ((VOID *)Regs->Rdi, &Val, Size); + Regs->Rdi +=3D Size; + } + + if (Veinfo->ExitQualification.Io.Rep) { + Regs->Rcx -=3D 1; + } + + RepCnt -=3D 1; + } + } else { + if (Write =3D=3D TRUE) { + CopyMem (&Val, (VOID *)&Regs->Rax, Size); + } + + Status =3D TdVmCall (EXIT_REASON_IO_INSTRUCTION, Size, Write, Port, Va= l, (Write ? NULL : &Val)); + if ((Status =3D=3D 0) && (Write =3D=3D FALSE)) { + CopyMem ((VOID *)&Regs->Rax, &Val, Size); + } + } + + return Status; +} + +/** + Handle an READ MSR event. + + Use the TDVMCALL instruction to handle msr read + + @param[in, out] Regs x64 processor context + @param[in] Veinfo VE Info + + @retval 0 Event handled successfully + @return New exception value to propagate +**/ +STATIC +UINT64 +ReadMsrExit ( + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN TDCALL_VEINFO_RETURN_DATA *Veinfo + ) +{ + MSR_DATA Data; + UINT64 Status; + + Status =3D TdVmCall (EXIT_REASON_MSR_READ, Regs->Rcx, 0, 0, 0, &Data); + if (Status =3D=3D 0) { + Regs->Rax =3D Data.Regs.Eax; + Regs->Rdx =3D Data.Regs.Edx; + } + + return Status; +} + +/** + Handle an WRITE MSR event. + + Use the TDVMCALL instruction to handle msr write + + @param[in, out] Regs x64 processor context + @param[in] Veinfo VE Info + + @retval 0 Event handled successfully + @return New exception value to propagate +**/ +STATIC +UINT64 +WriteMsrExit ( + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN TDCALL_VEINFO_RETURN_DATA *Veinfo + ) +{ + UINT64 Status; + MSR_DATA Data; + + Data.Regs.Eax =3D (UINT32)Regs->Rax; + Data.Regs.Edx =3D (UINT32)Regs->Rdx; + + Status =3D TdVmCall (EXIT_REASON_MSR_WRITE, Regs->Rcx, Data.Val, 0, 0, = NULL); + + return Status; +} + +STATIC +VOID +EFIAPI +TdxDecodeInstruction ( + IN UINT8 *Rip + ) +{ + UINTN i; + + DEBUG ((DEBUG_INFO, "TDX: #TD[EPT] instruction (%p):", Rip)); + for (i =3D 0; i < 15; i++) { + DEBUG ((DEBUG_INFO, "%02x:", Rip[i])); + } + + DEBUG ((DEBUG_INFO, "\n")); +} + +#define TDX_DECODER_BUG_ON(x) \ + if ((x)) { \ + TdxDecodeInstruction(Rip); \ + TdVmCall(TDVMCALL_HALT, 0, 0, 0, 0, 0); \ + } + +STATIC +UINT64 * +EFIAPI +GetRegFromContext ( + IN EFI_SYSTEM_CONTEXT_X64 *Regs, + IN UINTN RegIndex + ) +{ + switch (RegIndex) { + case 0: return &Regs->Rax; + break; + case 1: return &Regs->Rcx; + break; + case 2: return &Regs->Rdx; + break; + case 3: return &Regs->Rbx; + break; + case 4: return &Regs->Rsp; + break; + case 5: return &Regs->Rbp; + break; + case 6: return &Regs->Rsi; + break; + case 7: return &Regs->Rdi; + break; + case 8: return &Regs->R8; + break; + case 9: return &Regs->R9; + break; + case 10: return &Regs->R10; + break; + case 11: return &Regs->R11; + break; + case 12: return &Regs->R12; + break; + case 13: return &Regs->R13; + break; + case 14: return &Regs->R14; + break; + case 15: return &Regs->R15; + break; + } + + return NULL; +} + +/** + Handle an MMIO event. + + Use the TDVMCALL instruction to handle either an mmio read or an mmio wr= ite. + + @param[in, out] Regs x64 processor context + @param[in] Veinfo VE Info + + @retval 0 Event handled successfully + @return New exception value to propagate +**/ +STATIC +INTN +EFIAPI +MmioExit ( + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, + IN TDCALL_VEINFO_RETURN_DATA *Veinfo + ) +{ + UINT64 Status; + UINT32 MmioSize; + UINT32 RegSize; + UINT8 OpCode; + BOOLEAN SeenRex; + UINT64 *Reg; + UINT8 *Rip; + UINT64 Val; + UINT32 OpSize; + MODRM ModRm; + REX Rex; + TD_RETURN_DATA TdReturnData; + UINT8 Gpaw; + UINT64 TdSharedPageMask; + + Rip =3D (UINT8 *)Regs->Rip; + Val =3D 0; + Rex.Val =3D 0; + SeenRex =3D FALSE; + + Status =3D TdCall (TDCALL_TDINFO, 0, 0, 0, &TdReturnData); + if (Status =3D=3D TDX_EXIT_REASON_SUCCESS) { + Gpaw =3D (UINT8)(TdReturnData.TdInfo.Gpaw & 0x3f); + TdSharedPageMask =3D 1ULL << (Gpaw - 1); + } else { + DEBUG ((DEBUG_ERROR, "TDCALL failed with status=3D%llx\n", Status)); + return Status; + } + + if ((Veinfo->GuestPA & TdSharedPageMask) =3D=3D 0) { + DEBUG ((DEBUG_ERROR, "EPT-violation #VE on private memory is not allow= ed!")); + TdVmCall (TDVMCALL_HALT, 0, 0, 0, 0, 0); + CpuDeadLoop (); + } + + // + // Default to 32bit transfer + // + OpSize =3D 4; + + do { + OpCode =3D *Rip++; + if (OpCode =3D=3D 0x66) { + OpSize =3D 2; + } else if ((OpCode =3D=3D 0x64) || (OpCode =3D=3D 0x65) || (OpCode =3D= =3D 0x67)) { + continue; + } else if ((OpCode >=3D 0x40) && (OpCode <=3D 0x4f)) { + SeenRex =3D TRUE; + Rex.Val =3D OpCode; + } else { + break; + } + } while (TRUE); + + // + // We need to have at least 2 more bytes for this instruction + // + TDX_DECODER_BUG_ON (((UINT64)Rip - Regs->Rip) > 13); + + OpCode =3D *Rip++; + // + // Two-byte opecode, get next byte + // + if (OpCode =3D=3D 0x0F) { + OpCode =3D *Rip++; + } + + switch (OpCode) { + case 0x88: + case 0x8A: + case 0xB6: + MmioSize =3D 1; + break; + case 0xB7: + MmioSize =3D 2; + break; + default: + MmioSize =3D Rex.Bits.W ? 8 : OpSize; + break; + } + + /* Punt on AH/BH/CH/DH unless it shows up. */ + ModRm.Val =3D *Rip++; + TDX_DECODER_BUG_ON (MmioSize =3D=3D 1 && ModRm.Bits.Reg > 4 && !SeenRex = && OpCode !=3D 0xB6); + Reg =3D GetRegFromContext (Regs, ModRm.Bits.Reg | ((int)Rex.Bits.R << 3)= ); + TDX_DECODER_BUG_ON (!Reg); + + if (ModRm.Bits.Rm =3D=3D 4) { + ++Rip; /* SIB byte */ + } + + if ((ModRm.Bits.Mod =3D=3D 2) || ((ModRm.Bits.Mod =3D=3D 0) && (ModRm.Bi= ts.Rm =3D=3D 5))) { + Rip +=3D 4; /* DISP32 */ + } else if (ModRm.Bits.Mod =3D=3D 1) { + ++Rip; /* DISP8 */ + } + + switch (OpCode) { + case 0x88: + case 0x89: + CopyMem ((void *)&Val, Reg, MmioSize); + Status =3D TdVmCall (TDVMCALL_MMIO, MmioSize, 1, Veinfo->GuestPA, Va= l, 0); + break; + case 0xC7: + CopyMem ((void *)&Val, Rip, OpSize); + Status =3D TdVmCall (TDVMCALL_MMIO, MmioSize, 1, Veinfo->GuestPA, Va= l, 0); + Rip +=3D OpSize; + default: + // + // 32-bit write registers are zero extended to the full register + // Hence 'MOVZX r[32/64], r/m16' is + // hardcoded to reg size 8, and the straight MOV case has a reg + // size of 8 in the 32-bit read case. + // + switch (OpCode) { + case 0xB6: + RegSize =3D Rex.Bits.W ? 8 : OpSize; + break; + case 0xB7: + RegSize =3D 8; + break; + default: + RegSize =3D MmioSize =3D=3D 4 ? 8 : MmioSize; + break; + } + + Status =3D TdVmCall (TDVMCALL_MMIO, MmioSize, 0, Veinfo->GuestPA, 0,= &Val); + if (Status =3D=3D 0) { + ZeroMem (Reg, RegSize); + CopyMem (Reg, (void *)&Val, MmioSize); + } + } + + if (Status =3D=3D 0) { + TDX_DECODER_BUG_ON (((UINT64)Rip - Regs->Rip) > 15); + + // + // We change instruction length to reflect true size so handler can + // bump rip + // + Veinfo->ExitInstructionLength =3D (UINT32)((UINT64)Rip - Regs->Rip); + } + + return Status; +} + +/** + Handle a #VE exception. + + Performs the necessary processing to handle a #VE exception. + + @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et + as value to use on error. + @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT + + @retval EFI_SUCCESS Exception handled + @retval EFI_UNSUPPORTED #VE not supported, (new) exception value= to + propagate provided + @retval EFI_PROTOCOL_ERROR #VE handling failed, (new) exception val= ue to + propagate provided + +**/ +EFI_STATUS +EFIAPI +CcExitLibHandleVe ( + IN OUT EFI_EXCEPTION_TYPE *ExceptionType, + IN OUT EFI_SYSTEM_CONTEXT SystemContext + ) +{ + UINT64 Status; + TD_RETURN_DATA ReturnData; + EFI_SYSTEM_CONTEXT_X64 *Regs; + + Regs =3D SystemContext.SystemContextX64; + Status =3D TdCall (TDCALL_TDGETVEINFO, 0, 0, 0, &ReturnData); + ASSERT (Status =3D=3D 0); + if (Status !=3D 0) { + DEBUG ((DEBUG_ERROR, "#VE happened. TDGETVEINFO failed with Status =3D= 0x%llx\n", Status)); + TdVmCall (TDVMCALL_HALT, 0, 0, 0, 0, 0); + } + + switch (ReturnData.VeInfo.ExitReason) { + case EXIT_REASON_CPUID: + Status =3D CpuIdExit (Regs, &ReturnData.VeInfo); + DEBUG (( + DEBUG_VERBOSE, + "CPUID #VE happened, ExitReasion is %d, ExitQualification =3D 0x%x= .\n", + ReturnData.VeInfo.ExitReason, + ReturnData.VeInfo.ExitQualification.Val + )); + break; + + case EXIT_REASON_HLT: + Status =3D TdVmCall (EXIT_REASON_HLT, 0, 0, 0, 0, 0); + break; + + case EXIT_REASON_IO_INSTRUCTION: + Status =3D IoExit (Regs, &ReturnData.VeInfo); + DEBUG (( + DEBUG_VERBOSE, + "IO_Instruction #VE happened, ExitReasion is %d, ExitQualification= =3D 0x%x.\n", + ReturnData.VeInfo.ExitReason, + ReturnData.VeInfo.ExitQualification.Val + )); + break; + + case EXIT_REASON_MSR_READ: + Status =3D ReadMsrExit (Regs, &ReturnData.VeInfo); + DEBUG (( + DEBUG_VERBOSE, + "RDMSR #VE happened, ExitReasion is %d, ExitQualification =3D 0x%x= . Regs->Rcx=3D0x%llx, Status =3D 0x%llx\n", + ReturnData.VeInfo.ExitReason, + ReturnData.VeInfo.ExitQualification.Val, + Regs->Rcx, + Status + )); + break; + + case EXIT_REASON_MSR_WRITE: + Status =3D WriteMsrExit (Regs, &ReturnData.VeInfo); + DEBUG (( + DEBUG_VERBOSE, + "WRMSR #VE happened, ExitReasion is %d, ExitQualification =3D 0x%x= . Regs->Rcx=3D0x%llx, Status =3D 0x%llx\n", + ReturnData.VeInfo.ExitReason, + ReturnData.VeInfo.ExitQualification.Val, + Regs->Rcx, + Status + )); + break; + + case EXIT_REASON_EPT_VIOLATION: + Status =3D MmioExit (Regs, &ReturnData.VeInfo); + DEBUG (( + DEBUG_VERBOSE, + "MMIO #VE happened, ExitReasion is %d, ExitQualification =3D 0x%x.= \n", + ReturnData.VeInfo.ExitReason, + ReturnData.VeInfo.ExitQualification.Val + )); + break; + + case EXIT_REASON_VMCALL: + case EXIT_REASON_MWAIT_INSTRUCTION: + case EXIT_REASON_MONITOR_INSTRUCTION: + case EXIT_REASON_WBINVD: + case EXIT_REASON_RDPMC: + /* Handle as nops. */ + break; + + default: + DEBUG (( + DEBUG_ERROR, + "Unsupported #VE happened, ExitReason is %d, ExitQualification =3D= 0x%x.\n", + ReturnData.VeInfo.ExitReason, + ReturnData.VeInfo.ExitQualification.Val + )); + + ASSERT (FALSE); + CpuDeadLoop (); + } + + if (Status) { + DEBUG (( + DEBUG_ERROR, + "#VE Error (0x%llx) returned from host, ExitReason is %d, ExitQualif= ication =3D 0x%x.\n", + Status, + ReturnData.VeInfo.ExitReason, + ReturnData.VeInfo.ExitQualification.Val + )); + + TdVmCall (TDVMCALL_HALT, 0, 0, 0, 0, 0); + } + + SystemContext.SystemContextX64->Rip +=3D ReturnData.VeInfo.ExitInstructi= onLength; + return EFI_SUCCESS; +} diff --git a/OvmfPkg/Library/CcExitLib/PeiDxeCcExitVcHandler.c b/OvmfPkg/Li= brary/CcExitLib/PeiDxeCcExitVcHandler.c new file mode 100644 index 000000000000..147e77a0030e --- /dev/null +++ b/OvmfPkg/Library/CcExitLib/PeiDxeCcExitVcHandler.c @@ -0,0 +1,103 @@ +/** @file + X64 #VC Exception Handler functon. + + Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include + +#include "CcExitVcHandler.h" + +/** + Handle a #VC exception. + + Performs the necessary processing to handle a #VC exception. + + @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et + as value to use on error. + @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT + + @retval EFI_SUCCESS Exception handled + @retval EFI_UNSUPPORTED #VC not supported, (new) exception value= to + propagate provided + @retval EFI_PROTOCOL_ERROR #VC handling failed, (new) exception val= ue to + propagate provided + +**/ +EFI_STATUS +EFIAPI +CcExitLibHandleVc ( + IN OUT EFI_EXCEPTION_TYPE *ExceptionType, + IN OUT EFI_SYSTEM_CONTEXT SystemContext + ) +{ + MSR_SEV_ES_GHCB_REGISTER Msr; + GHCB *Ghcb; + GHCB *GhcbBackup; + EFI_STATUS VcRet; + BOOLEAN InterruptState; + SEV_ES_PER_CPU_DATA *SevEsData; + + InterruptState =3D GetInterruptState (); + if (InterruptState) { + DisableInterrupts (); + } + + Msr.GhcbPhysicalAddress =3D AsmReadMsr64 (MSR_SEV_ES_GHCB); + ASSERT (Msr.GhcbInfo.Function =3D=3D 0); + ASSERT (Msr.Ghcb !=3D 0); + + Ghcb =3D Msr.Ghcb; + GhcbBackup =3D NULL; + + SevEsData =3D (SEV_ES_PER_CPU_DATA *)(Ghcb + 1); + SevEsData->VcCount++; + + // + // Check for maximum PEI/DXE #VC nesting. + // + if (SevEsData->VcCount > VMGEXIT_MAXIMUM_VC_COUNT) { + CcExitLibVmgExitIssueAssert (SevEsData); + } else if (SevEsData->VcCount > 1) { + // + // Nested #VC + // + if (SevEsData->GhcbBackupPages =3D=3D NULL) { + CcExitLibVmgExitIssueAssert (SevEsData); + } + + // + // Save the active GHCB to a backup page. + // To access the correct backup page, increment the backup page poin= ter + // based on the current VcCount. + // + GhcbBackup =3D (GHCB *)SevEsData->GhcbBackupPages; + GhcbBackup +=3D (SevEsData->VcCount - 2); + + CopyMem (GhcbBackup, Ghcb, sizeof (*Ghcb)); + } + + VcRet =3D CcExitLibInternalVmgExitHandleVc (Ghcb, ExceptionType, SystemC= ontext); + + if (GhcbBackup !=3D NULL) { + // + // Restore the active GHCB from the backup page. + // + CopyMem (Ghcb, GhcbBackup, sizeof (*Ghcb)); + } + + SevEsData->VcCount--; + + if (InterruptState) { + EnableInterrupts (); + } + + return VcRet; +} diff --git a/OvmfPkg/Library/CcExitLib/SecCcExitLib.inf b/OvmfPkg/Library/C= cExitLib/SecCcExitLib.inf new file mode 100644 index 000000000000..c4425eed5fef --- /dev/null +++ b/OvmfPkg/Library/CcExitLib/SecCcExitLib.inf @@ -0,0 +1,48 @@ +## @file +# VMGEXIT Support Library. +# +# Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved. +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D SecCcExitLib + FILE_GUID =3D 325cb20c-90e2-42a1-8667-56752d0b149c + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D CcExitLib|SEC + +# +# The following information is for reference only and not required by the = build tools. +# +# VALID_ARCHITECTURES =3D X64 +# + +[Sources.common] + CcExitLib.c + CcExitVcHandler.c + CcExitVcHandler.h + SecCcExitVcHandler.c + CcExitVeHandler.c + X64/TdVmcallCpuid.nasm + +[Packages] + MdePkg/MdePkg.dec + OvmfPkg/OvmfPkg.dec + UefiCpuPkg/UefiCpuPkg.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + LocalApicLib + MemEncryptSevLib + PcdLib + +[FixedPcd] + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupSize + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidSize diff --git a/OvmfPkg/Library/CcExitLib/SecCcExitVcHandler.c b/OvmfPkg/Libra= ry/CcExitLib/SecCcExitVcHandler.c new file mode 100644 index 000000000000..a996e2e2c2cc --- /dev/null +++ b/OvmfPkg/Library/CcExitLib/SecCcExitVcHandler.c @@ -0,0 +1,109 @@ +/** @file + X64 #VC Exception Handler functon. + + Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include + +#include "CcExitVcHandler.h" + +/** + Handle a #VC exception. + + Performs the necessary processing to handle a #VC exception. + + @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et + as value to use on error. + @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT + + @retval EFI_SUCCESS Exception handled + @retval EFI_UNSUPPORTED #VC not supported, (new) exception value= to + propagate provided + @retval EFI_PROTOCOL_ERROR #VC handling failed, (new) exception val= ue to + propagate provided + +**/ +EFI_STATUS +EFIAPI +CcExitLibHandleVc ( + IN OUT EFI_EXCEPTION_TYPE *ExceptionType, + IN OUT EFI_SYSTEM_CONTEXT SystemContext + ) +{ + MSR_SEV_ES_GHCB_REGISTER Msr; + GHCB *Ghcb; + GHCB *GhcbBackup; + EFI_STATUS VcRet; + BOOLEAN InterruptState; + SEV_ES_PER_CPU_DATA *SevEsData; + + InterruptState =3D GetInterruptState (); + if (InterruptState) { + DisableInterrupts (); + } + + Msr.GhcbPhysicalAddress =3D AsmReadMsr64 (MSR_SEV_ES_GHCB); + ASSERT (Msr.GhcbInfo.Function =3D=3D 0); + ASSERT (Msr.Ghcb !=3D 0); + + Ghcb =3D Msr.Ghcb; + GhcbBackup =3D NULL; + + SevEsData =3D (SEV_ES_PER_CPU_DATA *)(Ghcb + 1); + SevEsData->VcCount++; + + // + // Check for maximum SEC #VC nesting. + // + if (SevEsData->VcCount > VMGEXIT_MAXIMUM_VC_COUNT) { + CcExitLibVmgExitIssueAssert (SevEsData); + } else if (SevEsData->VcCount > 1) { + UINTN GhcbBackupSize; + + // + // Be sure that the proper amount of pages are allocated + // + GhcbBackupSize =3D (VMGEXIT_MAXIMUM_VC_COUNT - 1) * sizeof (*Ghcb); + if (GhcbBackupSize > FixedPcdGet32 (PcdOvmfSecGhcbBackupSize)) { + // + // Not enough SEC backup pages allocated. + // + CcExitLibVmgExitIssueAssert (SevEsData); + } + + // + // Save the active GHCB to a backup page. + // To access the correct backup page, increment the backup page poin= ter + // based on the current VcCount. + // + GhcbBackup =3D (GHCB *)FixedPcdGet32 (PcdOvmfSecGhcbBackupBase); + GhcbBackup +=3D (SevEsData->VcCount - 2); + + CopyMem (GhcbBackup, Ghcb, sizeof (*Ghcb)); + } + + VcRet =3D CcExitLibInternalVmgExitHandleVc (Ghcb, ExceptionType, SystemC= ontext); + + if (GhcbBackup !=3D NULL) { + // + // Restore the active GHCB from the backup page. + // + CopyMem (Ghcb, GhcbBackup, sizeof (*Ghcb)); + } + + SevEsData->VcCount--; + + if (InterruptState) { + EnableInterrupts (); + } + + return VcRet; +} diff --git a/OvmfPkg/Library/CcExitLib/X64/TdVmcallCpuid.nasm b/OvmfPkg/Lib= rary/CcExitLib/X64/TdVmcallCpuid.nasm new file mode 100644 index 000000000000..e7e79885d472 --- /dev/null +++ b/OvmfPkg/Library/CcExitLib/X64/TdVmcallCpuid.nasm @@ -0,0 +1,146 @@ +;-------------------------------------------------------------------------= ----- +;* +;* Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.
+;* SPDX-License-Identifier: BSD-2-Clause-Patent +;* +;* +;-------------------------------------------------------------------------= ----- + +DEFAULT REL +SECTION .text + +%define TDVMCALL_EXPOSE_REGS_MASK 0xffec +%define TDVMCALL 0x0 +%define EXIT_REASON_CPUID 0xa + +%macro tdcall 0 + db 0x66,0x0f,0x01,0xcc +%endmacro + +%macro tdcall_push_regs 0 + push rbp + mov rbp, rsp + push r15 + push r14 + push r13 + push r12 + push rbx + push rsi + push rdi +%endmacro + +%macro tdcall_pop_regs 0 + pop rdi + pop rsi + pop rbx + pop r12 + pop r13 + pop r14 + pop r15 + pop rbp +%endmacro + +%define number_of_regs_pushed 8 +%define number_of_parameters 4 + +; +; Keep these in sync for push_regs/pop_regs, code below +; uses them to find 5th or greater parameters +; +%define first_variable_on_stack_offset \ + ((number_of_regs_pushed * 8) + (number_of_parameters * 8) + 8) +%define second_variable_on_stack_offset \ + ((first_variable_on_stack_offset) + 8) + +%macro tdcall_regs_preamble 2 + mov rax, %1 + + xor rcx, rcx + mov ecx, %2 + + ; R10 =3D 0 (standard TDVMCALL) + + xor r10d, r10d + + ; Zero out unused (for standard TDVMCALL) registers to avoid leaking + ; secrets to the VMM. + + xor ebx, ebx + xor esi, esi + xor edi, edi + + xor edx, edx + xor ebp, ebp + xor r8d, r8d + xor r9d, r9d + xor r14, r14 + xor r15, r15 +%endmacro + +%macro tdcall_regs_postamble 0 + xor ebx, ebx + xor esi, esi + xor edi, edi + + xor ecx, ecx + xor edx, edx + xor r8d, r8d + xor r9d, r9d + xor r10d, r10d + xor r11d, r11d +%endmacro + +;-------------------------------------------------------------------------= ----- +; 0 =3D> RAX =3D TDCALL leaf / TDVMCALL +; M =3D> RCX =3D TDVMCALL register behavior +; 0xa =3D> R11 =3D TDVMCALL function / CPUID +; RCX =3D> R12 =3D p1 +; RDX =3D> R13 =3D p2 +; +; UINT64 +; EFIAPI +; TdVmCallCpuid ( +; UINT64 EaxIn, // Rcx +; UINT64 EcxIn, // Rdx +; UINT64 *Results // R8 +; ) +global ASM_PFX(CcExitLibTdVmCallCpuid) +ASM_PFX(CcExitLibTdVmCallCpuid): + tdcall_push_regs + + mov r11, EXIT_REASON_CPUID + mov r12, rcx + mov r13, rdx + + ; Save *results pointers + push r8 + + tdcall_regs_preamble TDVMCALL, TDVMCALL_EXPOSE_REGS_MASK + + tdcall + + ; ignore return data if TDCALL reports failure. + test rax, rax + jnz .no_return_data + + ; Propagate TDVMCALL success/failure to return value. + mov rax, r10 + test rax, rax + jnz .no_return_data + + ; Retrieve *Results + pop r8 + test r8, r8 + jz .no_return_data + ; Caller pass in buffer so store results r12-r15 contains eax-edx + mov [r8 + 0], r12 + mov [r8 + 8], r13 + mov [r8 + 16], r14 + mov [r8 + 24], r15 + +.no_return_data: + tdcall_regs_postamble + + tdcall_pop_regs + + ret diff --git a/UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.c b/UefiCpuPkg/= Library/CcExitLibNull/CcExitLibNull.c index bd23793f1e04..03d28bd4fb06 100644 --- a/UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.c +++ b/UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.c @@ -155,7 +155,7 @@ CcExitLibVmgIsOffsetValid ( **/ EFI_STATUS EFIAPI -CcExitHandleVc ( +CcExitLibHandleVc ( IN OUT EFI_EXCEPTION_TYPE *ExceptionType, IN OUT EFI_SYSTEM_CONTEXT SystemContext ) @@ -183,7 +183,7 @@ CcExitHandleVc ( **/ EFI_STATUS EFIAPI -CcExitHandleVe ( +CcExitLibHandleVe ( IN OUT EFI_EXCEPTION_TYPE *ExceptionType, IN OUT EFI_SYSTEM_CONTEXT SystemContext ) --=20 2.29.2.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#96007): https://edk2.groups.io/g/devel/message/96007 Mute This Topic: https://groups.io/mt/94856324/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 09:12:31 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+96008+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96008+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1667780865; cv=none; d=zohomail.com; s=zohoarc; b=RkvVU6VlExLSjkuctvVjXG8rML4KeQFi+Atb84nuA1/wJjR25zAJXl8KpIQwHQO3aGAe9pBpW5PmzFMCDMLN8YjeqSaxHIuQ96higxJet7lt8NvFEwqDRzUTGYdNbOVHHha7R6nkrrldlBDNSFFUKvMi+gcHMmN1J6tuP83jKPc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1667780865; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=0X659gw7Uxyf+OIxu0RCpD3bbxy0Qd+1lEg/ggnN2SY=; b=jAFSm1MloJSacjfjnsz/NMvZaPofUpTNFjtRTY4/+0tJDP8+DBufdMRmTrnQC7GTG60KjVpck1kLhWaGRYNFaPwP7AEtIhHAtWHLDkt0qXb1PDGEb/tHHlN8t+fkIGZynP+uzeCttVeUjXSo+M2N20++vOQPKlaJBWk3O8a7E48= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96008+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1667780865084431.1044225717287; Sun, 6 Nov 2022 16:27:45 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id w6QdYY1788612xGDKZHLPnL0; Sun, 06 Nov 2022 16:27:44 -0800 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web08.4939.1667780856864962924 for ; Sun, 06 Nov 2022 16:27:44 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="396593401" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="396593401" X-Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:43 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="613681463" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="613681463" X-Received: from mxu9-mobl1.ccr.corp.intel.com ([10.238.0.61]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:41 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min M Xu , Brijesh Singh , Erdem Aktas , Gerd Hoffmann , James Bottomley , Jiewen Yao , Tom Lendacky Subject: [edk2-devel] [PATCH V3 3/9] OvmfPkg: Add CcExitLib in *.dsc Date: Mon, 7 Nov 2022 08:27:11 +0800 Message-Id: <20221107002717.461-4-min.m.xu@intel.com> In-Reply-To: <20221107002717.461-1-min.m.xu@intel.com> References: <20221107002717.461-1-min.m.xu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,min.m.xu@intel.com X-Gm-Message-State: qgLVvs5dNrrSrMV73zycGsytx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1667780864; bh=Q7oKJoTczaMCkGMls6KQ2NERk064MWmRIPiNMQGrII0=; h=Cc:Date:From:Reply-To:Subject:To; b=QyCQGMPT5z+6XmTDc9FwSArcqb7DblpIFvNQbE3onKYm7vOOK1Y5vWHtVL+jU0dzm4u d7i3j4BwtM2wQG6/0gJBd2ksdmVROd5ekBVs1tSkTnoUgYKBt08ztZZ0Kx3G1vMmzfiOv a3CGyREeBBQx65P8+TYWwivU4GQDDCsIPwk= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1667780865555100012 Content-Type: text/plain; charset="utf-8" From: Min M Xu https://bugzilla.tianocore.org/show_bug.cgi?id=3D4123 CcExitLib is designed to replace VmgExitLib. This patch adds CcExitLib in *.dsc which import VmgExitLib. VmgExitLib in these *.dsc will be deleted in the follwing patch so that the build will not be broken. Cc: Brijesh Singh Cc: Erdem Aktas Cc: Gerd Hoffmann Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Signed-off-by: Min Xu Reviewed-by: Jiewen Yao --- OvmfPkg/AmdSev/AmdSevX64.dsc | 2 ++ OvmfPkg/Bhyve/BhyveX64.dsc | 1 + OvmfPkg/CloudHv/CloudHvX64.dsc | 3 +++ OvmfPkg/IntelTdx/IntelTdxX64.dsc | 2 ++ OvmfPkg/Microvm/MicrovmX64.dsc | 2 ++ OvmfPkg/OvmfPkgIa32.dsc | 2 ++ OvmfPkg/OvmfPkgIa32X64.dsc | 2 ++ OvmfPkg/OvmfPkgX64.dsc | 3 +++ OvmfPkg/OvmfXen.dsc | 1 + 9 files changed, 18 insertions(+) diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc index 90e8a213ef77..1b324fa48d09 100644 --- a/OvmfPkg/AmdSev/AmdSevX64.dsc +++ b/OvmfPkg/AmdSev/AmdSevX64.dsc @@ -204,6 +204,7 @@ =20 [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf + CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf VmgExitLib|OvmfPkg/Library/VmgExitLib/VmgExitLib.inf TdxLib|MdePkg/Library/TdxLib/TdxLib.inf =20 @@ -229,6 +230,7 @@ !else CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiC= puExceptionHandlerLib.inf !endif + CcExitLib|OvmfPkg/Library/CcExitLib/SecCcExitLib.inf VmgExitLib|OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLi= b.inf =20 diff --git a/OvmfPkg/Bhyve/BhyveX64.dsc b/OvmfPkg/Bhyve/BhyveX64.dsc index 475b88b21a4c..3e90ae365682 100644 --- a/OvmfPkg/Bhyve/BhyveX64.dsc +++ b/OvmfPkg/Bhyve/BhyveX64.dsc @@ -232,6 +232,7 @@ =20 [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf + CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf TdxLib|MdePkg/Library/TdxLib/TdxLib.inf =20 diff --git a/OvmfPkg/CloudHv/CloudHvX64.dsc b/OvmfPkg/CloudHv/CloudHvX64.dsc index 10b16104acd7..56d061464dbf 100644 --- a/OvmfPkg/CloudHv/CloudHvX64.dsc +++ b/OvmfPkg/CloudHv/CloudHvX64.dsc @@ -251,6 +251,7 @@ =20 [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf + CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf VmgExitLib|OvmfPkg/Library/VmgExitLib/VmgExitLib.inf TdxLib|MdePkg/Library/TdxLib/TdxLib.inf =20 @@ -275,6 +276,7 @@ !else CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiC= puExceptionHandlerLib.inf !endif + CcExitLib|OvmfPkg/Library/CcExitLib/SecCcExitLib.inf VmgExitLib|OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLi= b.inf =20 @@ -915,6 +917,7 @@ # OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf { + CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf } MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf diff --git a/OvmfPkg/IntelTdx/IntelTdxX64.dsc b/OvmfPkg/IntelTdx/IntelTdxX6= 4.dsc index c0c1a15b0926..8c6edfbc2363 100644 --- a/OvmfPkg/IntelTdx/IntelTdxX64.dsc +++ b/OvmfPkg/IntelTdx/IntelTdxX64.dsc @@ -215,6 +215,7 @@ =20 [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf + CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf VmgExitLib|OvmfPkg/Library/VmgExitLib/VmgExitLib.inf TdxLib|MdePkg/Library/TdxLib/TdxLib.inf TdxMailboxLib|OvmfPkg/Library/TdxMailboxLib/TdxMailboxLib.inf @@ -237,6 +238,7 @@ !else CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiC= puExceptionHandlerLib.inf !endif + CcExitLib|OvmfPkg/Library/CcExitLib/SecCcExitLib.inf VmgExitLib|OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLi= b.inf PrePiHobListPointerLib|OvmfPkg/IntelTdx/PrePiHobListPointerLibTdx/PrePiH= obListPointerLibTdx.inf diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/OvmfPkg/Microvm/MicrovmX64.dsc index 7eff8e2a88d9..98da7a3c9138 100644 --- a/OvmfPkg/Microvm/MicrovmX64.dsc +++ b/OvmfPkg/Microvm/MicrovmX64.dsc @@ -249,6 +249,7 @@ =20 [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf + CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf VmgExitLib|OvmfPkg/Library/VmgExitLib/VmgExitLib.inf SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPort= Lib16550.inf PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatfor= mHookLibNull.inf @@ -277,6 +278,7 @@ !else CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiC= puExceptionHandlerLib.inf !endif + CcExitLib|OvmfPkg/Library/CcExitLib/SecCcExitLib.inf VmgExitLib|OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLi= b.inf =20 diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc index e9ba491237ae..ae002b6c9f23 100644 --- a/OvmfPkg/OvmfPkgIa32.dsc +++ b/OvmfPkg/OvmfPkgIa32.dsc @@ -256,6 +256,7 @@ =20 [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf + CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf =20 [LibraryClasses.common.SEC] @@ -985,6 +986,7 @@ OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf { VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf + CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf } MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf { diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc index af566b953f36..753486bf7798 100644 --- a/OvmfPkg/OvmfPkgIa32X64.dsc +++ b/OvmfPkg/OvmfPkgIa32X64.dsc @@ -260,6 +260,7 @@ =20 [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf + CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf TdxLib|MdePkg/Library/TdxLib/TdxLib.inf TdxMailboxLib|OvmfPkg/Library/TdxMailboxLib/TdxMailboxLib.inf @@ -1002,6 +1003,7 @@ # OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf { + CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf } MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc index f39d9cd117e6..61998d33dc78 100644 --- a/OvmfPkg/OvmfPkgX64.dsc +++ b/OvmfPkg/OvmfPkgX64.dsc @@ -276,6 +276,7 @@ =20 [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf + CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf VmgExitLib|OvmfPkg/Library/VmgExitLib/VmgExitLib.inf TdxLib|MdePkg/Library/TdxLib/TdxLib.inf TdxMailboxLib|OvmfPkg/Library/TdxMailboxLib/TdxMailboxLib.inf @@ -302,6 +303,7 @@ !else CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiC= puExceptionHandlerLib.inf !endif + CcExitLib|OvmfPkg/Library/CcExitLib/SecCcExitLib.inf VmgExitLib|OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLi= b.inf CcProbeLib|OvmfPkg/Library/CcProbeLib/SecPeiCcProbeLib.inf @@ -1072,6 +1074,7 @@ # OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf { + CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf } MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf diff --git a/OvmfPkg/OvmfXen.dsc b/OvmfPkg/OvmfXen.dsc index 58a7c97cddf7..ce298bbce25c 100644 --- a/OvmfPkg/OvmfXen.dsc +++ b/OvmfPkg/OvmfXen.dsc @@ -231,6 +231,7 @@ =20 [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf + CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf TdxLib|MdePkg/Library/TdxLib/TdxLib.inf =20 --=20 2.29.2.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#96008): https://edk2.groups.io/g/devel/message/96008 Mute This Topic: https://groups.io/mt/94856327/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 09:12:31 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+96009+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96009+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1667780868; cv=none; d=zohomail.com; s=zohoarc; b=c0uYJRZiYYh6kvs/+QBI8KlkU6X5c9vjDDgvU03EFDX1yDrjqcGb05Bevyi3+iLtoKLlo3ZG4lt2GrOtOW55vtO/AWTNDQ9TDYkjatgVnnI3IEOMt7YR3GTLC1ESpICYVgErRfNEKbRqcVdCjeTL+jaV28DHwEFYiC0NW0A2+TA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1667780868; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=s/fGLUH3L6Q6+jpOwzH6ukPmvweM63MqPwohpr2QYxg=; b=OzXcagS6t0lG1MvTPkicHBy0zJUdHp25p4SZonPkFVsHuKizXxB7uoiABVKHKw9UAS0PggcLRtNShrzqYGZPCSll57XFYLDZ6Ss0S15tGHEi+WbW2jFHKFkYdmPnFiwU0YqX/FDPAX7gBg5L1DmBHXWUjn9+97VlxOEwJ9gRGgU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96009+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1667780868015159.11439004582417; Sun, 6 Nov 2022 16:27:48 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id ZvtoYY1788612xUOXpenymlZ; Sun, 06 Nov 2022 16:27:47 -0800 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web08.4939.1667780856864962924 for ; Sun, 06 Nov 2022 16:27:47 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="396593414" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="396593414" X-Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:46 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="613681467" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="613681467" X-Received: from mxu9-mobl1.ccr.corp.intel.com ([10.238.0.61]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:43 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min M Xu , Eric Dong , Ray Ni , Brijesh Singh , Erdem Aktas , Gerd Hoffmann , James Bottomley , Jiewen Yao , Tom Lendacky Subject: [edk2-devel] [PATCH V3 4/9] UefiCpuPkg: Use CcExitLib instead of VmgExitLib Date: Mon, 7 Nov 2022 08:27:12 +0800 Message-Id: <20221107002717.461-5-min.m.xu@intel.com> In-Reply-To: <20221107002717.461-1-min.m.xu@intel.com> References: <20221107002717.461-1-min.m.xu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,min.m.xu@intel.com X-Gm-Message-State: 9K7UGY5PmllU4LRv24s8L6wcx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1667780867; bh=tp5VZ++VqBX8rCqMCS13geeFRkxWd2TYpaJwuSbbrKs=; h=Cc:Date:From:Reply-To:Subject:To; b=nVpM99r1aS1AVBiGAvHspz9I8Tk9/Qqp3xVya9+pVVJknnf6AvcMB49RQMMPlo9jUP/ Ejz7Kx4ZmPtT1XtfBXAssIfvOwff8bfwpcuqmkhoGpmgxsfJVld2pKZ8kLTQj7T53717s 63LKwB0aYQt4vI5SMKjg45/OIrcoXG0r3Nw= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1667780869602100001 Content-Type: text/plain; charset="utf-8" From: Min M Xu BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4123 VmgExitLib once was designed to provide interfaces to support #VC handler and issue VMGEXIT instruction. After TDVF (enable TDX feature in OVMF) is introduced, this library is updated to support #VE as well. Now the name of VmgExitLib cannot reflect what the lib does. So VmgExitLib is replaced by CcExitLib. Cc: Eric Dong Cc: Ray Ni Cc: Brijesh Singh Cc: Erdem Aktas Cc: Gerd Hoffmann Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Signed-off-by: Min Xu Reviewed-by: Jiewen Yao --- .../DxeCpuExceptionHandlerLib.inf | 2 +- .../PeiCpuExceptionHandlerLib.inf | 2 +- .../CpuExceptionHandlerLib/PeiDxeSmmCpuException.c | 6 +++--- .../CpuExceptionHandlerLib/SecPeiCpuException.c | 6 +++--- .../SecPeiCpuExceptionHandlerLib.inf | 2 +- .../SmmCpuExceptionHandlerLib.inf | 2 +- .../Xcode5SecPeiCpuExceptionHandlerLib.inf | 2 +- UefiCpuPkg/Library/MpInitLib/AmdSev.c | 10 +++++----- UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 2 +- UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 8 ++++---- UefiCpuPkg/Library/MpInitLib/MpLib.c | 2 +- UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf | 2 +- UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c | 10 +++++----- UefiCpuPkg/UefiCpuPkg.dsc | 2 ++ 14 files changed, 30 insertions(+), 28 deletions(-) diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandl= erLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandle= rLib.inf index e7a81bebdb13..d0f82095cf92 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.i= nf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.i= nf @@ -60,4 +60,4 @@ PeCoffGetEntryPointLib MemoryAllocationLib DebugLib - VmgExitLib + CcExitLib diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandl= erLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandle= rLib.inf index 7c2ec3b2db4c..5339f8e60404 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.i= nf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.i= nf @@ -52,7 +52,7 @@ HobLib MemoryAllocationLib SynchronizationLib - VmgExitLib + CcExitLib =20 [Pcd] gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard # CONSUMES diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeSmmCpuExceptio= n.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeSmmCpuException.c index a7d0897ef1f9..588f0e1809a2 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeSmmCpuException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeSmmCpuException.c @@ -7,7 +7,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent **/ =20 #include -#include +#include #include "CpuExceptionCommon.h" =20 /** @@ -40,7 +40,7 @@ CommonExceptionHandlerWorker ( // On other - ExceptionType contains (possibly new) exception // value // - Status =3D VmgExitHandleVc (&ExceptionType, SystemContext); + Status =3D CcExitLibHandleVc (&ExceptionType, SystemContext); if (!EFI_ERROR (Status)) { return; } @@ -57,7 +57,7 @@ CommonExceptionHandlerWorker ( // On other - ExceptionType contains (possibly new) exception // value // - Status =3D VmTdExitHandleVe (&ExceptionType, SystemContext); + Status =3D CcExitLibHandleVe (&ExceptionType, SystemContext); if (!EFI_ERROR (Status)) { return; } diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c= b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c index ad5e0e9ed4f1..bb1d173eba6d 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c @@ -7,7 +7,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent **/ =20 #include -#include +#include #include "CpuExceptionCommon.h" =20 CONST UINTN mDoFarReturnFlag =3D 0; @@ -39,7 +39,7 @@ CommonExceptionHandler ( // On other - ExceptionType contains (possibly new) exception // value // - Status =3D VmgExitHandleVc (&ExceptionType, SystemContext); + Status =3D CcExitLibHandleVc (&ExceptionType, SystemContext); if (!EFI_ERROR (Status)) { return; } @@ -57,7 +57,7 @@ CommonExceptionHandler ( // On other - ExceptionType contains (possibly new) exception // value // - Status =3D VmTdExitHandleVe (&ExceptionType, SystemContext); + Status =3D CcExitLibHandleVe (&ExceptionType, SystemContext); if (!EFI_ERROR (Status)) { return; } diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHa= ndlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException= HandlerLib.inf index 6a170286c8fc..df44371fe018 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLi= b.inf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLi= b.inf @@ -48,7 +48,7 @@ PrintLib LocalApicLib PeCoffGetEntryPointLib - VmgExitLib + CcExitLib =20 [Pcd] gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandl= erLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandle= rLib.inf index 9dde07612a04..8f8a5dab7930 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.i= nf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.i= nf @@ -51,7 +51,7 @@ LocalApicLib PeCoffGetEntryPointLib DebugLib - VmgExitLib + CcExitLib =20 [Pcd] gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExcep= tionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPei= CpuExceptionHandlerLib.inf index 6d2f66504a5b..619b39d7f1de 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHan= dlerLib.inf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHan= dlerLib.inf @@ -53,7 +53,7 @@ PrintLib LocalApicLib PeCoffGetEntryPointLib - VmgExitLib + CcExitLib =20 [Pcd] gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard diff --git a/UefiCpuPkg/Library/MpInitLib/AmdSev.c b/UefiCpuPkg/Library/MpI= nitLib/AmdSev.c index 4e4c63a52de4..9af108fcb5ff 100644 --- a/UefiCpuPkg/Library/MpInitLib/AmdSev.c +++ b/UefiCpuPkg/Library/MpInitLib/AmdSev.c @@ -8,7 +8,7 @@ **/ =20 #include "MpLib.h" -#include +#include =20 /** Get Protected mode code segment with 16-bit default addressing @@ -209,7 +209,7 @@ SevEsPlaceApHlt ( Msr.GhcbPhysicalAddress =3D AsmReadMsr64 (MSR_SEV_ES_GHCB); Ghcb =3D Msr.Ghcb; =20 - VmgInit (Ghcb, &InterruptState); + CcExitLibVmgInit (Ghcb, &InterruptState); =20 if (DoDecrement) { DoDecrement =3D FALSE; @@ -221,13 +221,13 @@ SevEsPlaceApHlt ( InterlockedDecrement ((UINT32 *)&CpuMpData->MpCpuExchangeInfo->NumAp= sExecuting); } =20 - Status =3D VmgExit (Ghcb, SVM_EXIT_AP_RESET_HOLD, 0, 0); + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_AP_RESET_HOLD, 0, 0); if ((Status =3D=3D 0) && (Ghcb->SaveArea.SwExitInfo2 !=3D 0)) { - VmgDone (Ghcb, InterruptState); + CcExitLibVmgDone (Ghcb, InterruptState); break; } =20 - VmgDone (Ghcb, InterruptState); + CcExitLibVmgDone (Ghcb, InterruptState); } =20 // diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf b/UefiCpuPkg/Lib= rary/MpInitLib/DxeMpInitLib.inf index e1cd0b350008..cd07de3a3c0b 100644 --- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf @@ -54,7 +54,7 @@ DebugAgentLib SynchronizationLib PcdLib - VmgExitLib + CcExitLib MicrocodeLib =20 [Protocols] diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c b/UefiCpuPkg/Library/M= pInitLib/DxeMpLib.c index 78cc3e2b93fd..8c7a131a0a3f 100644 --- a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include =20 @@ -222,9 +222,9 @@ GetSevEsAPMemory ( Msr.GhcbPhysicalAddress =3D AsmReadMsr64 (MSR_SEV_ES_GHCB); Ghcb =3D Msr.Ghcb; =20 - VmgInit (Ghcb, &InterruptState); - VmgExit (Ghcb, SVM_EXIT_AP_JUMP_TABLE, 0, (UINT64)(UINTN)StartAddress); - VmgDone (Ghcb, InterruptState); + CcExitLibVmgInit (Ghcb, &InterruptState); + CcExitLibVmgExit (Ghcb, SVM_EXIT_AP_JUMP_TABLE, 0, (UINT64)(UINTN)StartA= ddress); + CcExitLibVmgDone (Ghcb, InterruptState); =20 return (UINTN)StartAddress; } diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpIn= itLib/MpLib.c index 1c053f87a4c6..e5dc852ed95f 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -9,7 +9,7 @@ **/ =20 #include "MpLib.h" -#include +#include #include #include =20 diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf b/UefiCpuPkg/Lib= rary/MpInitLib/PeiMpInitLib.inf index 5facf4db9499..afd551bb0f64 100644 --- a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf +++ b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf @@ -53,7 +53,7 @@ SynchronizationLib PeiServicesLib PcdLib - VmgExitLib + CcExitLib MicrocodeLib =20 [Pcd] diff --git a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c b/UefiCpuPkg/Library= /MpInitLib/X64/AmdSev.c index a3cd377ef600..933f765f3f5e 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c +++ b/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c @@ -9,7 +9,7 @@ **/ =20 #include "MpLib.h" -#include +#include #include #include =20 @@ -150,16 +150,16 @@ SevSnpCreateSaveArea ( Msr.GhcbPhysicalAddress =3D AsmReadMsr64 (MSR_SEV_ES_GHCB); Ghcb =3D Msr.Ghcb; =20 - VmgInit (Ghcb, &InterruptState); + CcExitLibVmgInit (Ghcb, &InterruptState); Ghcb->SaveArea.Rax =3D SaveArea->SevFeatures; - VmgSetOffsetValid (Ghcb, GhcbRax); - VmgExitStatus =3D VmgExit ( + CcExitLibVmgSetOffsetValid (Ghcb, GhcbRax); + VmgExitStatus =3D CcExitLibVmgExit ( Ghcb, SVM_EXIT_SNP_AP_CREATION, ExitInfo1, ExitInfo2 ); - VmgDone (Ghcb, InterruptState); + CcExitLibVmgDone (Ghcb, InterruptState); =20 ASSERT (VmgExitStatus =3D=3D 0); if (VmgExitStatus !=3D 0) { diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc index 0e1a99ddc09f..57c74ba844d2 100644 --- a/UefiCpuPkg/UefiCpuPkg.dsc +++ b/UefiCpuPkg/UefiCpuPkg.dsc @@ -60,6 +60,7 @@ PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeC= offExtraActionLibNull.inf TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurem= entLibNull.inf VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf + CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf SmmCpuRendezvousLib|UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezv= ousLib.inf CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf @@ -164,6 +165,7 @@ UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf UefiCpuPkg/Library/SmmCpuFeaturesLib/StandaloneMmCpuFeaturesLib.inf UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf + UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf UefiCpuPkg/SecCore/SecCore.inf --=20 2.29.2.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#96009): https://edk2.groups.io/g/devel/message/96009 Mute This Topic: https://groups.io/mt/94856328/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 09:12:31 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+96010+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96010+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1667780870; cv=none; d=zohomail.com; s=zohoarc; b=LqvjYoW+3rAzJ0eLPBBWHBeubM12PVaqrjnFPYI0cPddH8EDLMv2dLu+XZgoJnV987I9feU7tNRhXZeqBj1encwvpqJiIcvTcJNdDw/GgNc0xMcFx/jqFCcULu4FWiIs41l5fL2zyTWq4hV5+U2oZKWOgFwjb0q5crc+llmtnIY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1667780870; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=FD45PQJG7wKXYuYnesfC06a9AbfMGq55mx/iPCcA7g0=; b=Tmn1sf9sSl3MnVk81kl1R/ld2uvM36YRbRsjG+9ZnbRtrkdJsvt8JV/tqplidt5jcYa7KDIiVmejoSL9H+1nsdGpBkkfVNx9JHoN/zjdpOPxOXaWPHeaKmzovyRgXQsb9578zoCqctKB4DVZWsrKkcUyO35CJ8+6x6LPh2THp64= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96010+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1667780870574794.525035845284; Sun, 6 Nov 2022 16:27:50 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id GspKYY1788612xcvtECbh07W; Sun, 06 Nov 2022 16:27:50 -0800 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web08.4939.1667780856864962924 for ; Sun, 06 Nov 2022 16:27:49 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="396593433" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="396593433" X-Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:48 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="613681474" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="613681474" X-Received: from mxu9-mobl1.ccr.corp.intel.com ([10.238.0.61]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:46 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min M Xu , Guo Dong , Ray Ni , Sean Rhodes , James Lu , Gua Guo Subject: [edk2-devel] [PATCH V3 5/9] UefiPayloadPkg: Use CcExitLib instead of VmgExitLib Date: Mon, 7 Nov 2022 08:27:13 +0800 Message-Id: <20221107002717.461-6-min.m.xu@intel.com> In-Reply-To: <20221107002717.461-1-min.m.xu@intel.com> References: <20221107002717.461-1-min.m.xu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,min.m.xu@intel.com X-Gm-Message-State: TaCZPutVyU9HfmzxxvKjDxixx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1667780870; bh=Vd7K88hTKkd6DK2X8zNor+WX/zO8Vhr1iptwUE0xfgs=; h=Cc:Date:From:Reply-To:Subject:To; b=w2d5jKpXay+8vcaz1Yp4nu+3pLuUrd5nwlznVMklSB8ulNRvEarFh9liPKlpdFq7V6G vbTjvra3rO9nETTcYdXYCppd1l6SaoXvGAWtEwZrnQwetwX3YykHtJ9r2rVNSIi0wcvQF WhAdpd3h90hF013PvOuubuiD60uCJV0JLc4= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1667780871517100005 Content-Type: text/plain; charset="utf-8" From: Min M Xu BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4123 VmgExitLib is renamed as CcExitLib. So UefiPayloadPkg.dsc should be updated as well. Cc: Guo Dong Cc: Ray Ni Cc: Sean Rhodes Cc: James Lu Cc: Gua Guo Reviewed-by: James Lu Reviewed-by: Gua Guo Signed-off-by: Min Xu Reviewed-by: Jiewen Yao --- UefiPayloadPkg/UefiPayloadPkg.dsc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc b/UefiPayloadPkg/UefiPayload= Pkg.dsc index 1150be6acd0e..723a50a42284 100644 --- a/UefiPayloadPkg/UefiPayloadPkg.dsc +++ b/UefiPayloadPkg/UefiPayloadPkg.dsc @@ -301,7 +301,7 @@ VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyL= ib.inf VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/Var= iablePolicyHelperLib.inf VariableFlashInfoLib|MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseV= ariableFlashInfoLib.inf - VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf + CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeRepor= tStatusCodeLib.inf =20 [LibraryClasses.common] --=20 2.29.2.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#96010): https://edk2.groups.io/g/devel/message/96010 Mute This Topic: https://groups.io/mt/94856329/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 09:12:31 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+96011+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96011+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1667780872; cv=none; d=zohomail.com; s=zohoarc; b=WJO8zwlsLMgTXkkGrloQUhcK9DW/hoAjSyHiGmG8xGVc6KJzNy4wVVK2HNoVWTeXglkB6QfzgiAVetpD5Y2f7hGfA9Qu8WHHat31e9Gz+xC+940o6KgwVIe6Nbw0C5ClSIYv/6Cv69T3W8BhcxBUNbt8APXtYF+n0d+VYMfbcz8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1667780872; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=SxrbfSYeCLKKiR77YEGz8KV0DWmSEI8BIynijWTvfo0=; b=M9JzWZz+Nb1X2x+tTN2UFASHALmDRJ7IPmP0m9oP6qJnrdk9CbbRiQKfH9vS0kJk3ZRZuSqnXc8hZrrycK5g/Ba6tOWMevQcatzSQ7cgxTfibc9VbuuoYg+yWs3mkHWmkHiz0bEnMvHimW9DO+a5FW3HrTjuRcbhDZsqsNdRFk4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96011+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1667780872536995.586220291148; Sun, 6 Nov 2022 16:27:52 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id SwCkYY1788612x7rcJeephEz; Sun, 06 Nov 2022 16:27:52 -0800 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web08.4939.1667780856864962924 for ; Sun, 06 Nov 2022 16:27:51 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="396593453" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="396593453" X-Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:51 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="613681501" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="613681501" X-Received: from mxu9-mobl1.ccr.corp.intel.com ([10.238.0.61]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:48 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min M Xu , Brijesh Singh , Erdem Aktas , Gerd Hoffmann , James Bottomley , Jiewen Yao , Tom Lendacky Subject: [edk2-devel] [PATCH V3 6/9] OvmfPkg: Use CcExitLib instead of VmgExitLib Date: Mon, 7 Nov 2022 08:27:14 +0800 Message-Id: <20221107002717.461-7-min.m.xu@intel.com> In-Reply-To: <20221107002717.461-1-min.m.xu@intel.com> References: <20221107002717.461-1-min.m.xu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,min.m.xu@intel.com X-Gm-Message-State: D7eXFdnDUdHtJiTDUleMs7wZx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1667780872; bh=4Rd21KAHhpyJ6ApADcyU2yU7B42AyTw/OWLf2hc06a4=; h=Cc:Date:From:Reply-To:Subject:To; b=Q0QXoZyuuCyraWM6UpuQLaBTu2lxNvdpz5brANwiIQYd9r3/a9RDtJOi++DEAov6a92 wazcGuk7CRhVwubuhVjDnexS/ZtrSFAqWuhxSUuVxat4Be6oxGXbu/lDqEwriDYzK3CQf owchIXJYIocg+ji/ukhGzoEor4wwbql5bdU= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1667780873595100009 Content-Type: text/plain; charset="utf-8" From: Min M Xu BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4123 VmgExitLib is renamed as CcExitLib. See the description in BZ4123. So OvmfPkg should be updated to this rename. Cc: Brijesh Singh Cc: Erdem Aktas Cc: Gerd Hoffmann Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Signed-off-by: Min Xu Reviewed-by: Jiewen Yao --- OvmfPkg/AmdSev/AmdSevX64.dsc | 2 -- OvmfPkg/Bhyve/BhyveX64.dsc | 1 - OvmfPkg/CloudHv/CloudHvX64.dsc | 3 --- OvmfPkg/IntelTdx/IntelTdxX64.dsc | 2 -- .../BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf | 2 +- .../BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf | 2 +- .../BaseMemEncryptSevLib/SecMemEncryptSevLib.inf | 2 +- .../X64/SnpPageStateChangeInternal.c | 10 +++++----- OvmfPkg/Microvm/MicrovmX64.dsc | 2 -- OvmfPkg/OvmfPkgIa32.dsc | 2 -- OvmfPkg/OvmfPkgIa32X64.dsc | 2 -- OvmfPkg/OvmfPkgX64.dsc | 3 --- OvmfPkg/OvmfXen.dsc | 1 - OvmfPkg/PlatformPei/AmdSev.c | 10 +++++----- OvmfPkg/PlatformPei/PlatformPei.inf | 2 +- .../FvbServicesRuntimeDxe.inf | 2 +- OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlashDxe.c | 10 +++++----- 17 files changed, 20 insertions(+), 38 deletions(-) diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc index 1b324fa48d09..8f7cae787e97 100644 --- a/OvmfPkg/AmdSev/AmdSevX64.dsc +++ b/OvmfPkg/AmdSev/AmdSevX64.dsc @@ -205,7 +205,6 @@ [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf - VmgExitLib|OvmfPkg/Library/VmgExitLib/VmgExitLib.inf TdxLib|MdePkg/Library/TdxLib/TdxLib.inf =20 [LibraryClasses.common.SEC] @@ -231,7 +230,6 @@ CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiC= puExceptionHandlerLib.inf !endif CcExitLib|OvmfPkg/Library/CcExitLib/SecCcExitLib.inf - VmgExitLib|OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLi= b.inf =20 [LibraryClasses.common.PEI_CORE] diff --git a/OvmfPkg/Bhyve/BhyveX64.dsc b/OvmfPkg/Bhyve/BhyveX64.dsc index 3e90ae365682..e3bb367b6bf6 100644 --- a/OvmfPkg/Bhyve/BhyveX64.dsc +++ b/OvmfPkg/Bhyve/BhyveX64.dsc @@ -233,7 +233,6 @@ [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf - VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf TdxLib|MdePkg/Library/TdxLib/TdxLib.inf =20 [LibraryClasses.common.SEC] diff --git a/OvmfPkg/CloudHv/CloudHvX64.dsc b/OvmfPkg/CloudHv/CloudHvX64.dsc index 56d061464dbf..ce277cb2398b 100644 --- a/OvmfPkg/CloudHv/CloudHvX64.dsc +++ b/OvmfPkg/CloudHv/CloudHvX64.dsc @@ -252,7 +252,6 @@ [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf - VmgExitLib|OvmfPkg/Library/VmgExitLib/VmgExitLib.inf TdxLib|MdePkg/Library/TdxLib/TdxLib.inf =20 [LibraryClasses.common.SEC] @@ -277,7 +276,6 @@ CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiC= puExceptionHandlerLib.inf !endif CcExitLib|OvmfPkg/Library/CcExitLib/SecCcExitLib.inf - VmgExitLib|OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLi= b.inf =20 [LibraryClasses.common.PEI_CORE] @@ -918,7 +916,6 @@ OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf { CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf - VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf } MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf { diff --git a/OvmfPkg/IntelTdx/IntelTdxX64.dsc b/OvmfPkg/IntelTdx/IntelTdxX6= 4.dsc index 8c6edfbc2363..345892651520 100644 --- a/OvmfPkg/IntelTdx/IntelTdxX64.dsc +++ b/OvmfPkg/IntelTdx/IntelTdxX64.dsc @@ -216,7 +216,6 @@ [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf - VmgExitLib|OvmfPkg/Library/VmgExitLib/VmgExitLib.inf TdxLib|MdePkg/Library/TdxLib/TdxLib.inf TdxMailboxLib|OvmfPkg/Library/TdxMailboxLib/TdxMailboxLib.inf PlatformInitLib|OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf @@ -239,7 +238,6 @@ CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiC= puExceptionHandlerLib.inf !endif CcExitLib|OvmfPkg/Library/CcExitLib/SecCcExitLib.inf - VmgExitLib|OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLi= b.inf PrePiHobListPointerLib|OvmfPkg/IntelTdx/PrePiHobListPointerLibTdx/PrePiH= obListPointerLibTdx.inf HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf b= /OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf index 35b7d519d938..cc24961c9265 100644 --- a/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf +++ b/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf @@ -51,7 +51,7 @@ DebugLib MemoryAllocationLib PcdLib - VmgExitLib + CcExitLib =20 [FeaturePcd] gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf b= /OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf index 714da3323765..8f56783da55e 100644 --- a/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf +++ b/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf @@ -51,7 +51,7 @@ DebugLib MemoryAllocationLib PcdLib - VmgExitLib + CcExitLib =20 [FeaturePcd] gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLib.inf b= /OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLib.inf index 284e5acc1177..b6d76e7e630f 100644 --- a/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLib.inf +++ b/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLib.inf @@ -48,7 +48,7 @@ CpuLib DebugLib PcdLib - VmgExitLib + CcExitLib =20 [FixedPcd] gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInt= ernal.c b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeIntern= al.c index d11aafae8472..7fa39e06a658 100644 --- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c +++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include =20 #include #include @@ -193,9 +193,9 @@ PageStateChangeVmgExit ( // while (Info->Header.CurrentEntry <=3D Info->Header.EndEntry) { Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; - VmgSetOffsetValid (Ghcb, GhcbSwScratch); + CcExitLibVmgSetOffsetValid (Ghcb, GhcbSwScratch); =20 - Status =3D VmgExit (Ghcb, SVM_EXIT_SNP_PAGE_STATE_CHANGE, 0, 0); + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_SNP_PAGE_STATE_CHANGE, 0, = 0); =20 // // The Page State Change VMGEXIT can pass the failure through the @@ -251,7 +251,7 @@ InternalSetPageState ( // // Initialize the GHCB // - VmgInit (Ghcb, &InterruptState); + CcExitLibVmgInit (Ghcb, &InterruptState); =20 // // Build the page state structure @@ -293,7 +293,7 @@ InternalSetPageState ( PvalidateRange (Info, CurrentEntry, EndEntry, TRUE); } =20 - VmgDone (Ghcb, InterruptState); + CcExitLibVmgDone (Ghcb, InterruptState); =20 BaseAddress =3D NextAddress; } diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/OvmfPkg/Microvm/MicrovmX64.dsc index 98da7a3c9138..994a02d30107 100644 --- a/OvmfPkg/Microvm/MicrovmX64.dsc +++ b/OvmfPkg/Microvm/MicrovmX64.dsc @@ -250,7 +250,6 @@ [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf - VmgExitLib|OvmfPkg/Library/VmgExitLib/VmgExitLib.inf SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPort= Lib16550.inf PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatfor= mHookLibNull.inf FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf @@ -279,7 +278,6 @@ CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiC= puExceptionHandlerLib.inf !endif CcExitLib|OvmfPkg/Library/CcExitLib/SecCcExitLib.inf - VmgExitLib|OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLi= b.inf =20 [LibraryClasses.common.PEI_CORE] diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc index ae002b6c9f23..6f774baf90f5 100644 --- a/OvmfPkg/OvmfPkgIa32.dsc +++ b/OvmfPkg/OvmfPkgIa32.dsc @@ -257,7 +257,6 @@ [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf - VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf =20 [LibraryClasses.common.SEC] TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.inf @@ -985,7 +984,6 @@ # OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf { - VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf } MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc index 753486bf7798..c851764dec05 100644 --- a/OvmfPkg/OvmfPkgIa32X64.dsc +++ b/OvmfPkg/OvmfPkgIa32X64.dsc @@ -261,7 +261,6 @@ [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf - VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf TdxLib|MdePkg/Library/TdxLib/TdxLib.inf TdxMailboxLib|OvmfPkg/Library/TdxMailboxLib/TdxMailboxLib.inf =20 @@ -1004,7 +1003,6 @@ OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf { CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf - VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf } MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf { diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc index 61998d33dc78..63c3a47aea30 100644 --- a/OvmfPkg/OvmfPkgX64.dsc +++ b/OvmfPkg/OvmfPkgX64.dsc @@ -277,7 +277,6 @@ [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf - VmgExitLib|OvmfPkg/Library/VmgExitLib/VmgExitLib.inf TdxLib|MdePkg/Library/TdxLib/TdxLib.inf TdxMailboxLib|OvmfPkg/Library/TdxMailboxLib/TdxMailboxLib.inf =20 @@ -304,7 +303,6 @@ CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiC= puExceptionHandlerLib.inf !endif CcExitLib|OvmfPkg/Library/CcExitLib/SecCcExitLib.inf - VmgExitLib|OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLi= b.inf CcProbeLib|OvmfPkg/Library/CcProbeLib/SecPeiCcProbeLib.inf =20 @@ -1075,7 +1073,6 @@ OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf { CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf - VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf } MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf { diff --git a/OvmfPkg/OvmfXen.dsc b/OvmfPkg/OvmfXen.dsc index ce298bbce25c..8bb497088bd2 100644 --- a/OvmfPkg/OvmfXen.dsc +++ b/OvmfPkg/OvmfXen.dsc @@ -232,7 +232,6 @@ [LibraryClasses.common] BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf - VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf TdxLib|MdePkg/Library/TdxLib/TdxLib.inf =20 [LibraryClasses.common.SEC] diff --git a/OvmfPkg/PlatformPei/AmdSev.c b/OvmfPkg/PlatformPei/AmdSev.c index 385562b44c4e..d16db053b012 100644 --- a/OvmfPkg/PlatformPei/AmdSev.c +++ b/OvmfPkg/PlatformPei/AmdSev.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include =20 #include "Platform.h" @@ -50,7 +50,7 @@ AmdSevSnpInitialize ( } =20 // - // Query the hypervisor feature using the VmgExit and set the value in t= he + // Query the hypervisor feature using the CcExitLibVmgExit and set the v= alue in the // hypervisor features PCD. // HvFeatures =3D GetHypervisorFeature (); @@ -129,19 +129,19 @@ GetHypervisorFeature ( // // Initialize the GHCB // - VmgInit (Ghcb, &InterruptState); + CcExitLibVmgInit (Ghcb, &InterruptState); =20 // // Query the Hypervisor Features. // - Status =3D VmgExit (Ghcb, SVM_EXIT_HYPERVISOR_FEATURES, 0, 0); + Status =3D CcExitLibVmgExit (Ghcb, SVM_EXIT_HYPERVISOR_FEATURES, 0, 0); if ((Status !=3D 0)) { SevEsProtocolFailure (GHCB_TERMINATE_GHCB_GENERAL); } =20 Features =3D Ghcb->SaveArea.SwExitInfo2; =20 - VmgDone (Ghcb, InterruptState); + CcExitLibVmgDone (Ghcb, InterruptState); =20 return Features; } diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/Plat= formPei.inf index 3cd83e6ec3e5..1fadadeb5565 100644 --- a/OvmfPkg/PlatformPei/PlatformPei.inf +++ b/OvmfPkg/PlatformPei/PlatformPei.inf @@ -63,7 +63,7 @@ MtrrLib MemEncryptSevLib PcdLib - VmgExitLib + CcExitLib PlatformInitLib =20 [Pcd] diff --git a/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.i= nf b/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf index 8bb2325157ea..f47170478900 100644 --- a/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf +++ b/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf @@ -53,7 +53,7 @@ UefiBootServicesTableLib UefiDriverEntryPoint UefiRuntimeLib - VmgExitLib + CcExitLib =20 [Guids] gEfiEventVirtualAddressChangeGuid # ALWAYS_CONSUMED diff --git a/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlashDxe.c b/OvmfPk= g/QemuFlashFvbServicesRuntimeDxe/QemuFlashDxe.c index 172d6a4267f8..2b3596637e16 100644 --- a/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlashDxe.c +++ b/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlashDxe.c @@ -11,7 +11,7 @@ =20 #include #include -#include +#include #include =20 #include "QemuFlash.h" @@ -82,12 +82,12 @@ QemuFlashPtrWrite ( // #VC exception. Instead, use the VMGEXIT MMIO write support directly // to perform the update. // - VmgInit (Ghcb, &InterruptState); + CcExitLibVmgInit (Ghcb, &InterruptState); Ghcb->SharedBuffer[0] =3D Value; Ghcb->SaveArea.SwScratch =3D (UINT64)(UINTN)Ghcb->SharedBuffer; - VmgSetOffsetValid (Ghcb, GhcbSwScratch); - VmgExit (Ghcb, SVM_EXIT_MMIO_WRITE, PhysAddr, 1); - VmgDone (Ghcb, InterruptState); + CcExitLibVmgSetOffsetValid (Ghcb, GhcbSwScratch); + CcExitLibVmgExit (Ghcb, SVM_EXIT_MMIO_WRITE, PhysAddr, 1); + CcExitLibVmgDone (Ghcb, InterruptState); } else { *Ptr =3D Value; } --=20 2.29.2.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#96011): https://edk2.groups.io/g/devel/message/96011 Mute This Topic: https://groups.io/mt/94856331/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 09:12:31 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+96012+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96012+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1667780875; cv=none; d=zohomail.com; s=zohoarc; b=AOQBggI2rz/t+PeFCtVoJv1zHdsYjNVbUtMQpyP7uo0Wdp/uePUd0i3HUBBdZ2qLYSCuoVicDUvJGITwuxMIVOD469xgYbcQZfqd9LuGjdbPuRzY80Y/IKdEfmB2j6NBmNQeAiDpYv4ClexHMET9r11df5RIG190/d6qu4/Wnl8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1667780875; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=qECMtIjFiEAheFZGMu17vQdtXIdnHOrNdw5x+M9whrQ=; b=AN/nPHr/KeGQAZzvyZvNgLd0+b+V4pkItY/XbS9h7P3YbOAIinvIUYAmULenRBizHj+iv+WGQ8A6l9cDwHtqKbgFik/0elu33uv2+v3vugR+lrR+jjwA58RQizWHsYp8t9BIg/Zv3KsM2tfuZFjLlYv1Pdiy/MR8nwMCNNlR08A= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96012+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1667780875737592.5661403365974; Sun, 6 Nov 2022 16:27:55 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id BbuCYY1788612xNtVRc7LWBx; Sun, 06 Nov 2022 16:27:55 -0800 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web08.4939.1667780856864962924 for ; Sun, 06 Nov 2022 16:27:54 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="396593488" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="396593488" X-Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:53 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="613681545" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="613681545" X-Received: from mxu9-mobl1.ccr.corp.intel.com ([10.238.0.61]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:51 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min M Xu , Brijesh Singh , Erdem Aktas , Gerd Hoffmann , James Bottomley , Jiewen Yao , Tom Lendacky Subject: [edk2-devel] [PATCH V3 7/9] OvmfPkg: Delete VmgExitLib Date: Mon, 7 Nov 2022 08:27:15 +0800 Message-Id: <20221107002717.461-8-min.m.xu@intel.com> In-Reply-To: <20221107002717.461-1-min.m.xu@intel.com> References: <20221107002717.461-1-min.m.xu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,min.m.xu@intel.com X-Gm-Message-State: vS5nryW9mYaj86Fjh1ZhbVSlx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1667780875; bh=/9LQZ3CvsnjY6VD0UamGCHoBRVDx5+pN+iZVV5ZSL4g=; h=Cc:Date:From:Reply-To:Subject:To; b=ehQ7gl4FRIvMvmsngM64E3Te+tHwzePSzCsdO0tiwXF1OXVrMlql3WUhItnCC1G5Dng V/P8I2479yXPo+ssYDsFRPkkUytvhmKXlddVqGHgaY3MKnpulkr9zJBExQMkisalcNuIV 7lt7MTwll8kUOqKF7Wn8XLOX8meCdXpXEbQ= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1667780877610100013 Content-Type: text/plain; charset="utf-8" From: Min M Xu BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4123 Delete VmgExitLib because it is replaced by CcExitLib. Cc: Brijesh Singh Cc: Erdem Aktas Cc: Gerd Hoffmann Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Signed-off-by: Min Xu Reviewed-by: Jiewen Yao --- .../VmgExitLib/PeiDxeVmgExitVcHandler.c | 103 - OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf | 48 - .../Library/VmgExitLib/SecVmgExitVcHandler.c | 109 - OvmfPkg/Library/VmgExitLib/VmTdExitHandler.h | 32 - .../Library/VmgExitLib/VmTdExitVeHandler.c | 577 ---- OvmfPkg/Library/VmgExitLib/VmgExitLib.c | 238 -- OvmfPkg/Library/VmgExitLib/VmgExitLib.inf | 45 - OvmfPkg/Library/VmgExitLib/VmgExitVcHandler.c | 2356 ----------------- OvmfPkg/Library/VmgExitLib/VmgExitVcHandler.h | 53 - .../Library/VmgExitLib/X64/TdVmcallCpuid.nasm | 146 - 10 files changed, 3707 deletions(-) delete mode 100644 OvmfPkg/Library/VmgExitLib/PeiDxeVmgExitVcHandler.c delete mode 100644 OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf delete mode 100644 OvmfPkg/Library/VmgExitLib/SecVmgExitVcHandler.c delete mode 100644 OvmfPkg/Library/VmgExitLib/VmTdExitHandler.h delete mode 100644 OvmfPkg/Library/VmgExitLib/VmTdExitVeHandler.c delete mode 100644 OvmfPkg/Library/VmgExitLib/VmgExitLib.c delete mode 100644 OvmfPkg/Library/VmgExitLib/VmgExitLib.inf delete mode 100644 OvmfPkg/Library/VmgExitLib/VmgExitVcHandler.c delete mode 100644 OvmfPkg/Library/VmgExitLib/VmgExitVcHandler.h delete mode 100644 OvmfPkg/Library/VmgExitLib/X64/TdVmcallCpuid.nasm diff --git a/OvmfPkg/Library/VmgExitLib/PeiDxeVmgExitVcHandler.c b/OvmfPkg/= Library/VmgExitLib/PeiDxeVmgExitVcHandler.c deleted file mode 100644 index e3d071583750..000000000000 --- a/OvmfPkg/Library/VmgExitLib/PeiDxeVmgExitVcHandler.c +++ /dev/null @@ -1,103 +0,0 @@ -/** @file - X64 #VC Exception Handler functon. - - Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include -#include -#include -#include -#include -#include - -#include "VmgExitVcHandler.h" - -/** - Handle a #VC exception. - - Performs the necessary processing to handle a #VC exception. - - @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et - as value to use on error. - @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT - - @retval EFI_SUCCESS Exception handled - @retval EFI_UNSUPPORTED #VC not supported, (new) exception value= to - propagate provided - @retval EFI_PROTOCOL_ERROR #VC handling failed, (new) exception val= ue to - propagate provided - -**/ -EFI_STATUS -EFIAPI -VmgExitHandleVc ( - IN OUT EFI_EXCEPTION_TYPE *ExceptionType, - IN OUT EFI_SYSTEM_CONTEXT SystemContext - ) -{ - MSR_SEV_ES_GHCB_REGISTER Msr; - GHCB *Ghcb; - GHCB *GhcbBackup; - EFI_STATUS VcRet; - BOOLEAN InterruptState; - SEV_ES_PER_CPU_DATA *SevEsData; - - InterruptState =3D GetInterruptState (); - if (InterruptState) { - DisableInterrupts (); - } - - Msr.GhcbPhysicalAddress =3D AsmReadMsr64 (MSR_SEV_ES_GHCB); - ASSERT (Msr.GhcbInfo.Function =3D=3D 0); - ASSERT (Msr.Ghcb !=3D 0); - - Ghcb =3D Msr.Ghcb; - GhcbBackup =3D NULL; - - SevEsData =3D (SEV_ES_PER_CPU_DATA *)(Ghcb + 1); - SevEsData->VcCount++; - - // - // Check for maximum PEI/DXE #VC nesting. - // - if (SevEsData->VcCount > VMGEXIT_MAXIMUM_VC_COUNT) { - VmgExitIssueAssert (SevEsData); - } else if (SevEsData->VcCount > 1) { - // - // Nested #VC - // - if (SevEsData->GhcbBackupPages =3D=3D NULL) { - VmgExitIssueAssert (SevEsData); - } - - // - // Save the active GHCB to a backup page. - // To access the correct backup page, increment the backup page poin= ter - // based on the current VcCount. - // - GhcbBackup =3D (GHCB *)SevEsData->GhcbBackupPages; - GhcbBackup +=3D (SevEsData->VcCount - 2); - - CopyMem (GhcbBackup, Ghcb, sizeof (*Ghcb)); - } - - VcRet =3D InternalVmgExitHandleVc (Ghcb, ExceptionType, SystemContext); - - if (GhcbBackup !=3D NULL) { - // - // Restore the active GHCB from the backup page. - // - CopyMem (Ghcb, GhcbBackup, sizeof (*Ghcb)); - } - - SevEsData->VcCount--; - - if (InterruptState) { - EnableInterrupts (); - } - - return VcRet; -} diff --git a/OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf b/OvmfPkg/Library= /VmgExitLib/SecVmgExitLib.inf deleted file mode 100644 index f9bd4974f6dc..000000000000 --- a/OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf +++ /dev/null @@ -1,48 +0,0 @@ -## @file -# VMGEXIT Support Library. -# -# Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved. -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -## - -[Defines] - INF_VERSION =3D 0x00010005 - BASE_NAME =3D SecVmgExitLib - FILE_GUID =3D dafff819-f86c-4cff-a70e-83161e5bcf9a - MODULE_TYPE =3D BASE - VERSION_STRING =3D 1.0 - LIBRARY_CLASS =3D VmgExitLib|SEC - -# -# The following information is for reference only and not required by the = build tools. -# -# VALID_ARCHITECTURES =3D X64 -# - -[Sources.common] - VmgExitLib.c - VmgExitVcHandler.c - VmgExitVcHandler.h - SecVmgExitVcHandler.c - VmTdExitVeHandler.c - X64/TdVmcallCpuid.nasm - -[Packages] - MdePkg/MdePkg.dec - OvmfPkg/OvmfPkg.dec - UefiCpuPkg/UefiCpuPkg.dec - -[LibraryClasses] - BaseLib - BaseMemoryLib - DebugLib - LocalApicLib - MemEncryptSevLib - PcdLib - -[FixedPcd] - gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase - gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupSize - gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase - gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidSize diff --git a/OvmfPkg/Library/VmgExitLib/SecVmgExitVcHandler.c b/OvmfPkg/Lib= rary/VmgExitLib/SecVmgExitVcHandler.c deleted file mode 100644 index fe8680f831d9..000000000000 --- a/OvmfPkg/Library/VmgExitLib/SecVmgExitVcHandler.c +++ /dev/null @@ -1,109 +0,0 @@ -/** @file - X64 #VC Exception Handler functon. - - Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include -#include -#include -#include -#include -#include - -#include "VmgExitVcHandler.h" - -/** - Handle a #VC exception. - - Performs the necessary processing to handle a #VC exception. - - @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et - as value to use on error. - @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT - - @retval EFI_SUCCESS Exception handled - @retval EFI_UNSUPPORTED #VC not supported, (new) exception value= to - propagate provided - @retval EFI_PROTOCOL_ERROR #VC handling failed, (new) exception val= ue to - propagate provided - -**/ -EFI_STATUS -EFIAPI -VmgExitHandleVc ( - IN OUT EFI_EXCEPTION_TYPE *ExceptionType, - IN OUT EFI_SYSTEM_CONTEXT SystemContext - ) -{ - MSR_SEV_ES_GHCB_REGISTER Msr; - GHCB *Ghcb; - GHCB *GhcbBackup; - EFI_STATUS VcRet; - BOOLEAN InterruptState; - SEV_ES_PER_CPU_DATA *SevEsData; - - InterruptState =3D GetInterruptState (); - if (InterruptState) { - DisableInterrupts (); - } - - Msr.GhcbPhysicalAddress =3D AsmReadMsr64 (MSR_SEV_ES_GHCB); - ASSERT (Msr.GhcbInfo.Function =3D=3D 0); - ASSERT (Msr.Ghcb !=3D 0); - - Ghcb =3D Msr.Ghcb; - GhcbBackup =3D NULL; - - SevEsData =3D (SEV_ES_PER_CPU_DATA *)(Ghcb + 1); - SevEsData->VcCount++; - - // - // Check for maximum SEC #VC nesting. - // - if (SevEsData->VcCount > VMGEXIT_MAXIMUM_VC_COUNT) { - VmgExitIssueAssert (SevEsData); - } else if (SevEsData->VcCount > 1) { - UINTN GhcbBackupSize; - - // - // Be sure that the proper amount of pages are allocated - // - GhcbBackupSize =3D (VMGEXIT_MAXIMUM_VC_COUNT - 1) * sizeof (*Ghcb); - if (GhcbBackupSize > FixedPcdGet32 (PcdOvmfSecGhcbBackupSize)) { - // - // Not enough SEC backup pages allocated. - // - VmgExitIssueAssert (SevEsData); - } - - // - // Save the active GHCB to a backup page. - // To access the correct backup page, increment the backup page poin= ter - // based on the current VcCount. - // - GhcbBackup =3D (GHCB *)FixedPcdGet32 (PcdOvmfSecGhcbBackupBase); - GhcbBackup +=3D (SevEsData->VcCount - 2); - - CopyMem (GhcbBackup, Ghcb, sizeof (*Ghcb)); - } - - VcRet =3D InternalVmgExitHandleVc (Ghcb, ExceptionType, SystemContext); - - if (GhcbBackup !=3D NULL) { - // - // Restore the active GHCB from the backup page. - // - CopyMem (Ghcb, GhcbBackup, sizeof (*Ghcb)); - } - - SevEsData->VcCount--; - - if (InterruptState) { - EnableInterrupts (); - } - - return VcRet; -} diff --git a/OvmfPkg/Library/VmgExitLib/VmTdExitHandler.h b/OvmfPkg/Library= /VmgExitLib/VmTdExitHandler.h deleted file mode 100644 index 7eacd0872f46..000000000000 --- a/OvmfPkg/Library/VmgExitLib/VmTdExitHandler.h +++ /dev/null @@ -1,32 +0,0 @@ -/** @file - - Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#ifndef VMTD_EXIT_HANDLER_H_ -#define VMTD_EXIT_HANDLER_H_ - -#include -#include - -/** - This function enable the TD guest to request the VMM to emulate CPUID - operation, especially for non-architectural, CPUID leaves. - - @param[in] Eax Main leaf of the CPUID - @param[in] Ecx Sub-leaf of the CPUID - @param[out] Results Returned result of CPUID operation - - @return EFI_SUCCESS -**/ -EFI_STATUS -EFIAPI -TdVmCallCpuid ( - IN UINT64 Eax, - IN UINT64 Ecx, - OUT VOID *Results - ); - -#endif diff --git a/OvmfPkg/Library/VmgExitLib/VmTdExitVeHandler.c b/OvmfPkg/Libra= ry/VmgExitLib/VmTdExitVeHandler.c deleted file mode 100644 index c89268c5d8e8..000000000000 --- a/OvmfPkg/Library/VmgExitLib/VmTdExitVeHandler.c +++ /dev/null @@ -1,577 +0,0 @@ -/** @file - - Copyright (c) 2021, Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include -#include -#include "VmTdExitHandler.h" -#include -#include -#include -#include - -typedef union { - struct { - UINT32 Eax; - UINT32 Edx; - } Regs; - UINT64 Val; -} MSR_DATA; - -typedef union { - UINT8 Val; - struct { - UINT8 B : 1; - UINT8 X : 1; - UINT8 R : 1; - UINT8 W : 1; - } Bits; -} REX; - -typedef union { - UINT8 Val; - struct { - UINT8 Rm : 3; - UINT8 Reg : 3; - UINT8 Mod : 2; - } Bits; -} MODRM; - -typedef struct { - UINT64 Regs[4]; -} CPUID_DATA; - -/** - Handle an CPUID event. - - Use the TDVMCALL instruction to handle cpuid #ve - - @param[in, out] Regs x64 processor context - @param[in] Veinfo VE Info - - @retval 0 Event handled successfully - @return New exception value to propagate -**/ -STATIC -UINT64 -EFIAPI -CpuIdExit ( - IN EFI_SYSTEM_CONTEXT_X64 *Regs, - IN TDCALL_VEINFO_RETURN_DATA *Veinfo - ) -{ - CPUID_DATA CpuIdData; - UINT64 Status; - - Status =3D TdVmCallCpuid (Regs->Rax, Regs->Rcx, &CpuIdData); - - if (Status =3D=3D 0) { - Regs->Rax =3D CpuIdData.Regs[0]; - Regs->Rbx =3D CpuIdData.Regs[1]; - Regs->Rcx =3D CpuIdData.Regs[2]; - Regs->Rdx =3D CpuIdData.Regs[3]; - } - - return Status; -} - -/** - Handle an IO event. - - Use the TDVMCALL instruction to handle either an IO read or an IO write. - - @param[in, out] Regs x64 processor context - @param[in] Veinfo VE Info - - @retval 0 Event handled successfully - @return New exception value to propagate -**/ -STATIC -UINT64 -EFIAPI -IoExit ( - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN TDCALL_VEINFO_RETURN_DATA *Veinfo - ) -{ - BOOLEAN Write; - UINTN Size; - UINTN Port; - UINT64 Val; - UINT64 RepCnt; - UINT64 Status; - - Val =3D 0; - Write =3D Veinfo->ExitQualification.Io.Direction ? FALSE : TRUE; - Size =3D Veinfo->ExitQualification.Io.Size + 1; - Port =3D Veinfo->ExitQualification.Io.Port; - - if (Veinfo->ExitQualification.Io.String) { - // - // If REP is set, get rep-cnt from Rcx - // - RepCnt =3D Veinfo->ExitQualification.Io.Rep ? Regs->Rcx : 1; - - while (RepCnt) { - Val =3D 0; - if (Write =3D=3D TRUE) { - CopyMem (&Val, (VOID *)Regs->Rsi, Size); - Regs->Rsi +=3D Size; - } - - Status =3D TdVmCall (EXIT_REASON_IO_INSTRUCTION, Size, Write, Port, = Val, (Write ? NULL : &Val)); - if (Status !=3D 0) { - break; - } - - if (Write =3D=3D FALSE) { - CopyMem ((VOID *)Regs->Rdi, &Val, Size); - Regs->Rdi +=3D Size; - } - - if (Veinfo->ExitQualification.Io.Rep) { - Regs->Rcx -=3D 1; - } - - RepCnt -=3D 1; - } - } else { - if (Write =3D=3D TRUE) { - CopyMem (&Val, (VOID *)&Regs->Rax, Size); - } - - Status =3D TdVmCall (EXIT_REASON_IO_INSTRUCTION, Size, Write, Port, Va= l, (Write ? NULL : &Val)); - if ((Status =3D=3D 0) && (Write =3D=3D FALSE)) { - CopyMem ((VOID *)&Regs->Rax, &Val, Size); - } - } - - return Status; -} - -/** - Handle an READ MSR event. - - Use the TDVMCALL instruction to handle msr read - - @param[in, out] Regs x64 processor context - @param[in] Veinfo VE Info - - @retval 0 Event handled successfully - @return New exception value to propagate -**/ -STATIC -UINT64 -ReadMsrExit ( - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN TDCALL_VEINFO_RETURN_DATA *Veinfo - ) -{ - MSR_DATA Data; - UINT64 Status; - - Status =3D TdVmCall (EXIT_REASON_MSR_READ, Regs->Rcx, 0, 0, 0, &Data); - if (Status =3D=3D 0) { - Regs->Rax =3D Data.Regs.Eax; - Regs->Rdx =3D Data.Regs.Edx; - } - - return Status; -} - -/** - Handle an WRITE MSR event. - - Use the TDVMCALL instruction to handle msr write - - @param[in, out] Regs x64 processor context - @param[in] Veinfo VE Info - - @retval 0 Event handled successfully - @return New exception value to propagate -**/ -STATIC -UINT64 -WriteMsrExit ( - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN TDCALL_VEINFO_RETURN_DATA *Veinfo - ) -{ - UINT64 Status; - MSR_DATA Data; - - Data.Regs.Eax =3D (UINT32)Regs->Rax; - Data.Regs.Edx =3D (UINT32)Regs->Rdx; - - Status =3D TdVmCall (EXIT_REASON_MSR_WRITE, Regs->Rcx, Data.Val, 0, 0, = NULL); - - return Status; -} - -STATIC -VOID -EFIAPI -TdxDecodeInstruction ( - IN UINT8 *Rip - ) -{ - UINTN i; - - DEBUG ((DEBUG_INFO, "TDX: #TD[EPT] instruction (%p):", Rip)); - for (i =3D 0; i < 15; i++) { - DEBUG ((DEBUG_INFO, "%02x:", Rip[i])); - } - - DEBUG ((DEBUG_INFO, "\n")); -} - -#define TDX_DECODER_BUG_ON(x) \ - if ((x)) { \ - TdxDecodeInstruction(Rip); \ - TdVmCall(TDVMCALL_HALT, 0, 0, 0, 0, 0); \ - } - -STATIC -UINT64 * -EFIAPI -GetRegFromContext ( - IN EFI_SYSTEM_CONTEXT_X64 *Regs, - IN UINTN RegIndex - ) -{ - switch (RegIndex) { - case 0: return &Regs->Rax; - break; - case 1: return &Regs->Rcx; - break; - case 2: return &Regs->Rdx; - break; - case 3: return &Regs->Rbx; - break; - case 4: return &Regs->Rsp; - break; - case 5: return &Regs->Rbp; - break; - case 6: return &Regs->Rsi; - break; - case 7: return &Regs->Rdi; - break; - case 8: return &Regs->R8; - break; - case 9: return &Regs->R9; - break; - case 10: return &Regs->R10; - break; - case 11: return &Regs->R11; - break; - case 12: return &Regs->R12; - break; - case 13: return &Regs->R13; - break; - case 14: return &Regs->R14; - break; - case 15: return &Regs->R15; - break; - } - - return NULL; -} - -/** - Handle an MMIO event. - - Use the TDVMCALL instruction to handle either an mmio read or an mmio wr= ite. - - @param[in, out] Regs x64 processor context - @param[in] Veinfo VE Info - - @retval 0 Event handled successfully - @return New exception value to propagate -**/ -STATIC -INTN -EFIAPI -MmioExit ( - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN TDCALL_VEINFO_RETURN_DATA *Veinfo - ) -{ - UINT64 Status; - UINT32 MmioSize; - UINT32 RegSize; - UINT8 OpCode; - BOOLEAN SeenRex; - UINT64 *Reg; - UINT8 *Rip; - UINT64 Val; - UINT32 OpSize; - MODRM ModRm; - REX Rex; - TD_RETURN_DATA TdReturnData; - UINT8 Gpaw; - UINT64 TdSharedPageMask; - - Rip =3D (UINT8 *)Regs->Rip; - Val =3D 0; - Rex.Val =3D 0; - SeenRex =3D FALSE; - - Status =3D TdCall (TDCALL_TDINFO, 0, 0, 0, &TdReturnData); - if (Status =3D=3D TDX_EXIT_REASON_SUCCESS) { - Gpaw =3D (UINT8)(TdReturnData.TdInfo.Gpaw & 0x3f); - TdSharedPageMask =3D 1ULL << (Gpaw - 1); - } else { - DEBUG ((DEBUG_ERROR, "TDCALL failed with status=3D%llx\n", Status)); - return Status; - } - - if ((Veinfo->GuestPA & TdSharedPageMask) =3D=3D 0) { - DEBUG ((DEBUG_ERROR, "EPT-violation #VE on private memory is not allow= ed!")); - TdVmCall (TDVMCALL_HALT, 0, 0, 0, 0, 0); - CpuDeadLoop (); - } - - // - // Default to 32bit transfer - // - OpSize =3D 4; - - do { - OpCode =3D *Rip++; - if (OpCode =3D=3D 0x66) { - OpSize =3D 2; - } else if ((OpCode =3D=3D 0x64) || (OpCode =3D=3D 0x65) || (OpCode =3D= =3D 0x67)) { - continue; - } else if ((OpCode >=3D 0x40) && (OpCode <=3D 0x4f)) { - SeenRex =3D TRUE; - Rex.Val =3D OpCode; - } else { - break; - } - } while (TRUE); - - // - // We need to have at least 2 more bytes for this instruction - // - TDX_DECODER_BUG_ON (((UINT64)Rip - Regs->Rip) > 13); - - OpCode =3D *Rip++; - // - // Two-byte opecode, get next byte - // - if (OpCode =3D=3D 0x0F) { - OpCode =3D *Rip++; - } - - switch (OpCode) { - case 0x88: - case 0x8A: - case 0xB6: - MmioSize =3D 1; - break; - case 0xB7: - MmioSize =3D 2; - break; - default: - MmioSize =3D Rex.Bits.W ? 8 : OpSize; - break; - } - - /* Punt on AH/BH/CH/DH unless it shows up. */ - ModRm.Val =3D *Rip++; - TDX_DECODER_BUG_ON (MmioSize =3D=3D 1 && ModRm.Bits.Reg > 4 && !SeenRex = && OpCode !=3D 0xB6); - Reg =3D GetRegFromContext (Regs, ModRm.Bits.Reg | ((int)Rex.Bits.R << 3)= ); - TDX_DECODER_BUG_ON (!Reg); - - if (ModRm.Bits.Rm =3D=3D 4) { - ++Rip; /* SIB byte */ - } - - if ((ModRm.Bits.Mod =3D=3D 2) || ((ModRm.Bits.Mod =3D=3D 0) && (ModRm.Bi= ts.Rm =3D=3D 5))) { - Rip +=3D 4; /* DISP32 */ - } else if (ModRm.Bits.Mod =3D=3D 1) { - ++Rip; /* DISP8 */ - } - - switch (OpCode) { - case 0x88: - case 0x89: - CopyMem ((void *)&Val, Reg, MmioSize); - Status =3D TdVmCall (TDVMCALL_MMIO, MmioSize, 1, Veinfo->GuestPA, Va= l, 0); - break; - case 0xC7: - CopyMem ((void *)&Val, Rip, OpSize); - Status =3D TdVmCall (TDVMCALL_MMIO, MmioSize, 1, Veinfo->GuestPA, Va= l, 0); - Rip +=3D OpSize; - default: - // - // 32-bit write registers are zero extended to the full register - // Hence 'MOVZX r[32/64], r/m16' is - // hardcoded to reg size 8, and the straight MOV case has a reg - // size of 8 in the 32-bit read case. - // - switch (OpCode) { - case 0xB6: - RegSize =3D Rex.Bits.W ? 8 : OpSize; - break; - case 0xB7: - RegSize =3D 8; - break; - default: - RegSize =3D MmioSize =3D=3D 4 ? 8 : MmioSize; - break; - } - - Status =3D TdVmCall (TDVMCALL_MMIO, MmioSize, 0, Veinfo->GuestPA, 0,= &Val); - if (Status =3D=3D 0) { - ZeroMem (Reg, RegSize); - CopyMem (Reg, (void *)&Val, MmioSize); - } - } - - if (Status =3D=3D 0) { - TDX_DECODER_BUG_ON (((UINT64)Rip - Regs->Rip) > 15); - - // - // We change instruction length to reflect true size so handler can - // bump rip - // - Veinfo->ExitInstructionLength =3D (UINT32)((UINT64)Rip - Regs->Rip); - } - - return Status; -} - -/** - Handle a #VE exception. - - Performs the necessary processing to handle a #VE exception. - - @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et - as value to use on error. - @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT - - @retval EFI_SUCCESS Exception handled - @retval EFI_UNSUPPORTED #VE not supported, (new) exception value= to - propagate provided - @retval EFI_PROTOCOL_ERROR #VE handling failed, (new) exception val= ue to - propagate provided - -**/ -EFI_STATUS -EFIAPI -VmTdExitHandleVe ( - IN OUT EFI_EXCEPTION_TYPE *ExceptionType, - IN OUT EFI_SYSTEM_CONTEXT SystemContext - ) -{ - UINT64 Status; - TD_RETURN_DATA ReturnData; - EFI_SYSTEM_CONTEXT_X64 *Regs; - - Regs =3D SystemContext.SystemContextX64; - Status =3D TdCall (TDCALL_TDGETVEINFO, 0, 0, 0, &ReturnData); - ASSERT (Status =3D=3D 0); - if (Status !=3D 0) { - DEBUG ((DEBUG_ERROR, "#VE happened. TDGETVEINFO failed with Status =3D= 0x%llx\n", Status)); - TdVmCall (TDVMCALL_HALT, 0, 0, 0, 0, 0); - } - - switch (ReturnData.VeInfo.ExitReason) { - case EXIT_REASON_CPUID: - Status =3D CpuIdExit (Regs, &ReturnData.VeInfo); - DEBUG (( - DEBUG_VERBOSE, - "CPUID #VE happened, ExitReasion is %d, ExitQualification =3D 0x%x= .\n", - ReturnData.VeInfo.ExitReason, - ReturnData.VeInfo.ExitQualification.Val - )); - break; - - case EXIT_REASON_HLT: - Status =3D TdVmCall (EXIT_REASON_HLT, 0, 0, 0, 0, 0); - break; - - case EXIT_REASON_IO_INSTRUCTION: - Status =3D IoExit (Regs, &ReturnData.VeInfo); - DEBUG (( - DEBUG_VERBOSE, - "IO_Instruction #VE happened, ExitReasion is %d, ExitQualification= =3D 0x%x.\n", - ReturnData.VeInfo.ExitReason, - ReturnData.VeInfo.ExitQualification.Val - )); - break; - - case EXIT_REASON_MSR_READ: - Status =3D ReadMsrExit (Regs, &ReturnData.VeInfo); - DEBUG (( - DEBUG_VERBOSE, - "RDMSR #VE happened, ExitReasion is %d, ExitQualification =3D 0x%x= . Regs->Rcx=3D0x%llx, Status =3D 0x%llx\n", - ReturnData.VeInfo.ExitReason, - ReturnData.VeInfo.ExitQualification.Val, - Regs->Rcx, - Status - )); - break; - - case EXIT_REASON_MSR_WRITE: - Status =3D WriteMsrExit (Regs, &ReturnData.VeInfo); - DEBUG (( - DEBUG_VERBOSE, - "WRMSR #VE happened, ExitReasion is %d, ExitQualification =3D 0x%x= . Regs->Rcx=3D0x%llx, Status =3D 0x%llx\n", - ReturnData.VeInfo.ExitReason, - ReturnData.VeInfo.ExitQualification.Val, - Regs->Rcx, - Status - )); - break; - - case EXIT_REASON_EPT_VIOLATION: - Status =3D MmioExit (Regs, &ReturnData.VeInfo); - DEBUG (( - DEBUG_VERBOSE, - "MMIO #VE happened, ExitReasion is %d, ExitQualification =3D 0x%x.= \n", - ReturnData.VeInfo.ExitReason, - ReturnData.VeInfo.ExitQualification.Val - )); - break; - - case EXIT_REASON_VMCALL: - case EXIT_REASON_MWAIT_INSTRUCTION: - case EXIT_REASON_MONITOR_INSTRUCTION: - case EXIT_REASON_WBINVD: - case EXIT_REASON_RDPMC: - /* Handle as nops. */ - break; - - default: - DEBUG (( - DEBUG_ERROR, - "Unsupported #VE happened, ExitReason is %d, ExitQualification =3D= 0x%x.\n", - ReturnData.VeInfo.ExitReason, - ReturnData.VeInfo.ExitQualification.Val - )); - - ASSERT (FALSE); - CpuDeadLoop (); - } - - if (Status) { - DEBUG (( - DEBUG_ERROR, - "#VE Error (0x%llx) returned from host, ExitReason is %d, ExitQualif= ication =3D 0x%x.\n", - Status, - ReturnData.VeInfo.ExitReason, - ReturnData.VeInfo.ExitQualification.Val - )); - - TdVmCall (TDVMCALL_HALT, 0, 0, 0, 0, 0); - } - - SystemContext.SystemContextX64->Rip +=3D ReturnData.VeInfo.ExitInstructi= onLength; - return EFI_SUCCESS; -} diff --git a/OvmfPkg/Library/VmgExitLib/VmgExitLib.c b/OvmfPkg/Library/VmgE= xitLib/VmgExitLib.c deleted file mode 100644 index c20552187074..000000000000 --- a/OvmfPkg/Library/VmgExitLib/VmgExitLib.c +++ /dev/null @@ -1,238 +0,0 @@ -/** @file - VMGEXIT Support Library. - - Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include -#include -#include -#include -#include - -/** - Check for VMGEXIT error - - Check if the hypervisor has returned an error after completion of the VM= GEXIT - by examining the SwExitInfo1 field of the GHCB. - - @param[in] Ghcb A pointer to the GHCB - - @retval 0 VMGEXIT succeeded. - @return Exception number to be propagated, VMGEXIT proces= sing - did not succeed. - -**/ -STATIC -UINT64 -VmgExitErrorCheck ( - IN GHCB *Ghcb - ) -{ - GHCB_EVENT_INJECTION Event; - GHCB_EXIT_INFO ExitInfo; - UINT64 Status; - - ExitInfo.Uint64 =3D Ghcb->SaveArea.SwExitInfo1; - ASSERT ( - (ExitInfo.Elements.Lower32Bits =3D=3D 0) || - (ExitInfo.Elements.Lower32Bits =3D=3D 1) - ); - - Status =3D 0; - if (ExitInfo.Elements.Lower32Bits =3D=3D 0) { - return Status; - } - - if (ExitInfo.Elements.Lower32Bits =3D=3D 1) { - ASSERT (Ghcb->SaveArea.SwExitInfo2 !=3D 0); - - // - // Check that the return event is valid - // - Event.Uint64 =3D Ghcb->SaveArea.SwExitInfo2; - if (Event.Elements.Valid && - (Event.Elements.Type =3D=3D GHCB_EVENT_INJECTION_TYPE_EXCEPTION)) - { - switch (Event.Elements.Vector) { - case GP_EXCEPTION: - case UD_EXCEPTION: - // - // Use returned event as return code - // - Status =3D Event.Uint64; - } - } - } - - if (Status =3D=3D 0) { - GHCB_EVENT_INJECTION GpEvent; - - GpEvent.Uint64 =3D 0; - GpEvent.Elements.Vector =3D GP_EXCEPTION; - GpEvent.Elements.Type =3D GHCB_EVENT_INJECTION_TYPE_EXCEPTION; - GpEvent.Elements.Valid =3D 1; - - Status =3D GpEvent.Uint64; - } - - return Status; -} - -/** - Perform VMGEXIT. - - Sets the necessary fields of the GHCB, invokes the VMGEXIT instruction a= nd - then handles the return actions. - - @param[in, out] Ghcb A pointer to the GHCB - @param[in] ExitCode VMGEXIT code to be assigned to the SwExitCode - field of the GHCB. - @param[in] ExitInfo1 VMGEXIT information to be assigned to the - SwExitInfo1 field of the GHCB. - @param[in] ExitInfo2 VMGEXIT information to be assigned to the - SwExitInfo2 field of the GHCB. - - @retval 0 VMGEXIT succeeded. - @return Exception number to be propagated, VMGEXIT - processing did not succeed. - -**/ -UINT64 -EFIAPI -VmgExit ( - IN OUT GHCB *Ghcb, - IN UINT64 ExitCode, - IN UINT64 ExitInfo1, - IN UINT64 ExitInfo2 - ) -{ - Ghcb->SaveArea.SwExitCode =3D ExitCode; - Ghcb->SaveArea.SwExitInfo1 =3D ExitInfo1; - Ghcb->SaveArea.SwExitInfo2 =3D ExitInfo2; - - VmgSetOffsetValid (Ghcb, GhcbSwExitCode); - VmgSetOffsetValid (Ghcb, GhcbSwExitInfo1); - VmgSetOffsetValid (Ghcb, GhcbSwExitInfo2); - - // - // Guest memory is used for the guest-hypervisor communication, so fence - // the invocation of the VMGEXIT instruction to ensure GHCB accesses are - // synchronized properly. - // - MemoryFence (); - AsmVmgExit (); - MemoryFence (); - - return VmgExitErrorCheck (Ghcb); -} - -/** - Perform pre-VMGEXIT initialization/preparation. - - Performs the necessary steps in preparation for invoking VMGEXIT. Must be - called before setting any fields within the GHCB. - - @param[in, out] Ghcb A pointer to the GHCB - @param[in, out] InterruptState A pointer to hold the current interrupt - state, used for restoring in VmgDone () - -**/ -VOID -EFIAPI -VmgInit ( - IN OUT GHCB *Ghcb, - IN OUT BOOLEAN *InterruptState - ) -{ - // - // Be sure that an interrupt can't cause a #VC while the GHCB is - // being used. - // - *InterruptState =3D GetInterruptState (); - if (*InterruptState) { - DisableInterrupts (); - } - - SetMem (&Ghcb->SaveArea, sizeof (Ghcb->SaveArea), 0); -} - -/** - Perform post-VMGEXIT cleanup. - - Performs the necessary steps to cleanup after invoking VMGEXIT. Must be - called after obtaining needed fields within the GHCB. - - @param[in, out] Ghcb A pointer to the GHCB - @param[in] InterruptState An indicator to conditionally (re)enable - interrupts - -**/ -VOID -EFIAPI -VmgDone ( - IN OUT GHCB *Ghcb, - IN BOOLEAN InterruptState - ) -{ - if (InterruptState) { - EnableInterrupts (); - } -} - -/** - Marks a field at the specified offset as valid in the GHCB. - - The ValidBitmap area represents the areas of the GHCB that have been mar= ked - valid. Set the bit in ValidBitmap for the input offset. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communication Bl= ock - @param[in] Offset Qword offset in the GHCB to mark valid - -**/ -VOID -EFIAPI -VmgSetOffsetValid ( - IN OUT GHCB *Ghcb, - IN GHCB_REGISTER Offset - ) -{ - UINT32 OffsetIndex; - UINT32 OffsetBit; - - OffsetIndex =3D Offset / 8; - OffsetBit =3D Offset % 8; - - Ghcb->SaveArea.ValidBitmap[OffsetIndex] |=3D (1 << OffsetBit); -} - -/** - Checks if a specified offset is valid in the GHCB. - - The ValidBitmap area represents the areas of the GHCB that have been mar= ked - valid. Return whether the bit in the ValidBitmap is set for the input of= fset. - - @param[in] Ghcb A pointer to the GHCB - @param[in] Offset Qword offset in the GHCB to mark valid - - @retval TRUE Offset is marked valid in the GHCB - @retval FALSE Offset is not marked valid in the GHCB - -**/ -BOOLEAN -EFIAPI -VmgIsOffsetValid ( - IN GHCB *Ghcb, - IN GHCB_REGISTER Offset - ) -{ - UINT32 OffsetIndex; - UINT32 OffsetBit; - - OffsetIndex =3D Offset / 8; - OffsetBit =3D Offset % 8; - - return ((Ghcb->SaveArea.ValidBitmap[OffsetIndex] & (1 << OffsetBit)) != =3D 0); -} diff --git a/OvmfPkg/Library/VmgExitLib/VmgExitLib.inf b/OvmfPkg/Library/Vm= gExitLib/VmgExitLib.inf deleted file mode 100644 index 255b0c1a2f7f..000000000000 --- a/OvmfPkg/Library/VmgExitLib/VmgExitLib.inf +++ /dev/null @@ -1,45 +0,0 @@ -## @file -# VMGEXIT Support Library. -# -# Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved. -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -## - -[Defines] - INF_VERSION =3D 0x00010005 - BASE_NAME =3D VmgExitLib - FILE_GUID =3D 0e923c25-13cd-430b-8714-ffe85652a97b - MODULE_TYPE =3D BASE - VERSION_STRING =3D 1.0 - LIBRARY_CLASS =3D VmgExitLib|PEIM DXE_CORE DXE_DRIVER D= XE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_DRIVER - -# -# The following information is for reference only and not required by the = build tools. -# -# VALID_ARCHITECTURES =3D X64 -# - -[Sources.common] - VmgExitLib.c - VmgExitVcHandler.c - VmgExitVcHandler.h - PeiDxeVmgExitVcHandler.c - VmTdExitVeHandler.c - X64/TdVmcallCpuid.nasm - -[Packages] - MdePkg/MdePkg.dec - OvmfPkg/OvmfPkg.dec - UefiCpuPkg/UefiCpuPkg.dec - -[LibraryClasses] - BaseLib - BaseMemoryLib - DebugLib - LocalApicLib - MemEncryptSevLib - -[Pcd] - gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase - gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidSize diff --git a/OvmfPkg/Library/VmgExitLib/VmgExitVcHandler.c b/OvmfPkg/Librar= y/VmgExitLib/VmgExitVcHandler.c deleted file mode 100644 index a4393dffbd63..000000000000 --- a/OvmfPkg/Library/VmgExitLib/VmgExitVcHandler.c +++ /dev/null @@ -1,2356 +0,0 @@ -/** @file - X64 #VC Exception Handler functon. - - Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "VmgExitVcHandler.h" -// #include - -// -// Instruction execution mode definition -// -typedef enum { - LongMode64Bit =3D 0, - LongModeCompat32Bit, - LongModeCompat16Bit, -} SEV_ES_INSTRUCTION_MODE; - -// -// Instruction size definition (for operand and address) -// -typedef enum { - Size8Bits =3D 0, - Size16Bits, - Size32Bits, - Size64Bits, -} SEV_ES_INSTRUCTION_SIZE; - -// -// Intruction segment definition -// -typedef enum { - SegmentEs =3D 0, - SegmentCs, - SegmentSs, - SegmentDs, - SegmentFs, - SegmentGs, -} SEV_ES_INSTRUCTION_SEGMENT; - -// -// Instruction rep function definition -// -typedef enum { - RepNone =3D 0, - RepZ, - RepNZ, -} SEV_ES_INSTRUCTION_REP; - -typedef struct { - UINT8 Rm; - UINT8 Reg; - UINT8 Mod; -} SEV_ES_INSTRUCTION_MODRM_EXT; - -typedef struct { - UINT8 Base; - UINT8 Index; - UINT8 Scale; -} SEV_ES_INSTRUCTION_SIB_EXT; - -// -// Instruction opcode definition -// -typedef struct { - SEV_ES_INSTRUCTION_MODRM_EXT ModRm; - - SEV_ES_INSTRUCTION_SIB_EXT Sib; - - UINTN RegData; - UINTN RmData; -} SEV_ES_INSTRUCTION_OPCODE_EXT; - -// -// Instruction parsing context definition -// -typedef struct { - GHCB *Ghcb; - - SEV_ES_INSTRUCTION_MODE Mode; - SEV_ES_INSTRUCTION_SIZE DataSize; - SEV_ES_INSTRUCTION_SIZE AddrSize; - BOOLEAN SegmentSpecified; - SEV_ES_INSTRUCTION_SEGMENT Segment; - SEV_ES_INSTRUCTION_REP RepMode; - - UINT8 *Begin; - UINT8 *End; - - UINT8 *Prefixes; - UINT8 *OpCodes; - UINT8 *Displacement; - UINT8 *Immediate; - - INSTRUCTION_REX_PREFIX RexPrefix; - - BOOLEAN ModRmPresent; - INSTRUCTION_MODRM ModRm; - - BOOLEAN SibPresent; - INSTRUCTION_SIB Sib; - - UINTN PrefixSize; - UINTN OpCodeSize; - UINTN DisplacementSize; - UINTN ImmediateSize; - - SEV_ES_INSTRUCTION_OPCODE_EXT Ext; -} SEV_ES_INSTRUCTION_DATA; - -// -// Non-automatic Exit function prototype -// -typedef -UINT64 -(*NAE_EXIT) ( - GHCB *Ghcb, - EFI_SYSTEM_CONTEXT_X64 *Regs, - SEV_ES_INSTRUCTION_DATA *InstructionData - ); - -// -// SEV-SNP Cpuid table entry/function -// -typedef PACKED struct { - UINT32 EaxIn; - UINT32 EcxIn; - UINT64 Unused; - UINT64 Unused2; - UINT32 Eax; - UINT32 Ebx; - UINT32 Ecx; - UINT32 Edx; - UINT64 Reserved; -} SEV_SNP_CPUID_FUNCTION; - -// -// SEV-SNP Cpuid page format -// -typedef PACKED struct { - UINT32 Count; - UINT32 Reserved1; - UINT64 Reserved2; - SEV_SNP_CPUID_FUNCTION function[0]; -} SEV_SNP_CPUID_INFO; - -/** - Return a pointer to the contents of the specified register. - - Based upon the input register, return a pointer to the registers contents - in the x86 processor context. - - @param[in] Regs x64 processor context - @param[in] Register Register to obtain pointer for - - @return Pointer to the contents of the requested register - -**/ -STATIC -UINT64 * -GetRegisterPointer ( - IN EFI_SYSTEM_CONTEXT_X64 *Regs, - IN UINT8 Register - ) -{ - UINT64 *Reg; - - switch (Register) { - case 0: - Reg =3D &Regs->Rax; - break; - case 1: - Reg =3D &Regs->Rcx; - break; - case 2: - Reg =3D &Regs->Rdx; - break; - case 3: - Reg =3D &Regs->Rbx; - break; - case 4: - Reg =3D &Regs->Rsp; - break; - case 5: - Reg =3D &Regs->Rbp; - break; - case 6: - Reg =3D &Regs->Rsi; - break; - case 7: - Reg =3D &Regs->Rdi; - break; - case 8: - Reg =3D &Regs->R8; - break; - case 9: - Reg =3D &Regs->R9; - break; - case 10: - Reg =3D &Regs->R10; - break; - case 11: - Reg =3D &Regs->R11; - break; - case 12: - Reg =3D &Regs->R12; - break; - case 13: - Reg =3D &Regs->R13; - break; - case 14: - Reg =3D &Regs->R14; - break; - case 15: - Reg =3D &Regs->R15; - break; - default: - Reg =3D NULL; - } - - ASSERT (Reg !=3D NULL); - - return Reg; -} - -/** - Update the instruction parsing context for displacement bytes. - - @param[in, out] InstructionData Instruction parsing context - @param[in] Size The instruction displacement size - -**/ -STATIC -VOID -UpdateForDisplacement ( - IN OUT SEV_ES_INSTRUCTION_DATA *InstructionData, - IN UINTN Size - ) -{ - InstructionData->DisplacementSize =3D Size; - InstructionData->Immediate +=3D Size; - InstructionData->End +=3D Size; -} - -/** - Determine if an instruction address if RIP relative. - - Examine the instruction parsing context to determine if the address offs= et - is relative to the instruction pointer. - - @param[in] InstructionData Instruction parsing context - - @retval TRUE Instruction addressing is RIP relative - @retval FALSE Instruction addressing is not RIP relative - -**/ -STATIC -BOOLEAN -IsRipRelative ( - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - SEV_ES_INSTRUCTION_OPCODE_EXT *Ext; - - Ext =3D &InstructionData->Ext; - - return ((InstructionData->Mode =3D=3D LongMode64Bit) && - (Ext->ModRm.Mod =3D=3D 0) && - (Ext->ModRm.Rm =3D=3D 5) && - (InstructionData->SibPresent =3D=3D FALSE)); -} - -/** - Return the effective address of a memory operand. - - Examine the instruction parsing context to obtain the effective memory - address of a memory operand. - - @param[in] Regs x64 processor context - @param[in] InstructionData Instruction parsing context - - @return The memory operand effective address - -**/ -STATIC -UINT64 -GetEffectiveMemoryAddress ( - IN EFI_SYSTEM_CONTEXT_X64 *Regs, - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - SEV_ES_INSTRUCTION_OPCODE_EXT *Ext; - UINT64 EffectiveAddress; - - Ext =3D &InstructionData->Ext; - EffectiveAddress =3D 0; - - if (IsRipRelative (InstructionData)) { - // - // RIP-relative displacement is a 32-bit signed value - // - INT32 RipRelative; - - RipRelative =3D *(INT32 *)InstructionData->Displacement; - - UpdateForDisplacement (InstructionData, 4); - - // - // Negative displacement is handled by standard UINT64 wrap-around. - // - return Regs->Rip + (UINT64)RipRelative; - } - - switch (Ext->ModRm.Mod) { - case 1: - UpdateForDisplacement (InstructionData, 1); - EffectiveAddress +=3D (UINT64)(*(INT8 *)(InstructionData->Displaceme= nt)); - break; - case 2: - switch (InstructionData->AddrSize) { - case Size16Bits: - UpdateForDisplacement (InstructionData, 2); - EffectiveAddress +=3D (UINT64)(*(INT16 *)(InstructionData->Displ= acement)); - break; - default: - UpdateForDisplacement (InstructionData, 4); - EffectiveAddress +=3D (UINT64)(*(INT32 *)(InstructionData->Displ= acement)); - break; - } - - break; - } - - if (InstructionData->SibPresent) { - INT64 Displacement; - - if (Ext->Sib.Index !=3D 4) { - CopyMem ( - &Displacement, - GetRegisterPointer (Regs, Ext->Sib.Index), - sizeof (Displacement) - ); - Displacement *=3D (INT64)(1 << Ext->Sib.Scale); - - // - // Negative displacement is handled by standard UINT64 wrap-around. - // - EffectiveAddress +=3D (UINT64)Displacement; - } - - if ((Ext->Sib.Base !=3D 5) || Ext->ModRm.Mod) { - EffectiveAddress +=3D *GetRegisterPointer (Regs, Ext->Sib.Base); - } else { - UpdateForDisplacement (InstructionData, 4); - EffectiveAddress +=3D (UINT64)(*(INT32 *)(InstructionData->Displacem= ent)); - } - } else { - EffectiveAddress +=3D *GetRegisterPointer (Regs, Ext->ModRm.Rm); - } - - return EffectiveAddress; -} - -/** - Decode a ModRM byte. - - Examine the instruction parsing context to decode a ModRM byte and the S= IB - byte, if present. - - @param[in] Regs x64 processor context - @param[in, out] InstructionData Instruction parsing context - -**/ -STATIC -VOID -DecodeModRm ( - IN EFI_SYSTEM_CONTEXT_X64 *Regs, - IN OUT SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - SEV_ES_INSTRUCTION_OPCODE_EXT *Ext; - INSTRUCTION_REX_PREFIX *RexPrefix; - INSTRUCTION_MODRM *ModRm; - INSTRUCTION_SIB *Sib; - - RexPrefix =3D &InstructionData->RexPrefix; - Ext =3D &InstructionData->Ext; - ModRm =3D &InstructionData->ModRm; - Sib =3D &InstructionData->Sib; - - InstructionData->ModRmPresent =3D TRUE; - ModRm->Uint8 =3D *(InstructionData->End); - - InstructionData->Displacement++; - InstructionData->Immediate++; - InstructionData->End++; - - Ext->ModRm.Mod =3D ModRm->Bits.Mod; - Ext->ModRm.Reg =3D (RexPrefix->Bits.BitR << 3) | ModRm->Bits.Reg; - Ext->ModRm.Rm =3D (RexPrefix->Bits.BitB << 3) | ModRm->Bits.Rm; - - Ext->RegData =3D *GetRegisterPointer (Regs, Ext->ModRm.Reg); - - if (Ext->ModRm.Mod =3D=3D 3) { - Ext->RmData =3D *GetRegisterPointer (Regs, Ext->ModRm.Rm); - } else { - if (ModRm->Bits.Rm =3D=3D 4) { - InstructionData->SibPresent =3D TRUE; - Sib->Uint8 =3D *(InstructionData->End); - - InstructionData->Displacement++; - InstructionData->Immediate++; - InstructionData->End++; - - Ext->Sib.Scale =3D Sib->Bits.Scale; - Ext->Sib.Index =3D (RexPrefix->Bits.BitX << 3) | Sib->Bits.Index; - Ext->Sib.Base =3D (RexPrefix->Bits.BitB << 3) | Sib->Bits.Base; - } - - Ext->RmData =3D GetEffectiveMemoryAddress (Regs, InstructionData); - } -} - -/** - Decode instruction prefixes. - - Parse the instruction data to track the instruction prefixes that have - been used. - - @param[in] Regs x64 processor context - @param[in, out] InstructionData Instruction parsing context - -**/ -STATIC -VOID -DecodePrefixes ( - IN EFI_SYSTEM_CONTEXT_X64 *Regs, - IN OUT SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - SEV_ES_INSTRUCTION_MODE Mode; - SEV_ES_INSTRUCTION_SIZE ModeDataSize; - SEV_ES_INSTRUCTION_SIZE ModeAddrSize; - UINT8 *Byte; - - // - // Always in 64-bit mode - // - Mode =3D LongMode64Bit; - ModeDataSize =3D Size32Bits; - ModeAddrSize =3D Size64Bits; - - InstructionData->Mode =3D Mode; - InstructionData->DataSize =3D ModeDataSize; - InstructionData->AddrSize =3D ModeAddrSize; - - InstructionData->Prefixes =3D InstructionData->Begin; - - Byte =3D InstructionData->Prefixes; - for ( ; ; Byte++, InstructionData->PrefixSize++) { - // - // Check the 0x40 to 0x4F range using an if statement here since some - // compilers don't like the "case 0x40 ... 0x4F:" syntax. This avoids - // 16 case statements below. - // - if ((*Byte >=3D REX_PREFIX_START) && (*Byte <=3D REX_PREFIX_STOP)) { - InstructionData->RexPrefix.Uint8 =3D *Byte; - if ((*Byte & REX_64BIT_OPERAND_SIZE_MASK) !=3D 0) { - InstructionData->DataSize =3D Size64Bits; - } - - continue; - } - - switch (*Byte) { - case OVERRIDE_SEGMENT_CS: - case OVERRIDE_SEGMENT_DS: - case OVERRIDE_SEGMENT_ES: - case OVERRIDE_SEGMENT_SS: - if (Mode !=3D LongMode64Bit) { - InstructionData->SegmentSpecified =3D TRUE; - InstructionData->Segment =3D (*Byte >> 3) & 3; - } - - break; - - case OVERRIDE_SEGMENT_FS: - case OVERRIDE_SEGMENT_GS: - InstructionData->SegmentSpecified =3D TRUE; - InstructionData->Segment =3D *Byte & 7; - break; - - case OVERRIDE_OPERAND_SIZE: - if (InstructionData->RexPrefix.Uint8 =3D=3D 0) { - InstructionData->DataSize =3D - (Mode =3D=3D LongMode64Bit) ? Size16Bits : - (Mode =3D=3D LongModeCompat32Bit) ? Size16Bits : - (Mode =3D=3D LongModeCompat16Bit) ? Size32Bits : 0; - } - - break; - - case OVERRIDE_ADDRESS_SIZE: - InstructionData->AddrSize =3D - (Mode =3D=3D LongMode64Bit) ? Size32Bits : - (Mode =3D=3D LongModeCompat32Bit) ? Size16Bits : - (Mode =3D=3D LongModeCompat16Bit) ? Size32Bits : 0; - break; - - case LOCK_PREFIX: - break; - - case REPZ_PREFIX: - InstructionData->RepMode =3D RepZ; - break; - - case REPNZ_PREFIX: - InstructionData->RepMode =3D RepNZ; - break; - - default: - InstructionData->OpCodes =3D Byte; - InstructionData->OpCodeSize =3D (*Byte =3D=3D TWO_BYTE_OPCODE_ESCA= PE) ? 2 : 1; - - InstructionData->End =3D Byte + InstructionData->OpCodeSi= ze; - InstructionData->Displacement =3D InstructionData->End; - InstructionData->Immediate =3D InstructionData->End; - return; - } - } -} - -/** - Determine instruction length - - Return the total length of the parsed instruction. - - @param[in] InstructionData Instruction parsing context - - @return Length of parsed instruction - -**/ -STATIC -UINT64 -InstructionLength ( - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - return (UINT64)(InstructionData->End - InstructionData->Begin); -} - -/** - Initialize the instruction parsing context. - - Initialize the instruction parsing context, which includes decoding the - instruction prefixes. - - @param[in, out] InstructionData Instruction parsing context - @param[in] Ghcb Pointer to the Guest-Hypervisor Communi= cation - Block - @param[in] Regs x64 processor context - -**/ -STATIC -VOID -InitInstructionData ( - IN OUT SEV_ES_INSTRUCTION_DATA *InstructionData, - IN GHCB *Ghcb, - IN EFI_SYSTEM_CONTEXT_X64 *Regs - ) -{ - SetMem (InstructionData, sizeof (*InstructionData), 0); - InstructionData->Ghcb =3D Ghcb; - InstructionData->Begin =3D (UINT8 *)Regs->Rip; - InstructionData->End =3D (UINT8 *)Regs->Rip; - - DecodePrefixes (Regs, InstructionData); -} - -/** - Report an unsupported event to the hypervisor - - Use the VMGEXIT support to report an unsupported event to the hypervisor. - - @param[in] Ghcb Pointer to the Guest-Hypervisor Communication - Block - @param[in] Regs x64 processor context - @param[in] InstructionData Instruction parsing context - - @return New exception value to propagate - -**/ -STATIC -UINT64 -UnsupportedExit ( - IN GHCB *Ghcb, - IN EFI_SYSTEM_CONTEXT_X64 *Regs, - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - UINT64 Status; - - Status =3D VmgExit (Ghcb, SVM_EXIT_UNSUPPORTED, Regs->ExceptionData, 0); - if (Status =3D=3D 0) { - GHCB_EVENT_INJECTION Event; - - Event.Uint64 =3D 0; - Event.Elements.Vector =3D GP_EXCEPTION; - Event.Elements.Type =3D GHCB_EVENT_INJECTION_TYPE_EXCEPTION; - Event.Elements.Valid =3D 1; - - Status =3D Event.Uint64; - } - - return Status; -} - -/** - Validate that the MMIO memory access is not to encrypted memory. - - Examine the pagetable entry for the memory specified. MMIO should not be - performed against encrypted memory. MMIO to the APIC page is always allo= wed. - - @param[in] Ghcb Pointer to the Guest-Hypervisor Communication = Block - @param[in] MemoryAddress Memory address to validate - @param[in] MemoryLength Memory length to validate - - @retval 0 Memory is not encrypted - @return New exception value to propogate - -**/ -STATIC -UINT64 -ValidateMmioMemory ( - IN GHCB *Ghcb, - IN UINTN MemoryAddress, - IN UINTN MemoryLength - ) -{ - MEM_ENCRYPT_SEV_ADDRESS_RANGE_STATE State; - GHCB_EVENT_INJECTION GpEvent; - UINTN Address; - - // - // Allow APIC accesses (which will have the encryption bit set during - // SEC and PEI phases). - // - Address =3D MemoryAddress & ~(SIZE_4KB - 1); - if (Address =3D=3D GetLocalApicBaseAddress ()) { - return 0; - } - - State =3D MemEncryptSevGetAddressRangeState ( - 0, - MemoryAddress, - MemoryLength - ); - if (State =3D=3D MemEncryptSevAddressRangeUnencrypted) { - return 0; - } - - // - // Any state other than unencrypted is an error, issue a #GP. - // - DEBUG (( - DEBUG_ERROR, - "MMIO using encrypted memory: %lx\n", - (UINT64)MemoryAddress - )); - GpEvent.Uint64 =3D 0; - GpEvent.Elements.Vector =3D GP_EXCEPTION; - GpEvent.Elements.Type =3D GHCB_EVENT_INJECTION_TYPE_EXCEPTION; - GpEvent.Elements.Valid =3D 1; - - return GpEvent.Uint64; -} - -/** - Handle an MMIO event. - - Use the VMGEXIT instruction to handle either an MMIO read or an MMIO wri= te. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation - Block - @param[in, out] Regs x64 processor context - @param[in, out] InstructionData Instruction parsing context - - @retval 0 Event handled successfully - @return New exception value to propagate - -**/ -STATIC -UINT64 -MmioExit ( - IN OUT GHCB *Ghcb, - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN OUT SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - UINT64 ExitInfo1, ExitInfo2, Status; - UINTN Bytes; - UINT64 *Register; - UINT8 OpCode, SignByte; - UINTN Address; - - Bytes =3D 0; - - OpCode =3D *(InstructionData->OpCodes); - if (OpCode =3D=3D TWO_BYTE_OPCODE_ESCAPE) { - OpCode =3D *(InstructionData->OpCodes + 1); - } - - switch (OpCode) { - // - // MMIO write (MOV reg/memX, regX) - // - case 0x88: - Bytes =3D 1; - // - // fall through - // - case 0x89: - DecodeModRm (Regs, InstructionData); - Bytes =3D ((Bytes !=3D 0) ? Bytes : - (InstructionData->DataSize =3D=3D Size16Bits) ? 2 : - (InstructionData->DataSize =3D=3D Size32Bits) ? 4 : - (InstructionData->DataSize =3D=3D Size64Bits) ? 8 : - 0); - - if (InstructionData->Ext.ModRm.Mod =3D=3D 3) { - // - // NPF on two register operands??? - // - return UnsupportedExit (Ghcb, Regs, InstructionData); - } - - Status =3D ValidateMmioMemory (Ghcb, InstructionData->Ext.RmData, By= tes); - if (Status !=3D 0) { - return Status; - } - - ExitInfo1 =3D InstructionData->Ext.RmData; - ExitInfo2 =3D Bytes; - CopyMem (Ghcb->SharedBuffer, &InstructionData->Ext.RegData, Bytes); - - Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; - VmgSetOffsetValid (Ghcb, GhcbSwScratch); - Status =3D VmgExit (Ghcb, SVM_EXIT_MMIO_WRITE, ExitInfo1, ExitInfo2); - if (Status !=3D 0) { - return Status; - } - - break; - - // - // MMIO write (MOV moffsetX, aX) - // - case 0xA2: - Bytes =3D 1; - // - // fall through - // - case 0xA3: - Bytes =3D ((Bytes !=3D 0) ? Bytes : - (InstructionData->DataSize =3D=3D Size16Bits) ? 2 : - (InstructionData->DataSize =3D=3D Size32Bits) ? 4 : - (InstructionData->DataSize =3D=3D Size64Bits) ? 8 : - 0); - - InstructionData->ImmediateSize =3D (UINTN)(1 << InstructionData->Add= rSize); - InstructionData->End +=3D InstructionData->ImmediateSize; - - // - // This code is X64 only, so a possible 8-byte copy to a UINTN is ok. - // Use a STATIC_ASSERT to be certain the code is being built as X64. - // - STATIC_ASSERT ( - sizeof (UINTN) =3D=3D sizeof (UINT64), - "sizeof (UINTN) !=3D sizeof (UINT64), this file must be built as X= 64" - ); - - Address =3D 0; - CopyMem ( - &Address, - InstructionData->Immediate, - InstructionData->ImmediateSize - ); - - Status =3D ValidateMmioMemory (Ghcb, Address, Bytes); - if (Status !=3D 0) { - return Status; - } - - ExitInfo1 =3D Address; - ExitInfo2 =3D Bytes; - CopyMem (Ghcb->SharedBuffer, &Regs->Rax, Bytes); - - Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; - VmgSetOffsetValid (Ghcb, GhcbSwScratch); - Status =3D VmgExit (Ghcb, SVM_EXIT_MMIO_WRITE, ExitInfo1, ExitInfo2); - if (Status !=3D 0) { - return Status; - } - - break; - - // - // MMIO write (MOV reg/memX, immX) - // - case 0xC6: - Bytes =3D 1; - // - // fall through - // - case 0xC7: - DecodeModRm (Regs, InstructionData); - Bytes =3D ((Bytes !=3D 0) ? Bytes : - (InstructionData->DataSize =3D=3D Size16Bits) ? 2 : - (InstructionData->DataSize =3D=3D Size32Bits) ? 4 : - 0); - - InstructionData->ImmediateSize =3D Bytes; - InstructionData->End +=3D Bytes; - - Status =3D ValidateMmioMemory (Ghcb, InstructionData->Ext.RmData, By= tes); - if (Status !=3D 0) { - return Status; - } - - ExitInfo1 =3D InstructionData->Ext.RmData; - ExitInfo2 =3D Bytes; - CopyMem (Ghcb->SharedBuffer, InstructionData->Immediate, Bytes); - - Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; - VmgSetOffsetValid (Ghcb, GhcbSwScratch); - Status =3D VmgExit (Ghcb, SVM_EXIT_MMIO_WRITE, ExitInfo1, ExitInfo2); - if (Status !=3D 0) { - return Status; - } - - break; - - // - // MMIO read (MOV regX, reg/memX) - // - case 0x8A: - Bytes =3D 1; - // - // fall through - // - case 0x8B: - DecodeModRm (Regs, InstructionData); - Bytes =3D ((Bytes !=3D 0) ? Bytes : - (InstructionData->DataSize =3D=3D Size16Bits) ? 2 : - (InstructionData->DataSize =3D=3D Size32Bits) ? 4 : - (InstructionData->DataSize =3D=3D Size64Bits) ? 8 : - 0); - if (InstructionData->Ext.ModRm.Mod =3D=3D 3) { - // - // NPF on two register operands??? - // - return UnsupportedExit (Ghcb, Regs, InstructionData); - } - - Status =3D ValidateMmioMemory (Ghcb, InstructionData->Ext.RmData, By= tes); - if (Status !=3D 0) { - return Status; - } - - ExitInfo1 =3D InstructionData->Ext.RmData; - ExitInfo2 =3D Bytes; - - Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; - VmgSetOffsetValid (Ghcb, GhcbSwScratch); - Status =3D VmgExit (Ghcb, SVM_EXIT_MMIO_READ, ExitInfo1, ExitInfo2); - if (Status !=3D 0) { - return Status; - } - - Register =3D GetRegisterPointer (Regs, InstructionData->Ext.ModRm.Re= g); - if (Bytes =3D=3D 4) { - // - // Zero-extend for 32-bit operation - // - *Register =3D 0; - } - - CopyMem (Register, Ghcb->SharedBuffer, Bytes); - break; - - // - // MMIO read (MOV aX, moffsetX) - // - case 0xA0: - Bytes =3D 1; - // - // fall through - // - case 0xA1: - Bytes =3D ((Bytes !=3D 0) ? Bytes : - (InstructionData->DataSize =3D=3D Size16Bits) ? 2 : - (InstructionData->DataSize =3D=3D Size32Bits) ? 4 : - (InstructionData->DataSize =3D=3D Size64Bits) ? 8 : - 0); - - InstructionData->ImmediateSize =3D (UINTN)(1 << InstructionData->Add= rSize); - InstructionData->End +=3D InstructionData->ImmediateSize; - - // - // This code is X64 only, so a possible 8-byte copy to a UINTN is ok. - // Use a STATIC_ASSERT to be certain the code is being built as X64. - // - STATIC_ASSERT ( - sizeof (UINTN) =3D=3D sizeof (UINT64), - "sizeof (UINTN) !=3D sizeof (UINT64), this file must be built as X= 64" - ); - - Address =3D 0; - CopyMem ( - &Address, - InstructionData->Immediate, - InstructionData->ImmediateSize - ); - - Status =3D ValidateMmioMemory (Ghcb, Address, Bytes); - if (Status !=3D 0) { - return Status; - } - - ExitInfo1 =3D Address; - ExitInfo2 =3D Bytes; - - Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; - VmgSetOffsetValid (Ghcb, GhcbSwScratch); - Status =3D VmgExit (Ghcb, SVM_EXIT_MMIO_READ, ExitInfo1, ExitInfo2); - if (Status !=3D 0) { - return Status; - } - - if (Bytes =3D=3D 4) { - // - // Zero-extend for 32-bit operation - // - Regs->Rax =3D 0; - } - - CopyMem (&Regs->Rax, Ghcb->SharedBuffer, Bytes); - break; - - // - // MMIO read w/ zero-extension ((MOVZX regX, reg/memX) - // - case 0xB6: - Bytes =3D 1; - // - // fall through - // - case 0xB7: - DecodeModRm (Regs, InstructionData); - Bytes =3D (Bytes !=3D 0) ? Bytes : 2; - - Status =3D ValidateMmioMemory (Ghcb, InstructionData->Ext.RmData, By= tes); - if (Status !=3D 0) { - return Status; - } - - ExitInfo1 =3D InstructionData->Ext.RmData; - ExitInfo2 =3D Bytes; - - Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; - VmgSetOffsetValid (Ghcb, GhcbSwScratch); - Status =3D VmgExit (Ghcb, SVM_EXIT_MMIO_READ, ExitInfo1, ExitInfo2); - if (Status !=3D 0) { - return Status; - } - - Register =3D GetRegisterPointer (Regs, InstructionData->Ext.ModRm.Re= g); - SetMem (Register, (UINTN)(1 << InstructionData->DataSize), 0); - CopyMem (Register, Ghcb->SharedBuffer, Bytes); - break; - - // - // MMIO read w/ sign-extension (MOVSX regX, reg/memX) - // - case 0xBE: - Bytes =3D 1; - // - // fall through - // - case 0xBF: - DecodeModRm (Regs, InstructionData); - Bytes =3D (Bytes !=3D 0) ? Bytes : 2; - - Status =3D ValidateMmioMemory (Ghcb, InstructionData->Ext.RmData, By= tes); - if (Status !=3D 0) { - return Status; - } - - ExitInfo1 =3D InstructionData->Ext.RmData; - ExitInfo2 =3D Bytes; - - Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; - VmgSetOffsetValid (Ghcb, GhcbSwScratch); - Status =3D VmgExit (Ghcb, SVM_EXIT_MMIO_READ, ExitInfo1, ExitInfo2); - if (Status !=3D 0) { - return Status; - } - - if (Bytes =3D=3D 1) { - UINT8 *Data; - - Data =3D (UINT8 *)Ghcb->SharedBuffer; - SignByte =3D ((*Data & BIT7) !=3D 0) ? 0xFF : 0x00; - } else { - UINT16 *Data; - - Data =3D (UINT16 *)Ghcb->SharedBuffer; - SignByte =3D ((*Data & BIT15) !=3D 0) ? 0xFF : 0x00; - } - - Register =3D GetRegisterPointer (Regs, InstructionData->Ext.ModRm.Re= g); - SetMem (Register, (UINTN)(1 << InstructionData->DataSize), SignByte); - CopyMem (Register, Ghcb->SharedBuffer, Bytes); - break; - - default: - DEBUG ((DEBUG_ERROR, "Invalid MMIO opcode (%x)\n", OpCode)); - Status =3D GP_EXCEPTION; - ASSERT (FALSE); - } - - return Status; -} - -/** - Handle a MWAIT event. - - Use the VMGEXIT instruction to handle a MWAIT event. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation - Block - @param[in, out] Regs x64 processor context - @param[in] InstructionData Instruction parsing context - - @retval 0 Event handled successfully - @return New exception value to propagate - -**/ -STATIC -UINT64 -MwaitExit ( - IN OUT GHCB *Ghcb, - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - DecodeModRm (Regs, InstructionData); - - Ghcb->SaveArea.Rax =3D Regs->Rax; - VmgSetOffsetValid (Ghcb, GhcbRax); - Ghcb->SaveArea.Rcx =3D Regs->Rcx; - VmgSetOffsetValid (Ghcb, GhcbRcx); - - return VmgExit (Ghcb, SVM_EXIT_MWAIT, 0, 0); -} - -/** - Handle a MONITOR event. - - Use the VMGEXIT instruction to handle a MONITOR event. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation - Block - @param[in, out] Regs x64 processor context - @param[in] InstructionData Instruction parsing context - - @retval 0 Event handled successfully - @return New exception value to propagate - -**/ -STATIC -UINT64 -MonitorExit ( - IN OUT GHCB *Ghcb, - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - DecodeModRm (Regs, InstructionData); - - Ghcb->SaveArea.Rax =3D Regs->Rax; // Identity mapped, so VA =3D PA - VmgSetOffsetValid (Ghcb, GhcbRax); - Ghcb->SaveArea.Rcx =3D Regs->Rcx; - VmgSetOffsetValid (Ghcb, GhcbRcx); - Ghcb->SaveArea.Rdx =3D Regs->Rdx; - VmgSetOffsetValid (Ghcb, GhcbRdx); - - return VmgExit (Ghcb, SVM_EXIT_MONITOR, 0, 0); -} - -/** - Handle a WBINVD event. - - Use the VMGEXIT instruction to handle a WBINVD event. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation - Block - @param[in, out] Regs x64 processor context - @param[in] InstructionData Instruction parsing context - - @retval 0 Event handled successfully - @return New exception value to propagate - -**/ -STATIC -UINT64 -WbinvdExit ( - IN OUT GHCB *Ghcb, - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - return VmgExit (Ghcb, SVM_EXIT_WBINVD, 0, 0); -} - -/** - Handle a RDTSCP event. - - Use the VMGEXIT instruction to handle a RDTSCP event. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation - Block - @param[in, out] Regs x64 processor context - @param[in] InstructionData Instruction parsing context - - @retval 0 Event handled successfully - @return New exception value to propagate - -**/ -STATIC -UINT64 -RdtscpExit ( - IN OUT GHCB *Ghcb, - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - UINT64 Status; - - DecodeModRm (Regs, InstructionData); - - Status =3D VmgExit (Ghcb, SVM_EXIT_RDTSCP, 0, 0); - if (Status !=3D 0) { - return Status; - } - - if (!VmgIsOffsetValid (Ghcb, GhcbRax) || - !VmgIsOffsetValid (Ghcb, GhcbRcx) || - !VmgIsOffsetValid (Ghcb, GhcbRdx)) - { - return UnsupportedExit (Ghcb, Regs, InstructionData); - } - - Regs->Rax =3D Ghcb->SaveArea.Rax; - Regs->Rcx =3D Ghcb->SaveArea.Rcx; - Regs->Rdx =3D Ghcb->SaveArea.Rdx; - - return 0; -} - -/** - Handle a VMMCALL event. - - Use the VMGEXIT instruction to handle a VMMCALL event. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation - Block - @param[in, out] Regs x64 processor context - @param[in] InstructionData Instruction parsing context - - @retval 0 Event handled successfully - @return New exception value to propagate - -**/ -STATIC -UINT64 -VmmCallExit ( - IN OUT GHCB *Ghcb, - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - UINT64 Status; - - DecodeModRm (Regs, InstructionData); - - Ghcb->SaveArea.Rax =3D Regs->Rax; - VmgSetOffsetValid (Ghcb, GhcbRax); - Ghcb->SaveArea.Cpl =3D (UINT8)(Regs->Cs & 0x3); - VmgSetOffsetValid (Ghcb, GhcbCpl); - - Status =3D VmgExit (Ghcb, SVM_EXIT_VMMCALL, 0, 0); - if (Status !=3D 0) { - return Status; - } - - if (!VmgIsOffsetValid (Ghcb, GhcbRax)) { - return UnsupportedExit (Ghcb, Regs, InstructionData); - } - - Regs->Rax =3D Ghcb->SaveArea.Rax; - - return 0; -} - -/** - Handle an MSR event. - - Use the VMGEXIT instruction to handle either a RDMSR or WRMSR event. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation - Block - @param[in, out] Regs x64 processor context - @param[in] InstructionData Instruction parsing context - - @retval 0 Event handled successfully - @return New exception value to propagate - -**/ -STATIC -UINT64 -MsrExit ( - IN OUT GHCB *Ghcb, - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - UINT64 ExitInfo1, Status; - - ExitInfo1 =3D 0; - - switch (*(InstructionData->OpCodes + 1)) { - case 0x30: // WRMSR - ExitInfo1 =3D 1; - Ghcb->SaveArea.Rax =3D Regs->Rax; - VmgSetOffsetValid (Ghcb, GhcbRax); - Ghcb->SaveArea.Rdx =3D Regs->Rdx; - VmgSetOffsetValid (Ghcb, GhcbRdx); - // - // fall through - // - case 0x32: // RDMSR - Ghcb->SaveArea.Rcx =3D Regs->Rcx; - VmgSetOffsetValid (Ghcb, GhcbRcx); - break; - default: - return UnsupportedExit (Ghcb, Regs, InstructionData); - } - - Status =3D VmgExit (Ghcb, SVM_EXIT_MSR, ExitInfo1, 0); - if (Status !=3D 0) { - return Status; - } - - if (ExitInfo1 =3D=3D 0) { - if (!VmgIsOffsetValid (Ghcb, GhcbRax) || - !VmgIsOffsetValid (Ghcb, GhcbRdx)) - { - return UnsupportedExit (Ghcb, Regs, InstructionData); - } - - Regs->Rax =3D Ghcb->SaveArea.Rax; - Regs->Rdx =3D Ghcb->SaveArea.Rdx; - } - - return 0; -} - -/** - Build the IOIO event information. - - The IOIO event information identifies the type of IO operation to be per= formed - by the hypervisor. Build this information based on the instruction data. - - @param[in] Regs x64 processor context - @param[in, out] InstructionData Instruction parsing context - - @return IOIO event information value - -**/ -STATIC -UINT64 -IoioExitInfo ( - IN EFI_SYSTEM_CONTEXT_X64 *Regs, - IN OUT SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - UINT64 ExitInfo; - - ExitInfo =3D 0; - - switch (*(InstructionData->OpCodes)) { - // - // INS opcodes - // - case 0x6C: - case 0x6D: - ExitInfo |=3D IOIO_TYPE_INS; - ExitInfo |=3D IOIO_SEG_ES; - ExitInfo |=3D ((Regs->Rdx & 0xffff) << 16); - break; - - // - // OUTS opcodes - // - case 0x6E: - case 0x6F: - ExitInfo |=3D IOIO_TYPE_OUTS; - ExitInfo |=3D IOIO_SEG_DS; - ExitInfo |=3D ((Regs->Rdx & 0xffff) << 16); - break; - - // - // IN immediate opcodes - // - case 0xE4: - case 0xE5: - InstructionData->ImmediateSize =3D 1; - InstructionData->End++; - ExitInfo |=3D IOIO_TYPE_IN; - ExitInfo |=3D ((*(InstructionData->OpCodes + 1)) << 16); - break; - - // - // OUT immediate opcodes - // - case 0xE6: - case 0xE7: - InstructionData->ImmediateSize =3D 1; - InstructionData->End++; - ExitInfo |=3D IOIO_TYPE_OUT; - ExitInfo |=3D ((*(InstructionData->OpCodes + 1)) << 16) | IOIO_TYPE_= OUT; - break; - - // - // IN register opcodes - // - case 0xEC: - case 0xED: - ExitInfo |=3D IOIO_TYPE_IN; - ExitInfo |=3D ((Regs->Rdx & 0xffff) << 16); - break; - - // - // OUT register opcodes - // - case 0xEE: - case 0xEF: - ExitInfo |=3D IOIO_TYPE_OUT; - ExitInfo |=3D ((Regs->Rdx & 0xffff) << 16); - break; - - default: - return 0; - } - - switch (*(InstructionData->OpCodes)) { - // - // Single-byte opcodes - // - case 0x6C: - case 0x6E: - case 0xE4: - case 0xE6: - case 0xEC: - case 0xEE: - ExitInfo |=3D IOIO_DATA_8; - break; - - // - // Length determined by instruction parsing - // - default: - ExitInfo |=3D (InstructionData->DataSize =3D=3D Size16Bits) ? IOIO_D= ATA_16 - : IOIO_DATA_32; - } - - switch (InstructionData->AddrSize) { - case Size16Bits: - ExitInfo |=3D IOIO_ADDR_16; - break; - - case Size32Bits: - ExitInfo |=3D IOIO_ADDR_32; - break; - - case Size64Bits: - ExitInfo |=3D IOIO_ADDR_64; - break; - - default: - break; - } - - if (InstructionData->RepMode !=3D 0) { - ExitInfo |=3D IOIO_REP; - } - - return ExitInfo; -} - -/** - Handle an IOIO event. - - Use the VMGEXIT instruction to handle an IOIO event. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation - Block - @param[in, out] Regs x64 processor context - @param[in] InstructionData Instruction parsing context - - @retval 0 Event handled successfully - @return New exception value to propagate - -**/ -STATIC -UINT64 -IoioExit ( - IN OUT GHCB *Ghcb, - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - UINT64 ExitInfo1, ExitInfo2, Status; - BOOLEAN IsString; - - ExitInfo1 =3D IoioExitInfo (Regs, InstructionData); - if (ExitInfo1 =3D=3D 0) { - return UnsupportedExit (Ghcb, Regs, InstructionData); - } - - IsString =3D ((ExitInfo1 & IOIO_TYPE_STR) !=3D 0) ? TRUE : FALSE; - if (IsString) { - UINTN IoBytes, VmgExitBytes; - UINTN GhcbCount, OpCount; - - Status =3D 0; - - IoBytes =3D IOIO_DATA_BYTES (ExitInfo1); - GhcbCount =3D sizeof (Ghcb->SharedBuffer) / IoBytes; - - OpCount =3D ((ExitInfo1 & IOIO_REP) !=3D 0) ? Regs->Rcx : 1; - while (OpCount !=3D 0) { - ExitInfo2 =3D MIN (OpCount, GhcbCount); - VmgExitBytes =3D ExitInfo2 * IoBytes; - - if ((ExitInfo1 & IOIO_TYPE_IN) =3D=3D 0) { - CopyMem (Ghcb->SharedBuffer, (VOID *)Regs->Rsi, VmgExitBytes); - Regs->Rsi +=3D VmgExitBytes; - } - - Ghcb->SaveArea.SwScratch =3D (UINT64)Ghcb->SharedBuffer; - VmgSetOffsetValid (Ghcb, GhcbSwScratch); - Status =3D VmgExit (Ghcb, SVM_EXIT_IOIO_PROT, ExitInfo1, ExitInfo2); - if (Status !=3D 0) { - return Status; - } - - if ((ExitInfo1 & IOIO_TYPE_IN) !=3D 0) { - CopyMem ((VOID *)Regs->Rdi, Ghcb->SharedBuffer, VmgExitBytes); - Regs->Rdi +=3D VmgExitBytes; - } - - if ((ExitInfo1 & IOIO_REP) !=3D 0) { - Regs->Rcx -=3D ExitInfo2; - } - - OpCount -=3D ExitInfo2; - } - } else { - if ((ExitInfo1 & IOIO_TYPE_IN) !=3D 0) { - Ghcb->SaveArea.Rax =3D 0; - } else { - CopyMem (&Ghcb->SaveArea.Rax, &Regs->Rax, IOIO_DATA_BYTES (ExitInfo1= )); - } - - VmgSetOffsetValid (Ghcb, GhcbRax); - - Status =3D VmgExit (Ghcb, SVM_EXIT_IOIO_PROT, ExitInfo1, 0); - if (Status !=3D 0) { - return Status; - } - - if ((ExitInfo1 & IOIO_TYPE_IN) !=3D 0) { - if (!VmgIsOffsetValid (Ghcb, GhcbRax)) { - return UnsupportedExit (Ghcb, Regs, InstructionData); - } - - CopyMem (&Regs->Rax, &Ghcb->SaveArea.Rax, IOIO_DATA_BYTES (ExitInfo1= )); - } - } - - return 0; -} - -/** - Handle a INVD event. - - Use the VMGEXIT instruction to handle a INVD event. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation - Block - @param[in, out] Regs x64 processor context - @param[in] InstructionData Instruction parsing context - - @retval 0 Event handled successfully - @return New exception value to propagate - -**/ -STATIC -UINT64 -InvdExit ( - IN OUT GHCB *Ghcb, - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - return VmgExit (Ghcb, SVM_EXIT_INVD, 0, 0); -} - -/** - Fetch CPUID leaf/function via hypervisor/VMGEXIT. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communicati= on - Block - @param[in] EaxIn EAX input for cpuid instruction - @param[in] EcxIn ECX input for cpuid instruction - @param[in] Xcr0In XCR0 at time of cpuid instruction - @param[in, out] Eax Pointer to store leaf's EAX value - @param[in, out] Ebx Pointer to store leaf's EBX value - @param[in, out] Ecx Pointer to store leaf's ECX value - @param[in, out] Edx Pointer to store leaf's EDX value - @param[in, out] Status Pointer to store status from VMGEXIT (alway= s 0 - unless return value indicates failure) - @param[in, out] Unsupported Pointer to store indication of unsupported - VMGEXIT (always false unless return value - indicates failure) - - @retval TRUE CPUID leaf fetch successfully. - @retval FALSE Error occurred while fetching CPUID leaf. C= allers - should Status and Unsupported and handle - accordingly if they indicate a more precise - error condition. - -**/ -STATIC -BOOLEAN -GetCpuidHyp ( - IN OUT GHCB *Ghcb, - IN UINT32 EaxIn, - IN UINT32 EcxIn, - IN UINT64 XCr0, - IN OUT UINT32 *Eax, - IN OUT UINT32 *Ebx, - IN OUT UINT32 *Ecx, - IN OUT UINT32 *Edx, - IN OUT UINT64 *Status, - IN OUT BOOLEAN *UnsupportedExit - ) -{ - *UnsupportedExit =3D FALSE; - Ghcb->SaveArea.Rax =3D EaxIn; - VmgSetOffsetValid (Ghcb, GhcbRax); - Ghcb->SaveArea.Rcx =3D EcxIn; - VmgSetOffsetValid (Ghcb, GhcbRcx); - if (EaxIn =3D=3D CPUID_EXTENDED_STATE) { - Ghcb->SaveArea.XCr0 =3D XCr0; - VmgSetOffsetValid (Ghcb, GhcbXCr0); - } - - *Status =3D VmgExit (Ghcb, SVM_EXIT_CPUID, 0, 0); - if (*Status !=3D 0) { - return FALSE; - } - - if (!VmgIsOffsetValid (Ghcb, GhcbRax) || - !VmgIsOffsetValid (Ghcb, GhcbRbx) || - !VmgIsOffsetValid (Ghcb, GhcbRcx) || - !VmgIsOffsetValid (Ghcb, GhcbRdx)) - { - *UnsupportedExit =3D TRUE; - return FALSE; - } - - if (Eax) { - *Eax =3D (UINT32)(UINTN)Ghcb->SaveArea.Rax; - } - - if (Ebx) { - *Ebx =3D (UINT32)(UINTN)Ghcb->SaveArea.Rbx; - } - - if (Ecx) { - *Ecx =3D (UINT32)(UINTN)Ghcb->SaveArea.Rcx; - } - - if (Edx) { - *Edx =3D (UINT32)(UINTN)Ghcb->SaveArea.Rdx; - } - - return TRUE; -} - -/** - Check if SEV-SNP enabled. - - @retval TRUE SEV-SNP is enabled. - @retval FALSE SEV-SNP is disabled. - -**/ -STATIC -BOOLEAN -SnpEnabled ( - VOID - ) -{ - MSR_SEV_STATUS_REGISTER Msr; - - Msr.Uint32 =3D AsmReadMsr32 (MSR_SEV_STATUS); - - return !!Msr.Bits.SevSnpBit; -} - -/** - Calculate the total XSAVE area size for enabled XSAVE areas - - @param[in] XFeaturesEnabled Bit-mask of enabled XSAVE features/are= as as - indicated by XCR0/MSR_IA32_XSS bits - @param[in] XSaveBaseSize Base/legacy XSAVE area size (e.g. when - XCR0 is 1) - @param[in, out] XSaveSize Pointer to storage for calculated XSAV= E area - size - @param[in] Compacted Whether or not the calculation is for = the - normal XSAVE area size (leaf 0xD,0x0,E= BX) or - compacted XSAVE area size (leaf 0xD,0x= 1,EBX) - - - @retval TRUE XSAVE size calculation was successful. - @retval FALSE XSAVE size calculation was unsuccessfu= l. -**/ -STATIC -BOOLEAN -GetCpuidXSaveSize ( - IN UINT64 XFeaturesEnabled, - IN UINT32 XSaveBaseSize, - IN OUT UINT32 *XSaveSize, - IN BOOLEAN Compacted - ) -{ - SEV_SNP_CPUID_INFO *CpuidInfo; - UINT64 XFeaturesFound =3D 0; - UINT32 Idx; - - *XSaveSize =3D XSaveBaseSize; - CpuidInfo =3D (SEV_SNP_CPUID_INFO *)(UINT64)PcdGet32 (PcdOvmfCpuidBase); - - for (Idx =3D 0; Idx < CpuidInfo->Count; Idx++) { - SEV_SNP_CPUID_FUNCTION *CpuidFn =3D &CpuidInfo->function[Idx]; - - if (!((CpuidFn->EaxIn =3D=3D 0xD) && - ((CpuidFn->EcxIn =3D=3D 0) || (CpuidFn->EcxIn =3D=3D 1)))) - { - continue; - } - - if (XFeaturesFound & (1ULL << CpuidFn->EcxIn) || - !(XFeaturesEnabled & (1ULL << CpuidFn->EcxIn))) - { - continue; - } - - XFeaturesFound |=3D (1ULL << CpuidFn->EcxIn); - if (Compacted) { - *XSaveSize +=3D CpuidFn->Eax; - } else { - *XSaveSize =3D MAX (*XSaveSize, CpuidFn->Eax + CpuidFn->Ebx); - } - } - - /* - * Either the guest set unsupported XCR0/XSS bits, or the corresponding - * entries in the CPUID table were not present. This is an invalid state. - */ - if (XFeaturesFound !=3D (XFeaturesEnabled & ~3UL)) { - return FALSE; - } - - return TRUE; -} - -/** - Check if a CPUID leaf/function is indexed via ECX sub-leaf/sub-function - - @param[in] EaxIn EAX input for cpuid instruction - - @retval FALSE cpuid leaf/function is not indexed by ECX i= nput - @retval TRUE cpuid leaf/function is indexed by ECX input - -**/ -STATIC -BOOLEAN -IsFunctionIndexed ( - IN UINT32 EaxIn - ) -{ - switch (EaxIn) { - case CPUID_CACHE_PARAMS: - case CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS: - case CPUID_EXTENDED_TOPOLOGY: - case CPUID_EXTENDED_STATE: - case CPUID_INTEL_RDT_MONITORING: - case CPUID_INTEL_RDT_ALLOCATION: - case CPUID_INTEL_SGX: - case CPUID_INTEL_PROCESSOR_TRACE: - case CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS: - case CPUID_V2_EXTENDED_TOPOLOGY: - case 0x8000001D: /* Cache Topology Information */ - return TRUE; - } - - return FALSE; -} - -/** - Fetch CPUID leaf/function via SEV-SNP CPUID table. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communicati= on - Block - @param[in] EaxIn EAX input for cpuid instruction - @param[in] EcxIn ECX input for cpuid instruction - @param[in] Xcr0In XCR0 at time of cpuid instruction - @param[in, out] Eax Pointer to store leaf's EAX value - @param[in, out] Ebx Pointer to store leaf's EBX value - @param[in, out] Ecx Pointer to store leaf's ECX value - @param[in, out] Edx Pointer to store leaf's EDX value - @param[in, out] Status Pointer to store status from VMGEXIT (alway= s 0 - unless return value indicates failure) - @param[in, out] Unsupported Pointer to store indication of unsupported - VMGEXIT (always false unless return value - indicates failure) - - @retval TRUE CPUID leaf fetch successfully. - @retval FALSE Error occurred while fetching CPUID leaf. C= allers - should Status and Unsupported and handle - accordingly if they indicate a more precise - error condition. - -**/ -STATIC -BOOLEAN -GetCpuidFw ( - IN OUT GHCB *Ghcb, - IN UINT32 EaxIn, - IN UINT32 EcxIn, - IN UINT64 XCr0, - IN OUT UINT32 *Eax, - IN OUT UINT32 *Ebx, - IN OUT UINT32 *Ecx, - IN OUT UINT32 *Edx, - IN OUT UINT64 *Status, - IN OUT BOOLEAN *Unsupported - ) -{ - SEV_SNP_CPUID_INFO *CpuidInfo; - BOOLEAN Found; - UINT32 Idx; - - CpuidInfo =3D (SEV_SNP_CPUID_INFO *)(UINT64)PcdGet32 (PcdOvmfCpuidBase); - Found =3D FALSE; - - for (Idx =3D 0; Idx < CpuidInfo->Count; Idx++) { - SEV_SNP_CPUID_FUNCTION *CpuidFn =3D &CpuidInfo->function[Idx]; - - if (CpuidFn->EaxIn !=3D EaxIn) { - continue; - } - - if (IsFunctionIndexed (CpuidFn->EaxIn) && (CpuidFn->EcxIn !=3D EcxIn))= { - continue; - } - - *Eax =3D CpuidFn->Eax; - *Ebx =3D CpuidFn->Ebx; - *Ecx =3D CpuidFn->Ecx; - *Edx =3D CpuidFn->Edx; - - Found =3D TRUE; - break; - } - - if (!Found) { - *Eax =3D *Ebx =3D *Ecx =3D *Edx =3D 0; - goto Out; - } - - if (EaxIn =3D=3D CPUID_VERSION_INFO) { - IA32_CR4 Cr4; - UINT32 Ebx2; - UINT32 Edx2; - - if (!GetCpuidHyp ( - Ghcb, - EaxIn, - EcxIn, - XCr0, - NULL, - &Ebx2, - NULL, - &Edx2, - Status, - Unsupported - )) - { - return FALSE; - } - - /* initial APIC ID */ - *Ebx =3D (*Ebx & 0x00FFFFFF) | (Ebx2 & 0xFF000000); - /* APIC enabled bit */ - *Edx =3D (*Edx & ~BIT9) | (Edx2 & BIT9); - /* OSXSAVE enabled bit */ - Cr4.UintN =3D AsmReadCr4 (); - *Ecx =3D (Cr4.Bits.OSXSAVE) ? (*Ecx & ~BIT27) | (*Ecx & BIT27) - : (*Ecx & ~BIT27); - } else if (EaxIn =3D=3D CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS) { - IA32_CR4 Cr4; - - Cr4.UintN =3D AsmReadCr4 (); - /* OSPKE enabled bit */ - *Ecx =3D (Cr4.Bits.PKE) ? (*Ecx | BIT4) : (*Ecx & ~BIT4); - } else if (EaxIn =3D=3D CPUID_EXTENDED_TOPOLOGY) { - if (!GetCpuidHyp ( - Ghcb, - EaxIn, - EcxIn, - XCr0, - NULL, - NULL, - NULL, - Edx, - Status, - Unsupported - )) - { - return FALSE; - } - } else if ((EaxIn =3D=3D CPUID_EXTENDED_STATE) && ((EcxIn =3D=3D 0) || (= EcxIn =3D=3D 1))) { - MSR_IA32_XSS_REGISTER XssMsr; - BOOLEAN Compacted; - UINT32 XSaveSize; - - XssMsr.Uint64 =3D 0; - Compacted =3D FALSE; - if (EcxIn =3D=3D 1) { - /* - * The PPR and APM aren't clear on what size should be encoded in - * 0xD:0x1:EBX when compaction is not enabled by either XSAVEC or - * XSAVES, as these are generally fixed to 1 on real CPUs. Report - * this undefined case as an error. - */ - if (!(*Eax & (BIT3 | BIT1))) { - /* (XSAVES | XSAVEC) */ - return FALSE; - } - - Compacted =3D TRUE; - XssMsr.Uint64 =3D AsmReadMsr64 (MSR_IA32_XSS); - } - - if (!GetCpuidXSaveSize ( - XCr0 | XssMsr.Uint64, - *Ebx, - &XSaveSize, - Compacted - )) - { - return FALSE; - } - - *Ebx =3D XSaveSize; - } else if (EaxIn =3D=3D 0x8000001E) { - UINT32 Ebx2; - UINT32 Ecx2; - - /* extended APIC ID */ - if (!GetCpuidHyp ( - Ghcb, - EaxIn, - EcxIn, - XCr0, - Eax, - &Ebx2, - &Ecx2, - NULL, - Status, - Unsupported - )) - { - return FALSE; - } - - /* compute ID */ - *Ebx =3D (*Ebx & 0xFFFFFF00) | (Ebx2 & 0x000000FF); - /* node ID */ - *Ecx =3D (*Ecx & 0xFFFFFF00) | (Ecx2 & 0x000000FF); - } - -Out: - *Status =3D 0; - *Unsupported =3D FALSE; - return TRUE; -} - -/** - Handle a CPUID event. - - Use VMGEXIT instruction or CPUID table to handle a CPUID event. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation - Block - @param[in, out] Regs x64 processor context - @param[in] InstructionData Instruction parsing context - - @retval 0 Event handled successfully - @return New exception value to propagate - -**/ -STATIC -UINT64 -CpuidExit ( - IN OUT GHCB *Ghcb, - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - BOOLEAN Unsupported; - UINT64 Status; - UINT32 EaxIn; - UINT32 EcxIn; - UINT64 XCr0; - UINT32 Eax; - UINT32 Ebx; - UINT32 Ecx; - UINT32 Edx; - - EaxIn =3D (UINT32)(UINTN)Regs->Rax; - EcxIn =3D (UINT32)(UINTN)Regs->Rcx; - - if (EaxIn =3D=3D CPUID_EXTENDED_STATE) { - IA32_CR4 Cr4; - - Cr4.UintN =3D AsmReadCr4 (); - Ghcb->SaveArea.XCr0 =3D (Cr4.Bits.OSXSAVE =3D=3D 1) ? AsmXGetBv (0) : = 1; - XCr0 =3D (Cr4.Bits.OSXSAVE =3D=3D 1) ? AsmXGetBv (0) : = 1; - } - - if (SnpEnabled ()) { - if (!GetCpuidFw ( - Ghcb, - EaxIn, - EcxIn, - XCr0, - &Eax, - &Ebx, - &Ecx, - &Edx, - &Status, - &Unsupported - )) - { - goto CpuidFail; - } - } else { - if (!GetCpuidHyp ( - Ghcb, - EaxIn, - EcxIn, - XCr0, - &Eax, - &Ebx, - &Ecx, - &Edx, - &Status, - &Unsupported - )) - { - goto CpuidFail; - } - } - - Regs->Rax =3D Eax; - Regs->Rbx =3D Ebx; - Regs->Rcx =3D Ecx; - Regs->Rdx =3D Edx; - - return 0; - -CpuidFail: - if (Unsupported) { - return UnsupportedExit (Ghcb, Regs, InstructionData); - } - - return Status; -} - -/** - Handle a RDPMC event. - - Use the VMGEXIT instruction to handle a RDPMC event. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation - Block - @param[in, out] Regs x64 processor context - @param[in] InstructionData Instruction parsing context - - @retval 0 Event handled successfully - @return New exception value to propagate - -**/ -STATIC -UINT64 -RdpmcExit ( - IN OUT GHCB *Ghcb, - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - UINT64 Status; - - Ghcb->SaveArea.Rcx =3D Regs->Rcx; - VmgSetOffsetValid (Ghcb, GhcbRcx); - - Status =3D VmgExit (Ghcb, SVM_EXIT_RDPMC, 0, 0); - if (Status !=3D 0) { - return Status; - } - - if (!VmgIsOffsetValid (Ghcb, GhcbRax) || - !VmgIsOffsetValid (Ghcb, GhcbRdx)) - { - return UnsupportedExit (Ghcb, Regs, InstructionData); - } - - Regs->Rax =3D Ghcb->SaveArea.Rax; - Regs->Rdx =3D Ghcb->SaveArea.Rdx; - - return 0; -} - -/** - Handle a RDTSC event. - - Use the VMGEXIT instruction to handle a RDTSC event. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation - Block - @param[in, out] Regs x64 processor context - @param[in] InstructionData Instruction parsing context - - @retval 0 Event handled successfully - @return New exception value to propagate - -**/ -STATIC -UINT64 -RdtscExit ( - IN OUT GHCB *Ghcb, - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - UINT64 Status; - - Status =3D VmgExit (Ghcb, SVM_EXIT_RDTSC, 0, 0); - if (Status !=3D 0) { - return Status; - } - - if (!VmgIsOffsetValid (Ghcb, GhcbRax) || - !VmgIsOffsetValid (Ghcb, GhcbRdx)) - { - return UnsupportedExit (Ghcb, Regs, InstructionData); - } - - Regs->Rax =3D Ghcb->SaveArea.Rax; - Regs->Rdx =3D Ghcb->SaveArea.Rdx; - - return 0; -} - -/** - Handle a DR7 register write event. - - Use the VMGEXIT instruction to handle a DR7 write event. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation - Block - @param[in, out] Regs x64 processor context - @param[in] InstructionData Instruction parsing context - - @retval 0 Event handled successfully - @return New exception value to propagate - -**/ -STATIC -UINT64 -Dr7WriteExit ( - IN OUT GHCB *Ghcb, - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - SEV_ES_INSTRUCTION_OPCODE_EXT *Ext; - SEV_ES_PER_CPU_DATA *SevEsData; - UINT64 *Register; - UINT64 Status; - - Ext =3D &InstructionData->Ext; - SevEsData =3D (SEV_ES_PER_CPU_DATA *)(Ghcb + 1); - - DecodeModRm (Regs, InstructionData); - - // - // MOV DRn always treats MOD =3D=3D 3 no matter how encoded - // - Register =3D GetRegisterPointer (Regs, Ext->ModRm.Rm); - - // - // Using a value of 0 for ExitInfo1 means RAX holds the value - // - Ghcb->SaveArea.Rax =3D *Register; - VmgSetOffsetValid (Ghcb, GhcbRax); - - Status =3D VmgExit (Ghcb, SVM_EXIT_DR7_WRITE, 0, 0); - if (Status !=3D 0) { - return Status; - } - - SevEsData->Dr7 =3D *Register; - SevEsData->Dr7Cached =3D 1; - - return 0; -} - -/** - Handle a DR7 register read event. - - Use the VMGEXIT instruction to handle a DR7 read event. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communi= cation - Block - @param[in, out] Regs x64 processor context - @param[in] InstructionData Instruction parsing context - - @retval 0 Event handled successfully - -**/ -STATIC -UINT64 -Dr7ReadExit ( - IN OUT GHCB *Ghcb, - IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, - IN SEV_ES_INSTRUCTION_DATA *InstructionData - ) -{ - SEV_ES_INSTRUCTION_OPCODE_EXT *Ext; - SEV_ES_PER_CPU_DATA *SevEsData; - UINT64 *Register; - - Ext =3D &InstructionData->Ext; - SevEsData =3D (SEV_ES_PER_CPU_DATA *)(Ghcb + 1); - - DecodeModRm (Regs, InstructionData); - - // - // MOV DRn always treats MOD =3D=3D 3 no matter how encoded - // - Register =3D GetRegisterPointer (Regs, Ext->ModRm.Rm); - - // - // If there is a cached valued for DR7, return that. Otherwise return the - // DR7 standard reset value of 0x400 (no debug breakpoints set). - // - *Register =3D (SevEsData->Dr7Cached =3D=3D 1) ? SevEsData->Dr7 : 0x400; - - return 0; -} - -/** - Handle a #VC exception. - - Performs the necessary processing to handle a #VC exception. - - @param[in, out] Ghcb Pointer to the GHCB - @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et - as value to use on error. - @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT - - @retval EFI_SUCCESS Exception handled - @retval EFI_UNSUPPORTED #VC not supported, (new) exception value= to - propagate provided - @retval EFI_PROTOCOL_ERROR #VC handling failed, (new) exception val= ue to - propagate provided - -**/ -EFI_STATUS -EFIAPI -InternalVmgExitHandleVc ( - IN OUT GHCB *Ghcb, - IN OUT EFI_EXCEPTION_TYPE *ExceptionType, - IN OUT EFI_SYSTEM_CONTEXT SystemContext - ) -{ - EFI_SYSTEM_CONTEXT_X64 *Regs; - NAE_EXIT NaeExit; - SEV_ES_INSTRUCTION_DATA InstructionData; - UINT64 ExitCode, Status; - EFI_STATUS VcRet; - BOOLEAN InterruptState; - - VcRet =3D EFI_SUCCESS; - - Regs =3D SystemContext.SystemContextX64; - - VmgInit (Ghcb, &InterruptState); - - ExitCode =3D Regs->ExceptionData; - switch (ExitCode) { - case SVM_EXIT_DR7_READ: - NaeExit =3D Dr7ReadExit; - break; - - case SVM_EXIT_DR7_WRITE: - NaeExit =3D Dr7WriteExit; - break; - - case SVM_EXIT_RDTSC: - NaeExit =3D RdtscExit; - break; - - case SVM_EXIT_RDPMC: - NaeExit =3D RdpmcExit; - break; - - case SVM_EXIT_CPUID: - NaeExit =3D CpuidExit; - break; - - case SVM_EXIT_INVD: - NaeExit =3D InvdExit; - break; - - case SVM_EXIT_IOIO_PROT: - NaeExit =3D IoioExit; - break; - - case SVM_EXIT_MSR: - NaeExit =3D MsrExit; - break; - - case SVM_EXIT_VMMCALL: - NaeExit =3D VmmCallExit; - break; - - case SVM_EXIT_RDTSCP: - NaeExit =3D RdtscpExit; - break; - - case SVM_EXIT_WBINVD: - NaeExit =3D WbinvdExit; - break; - - case SVM_EXIT_MONITOR: - NaeExit =3D MonitorExit; - break; - - case SVM_EXIT_MWAIT: - NaeExit =3D MwaitExit; - break; - - case SVM_EXIT_NPF: - NaeExit =3D MmioExit; - break; - - default: - NaeExit =3D UnsupportedExit; - } - - InitInstructionData (&InstructionData, Ghcb, Regs); - - Status =3D NaeExit (Ghcb, Regs, &InstructionData); - if (Status =3D=3D 0) { - Regs->Rip +=3D InstructionLength (&InstructionData); - } else { - GHCB_EVENT_INJECTION Event; - - Event.Uint64 =3D Status; - if (Event.Elements.ErrorCodeValid !=3D 0) { - Regs->ExceptionData =3D Event.Elements.ErrorCode; - } else { - Regs->ExceptionData =3D 0; - } - - *ExceptionType =3D Event.Elements.Vector; - - VcRet =3D EFI_PROTOCOL_ERROR; - } - - VmgDone (Ghcb, InterruptState); - - return VcRet; -} - -/** - Routine to allow ASSERT from within #VC. - - @param[in, out] SevEsData Pointer to the per-CPU data - -**/ -VOID -EFIAPI -VmgExitIssueAssert ( - IN OUT SEV_ES_PER_CPU_DATA *SevEsData - ) -{ - // - // Progress will be halted, so set VcCount to allow for ASSERT output - // to be seen. - // - SevEsData->VcCount =3D 0; - - ASSERT (FALSE); - CpuDeadLoop (); -} diff --git a/OvmfPkg/Library/VmgExitLib/VmgExitVcHandler.h b/OvmfPkg/Librar= y/VmgExitLib/VmgExitVcHandler.h deleted file mode 100644 index 3a37cb04f616..000000000000 --- a/OvmfPkg/Library/VmgExitLib/VmgExitVcHandler.h +++ /dev/null @@ -1,53 +0,0 @@ -/** @file - X64 #VC Exception Handler functon header file. - - Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#ifndef __VMG_EXIT_VC_HANDLER_H__ -#define __VMG_EXIT_VC_HANDLER_H__ - -#include -#include -#include - -/** - Handle a #VC exception. - - Performs the necessary processing to handle a #VC exception. - - @param[in, out] Ghcb Pointer to the GHCB - @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et - as value to use on error. - @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT - - @retval EFI_SUCCESS Exception handled - @retval EFI_UNSUPPORTED #VC not supported, (new) exception value= to - propagate provided - @retval EFI_PROTOCOL_ERROR #VC handling failed, (new) exception val= ue to - propagate provided - -**/ -EFI_STATUS -EFIAPI -InternalVmgExitHandleVc ( - IN OUT GHCB *Ghcb, - IN OUT EFI_EXCEPTION_TYPE *ExceptionType, - IN OUT EFI_SYSTEM_CONTEXT SystemContext - ); - -/** - Routine to allow ASSERT from within #VC. - - @param[in, out] SevEsData Pointer to the per-CPU data - -**/ -VOID -EFIAPI -VmgExitIssueAssert ( - IN OUT SEV_ES_PER_CPU_DATA *SevEsData - ); - -#endif diff --git a/OvmfPkg/Library/VmgExitLib/X64/TdVmcallCpuid.nasm b/OvmfPkg/Li= brary/VmgExitLib/X64/TdVmcallCpuid.nasm deleted file mode 100644 index fa86440904fe..000000000000 --- a/OvmfPkg/Library/VmgExitLib/X64/TdVmcallCpuid.nasm +++ /dev/null @@ -1,146 +0,0 @@ -;-------------------------------------------------------------------------= ----- -;* -;* Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.
-;* SPDX-License-Identifier: BSD-2-Clause-Patent -;* -;* -;-------------------------------------------------------------------------= ----- - -DEFAULT REL -SECTION .text - -%define TDVMCALL_EXPOSE_REGS_MASK 0xffec -%define TDVMCALL 0x0 -%define EXIT_REASON_CPUID 0xa - -%macro tdcall 0 - db 0x66,0x0f,0x01,0xcc -%endmacro - -%macro tdcall_push_regs 0 - push rbp - mov rbp, rsp - push r15 - push r14 - push r13 - push r12 - push rbx - push rsi - push rdi -%endmacro - -%macro tdcall_pop_regs 0 - pop rdi - pop rsi - pop rbx - pop r12 - pop r13 - pop r14 - pop r15 - pop rbp -%endmacro - -%define number_of_regs_pushed 8 -%define number_of_parameters 4 - -; -; Keep these in sync for push_regs/pop_regs, code below -; uses them to find 5th or greater parameters -; -%define first_variable_on_stack_offset \ - ((number_of_regs_pushed * 8) + (number_of_parameters * 8) + 8) -%define second_variable_on_stack_offset \ - ((first_variable_on_stack_offset) + 8) - -%macro tdcall_regs_preamble 2 - mov rax, %1 - - xor rcx, rcx - mov ecx, %2 - - ; R10 =3D 0 (standard TDVMCALL) - - xor r10d, r10d - - ; Zero out unused (for standard TDVMCALL) registers to avoid leaking - ; secrets to the VMM. - - xor ebx, ebx - xor esi, esi - xor edi, edi - - xor edx, edx - xor ebp, ebp - xor r8d, r8d - xor r9d, r9d - xor r14, r14 - xor r15, r15 -%endmacro - -%macro tdcall_regs_postamble 0 - xor ebx, ebx - xor esi, esi - xor edi, edi - - xor ecx, ecx - xor edx, edx - xor r8d, r8d - xor r9d, r9d - xor r10d, r10d - xor r11d, r11d -%endmacro - -;-------------------------------------------------------------------------= ----- -; 0 =3D> RAX =3D TDCALL leaf / TDVMCALL -; M =3D> RCX =3D TDVMCALL register behavior -; 0xa =3D> R11 =3D TDVMCALL function / CPUID -; RCX =3D> R12 =3D p1 -; RDX =3D> R13 =3D p2 -; -; UINT64 -; EFIAPI -; TdVmCallCpuid ( -; UINT64 EaxIn, // Rcx -; UINT64 EcxIn, // Rdx -; UINT64 *Results // R8 -; ) -global ASM_PFX(TdVmCallCpuid) -ASM_PFX(TdVmCallCpuid): - tdcall_push_regs - - mov r11, EXIT_REASON_CPUID - mov r12, rcx - mov r13, rdx - - ; Save *results pointers - push r8 - - tdcall_regs_preamble TDVMCALL, TDVMCALL_EXPOSE_REGS_MASK - - tdcall - - ; ignore return data if TDCALL reports failure. - test rax, rax - jnz .no_return_data - - ; Propagate TDVMCALL success/failure to return value. - mov rax, r10 - test rax, rax - jnz .no_return_data - - ; Retrieve *Results - pop r8 - test r8, r8 - jz .no_return_data - ; Caller pass in buffer so store results r12-r15 contains eax-edx - mov [r8 + 0], r12 - mov [r8 + 8], r13 - mov [r8 + 16], r14 - mov [r8 + 24], r15 - -.no_return_data: - tdcall_regs_postamble - - tdcall_pop_regs - - ret --=20 2.29.2.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#96012): https://edk2.groups.io/g/devel/message/96012 Mute This Topic: https://groups.io/mt/94856334/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 09:12:31 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+96013+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96013+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1667780877; cv=none; d=zohomail.com; s=zohoarc; b=RxVaJiXdkpNyUBTihlX/uQF9mkM2lADeBhs0Z0ru1Nezx1V2xOvXxeIpNNcoNlQWjdNABPBHJXpJ+mSC2tZULH7c6YVdqA9zmKpOSkn5fO9JkFF4brQZqqUcVQBBhsfmLhlhBdyM3TfiRKt0FRBdeR6Z4otq/dDDGlhhehrs/Bg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1667780877; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=4AxJqyQe/9mszg6VBTQ9B2Ck+pu1ovdl+DBY0OhlGF0=; b=MK/LK634pjcRgQRMfecEedBfrY6NTOGXo69TyizyHVefavNnJ6pZfTNLQb40Gh6YfcSDFE0KxzWTDOYKyjolkPpXf4NhRrq0plHtgIkpZjS5b5BBg2a3hOvKc2fLXRnoF2ltvkNaJMIIQan+h85tieOesYAmSHxUyyCW8MJp+Jg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96013+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1667780877627221.22327784280515; Sun, 6 Nov 2022 16:27:57 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id 9anCYY1788612xLzYSgPnK7s; Sun, 06 Nov 2022 16:27:57 -0800 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web08.4939.1667780856864962924 for ; Sun, 06 Nov 2022 16:27:56 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="396593497" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="396593497" X-Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:55 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="613681584" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="613681584" X-Received: from mxu9-mobl1.ccr.corp.intel.com ([10.238.0.61]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:53 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min M Xu , Guo Dong , Ray Ni Subject: [edk2-devel] [PATCH V3 8/9] UefiCpuPkg: Delete VmgExitLib Date: Mon, 7 Nov 2022 08:27:16 +0800 Message-Id: <20221107002717.461-9-min.m.xu@intel.com> In-Reply-To: <20221107002717.461-1-min.m.xu@intel.com> References: <20221107002717.461-1-min.m.xu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,min.m.xu@intel.com X-Gm-Message-State: biakFhOvrkhQoCBPSZB6M0q6x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1667780877; bh=rtodLWnp4FehKHYfaXy6sfIAjyqFY7qlGfRGgMUEi1I=; h=Cc:Date:From:Reply-To:Subject:To; b=PmvsX8EuS5woDfu9nbWDfBQX1XtCxrPbd/xw4QYE8qNuJwEfPlrVM0d2SZRp9KAE9r6 5j4AZ+KW4dq/+O8pM3HKqtYfq7qvQ+JlsLqXRSaC/Gw3spH0mwE7FA9w89n0GpGvn/nYU 660Jk1vXV/SUDJ4+R+uZe7UmiKHfWC20I3Y= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1667780879566100017 Content-Type: text/plain; charset="utf-8" From: Min M Xu BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4123 VmgExitLib is replaced by CcExitLib. So it is deleted from UefiCpuPkg. Cc: Guo Dong Cc: Ray Ni Signed-off-by: Min Xu Reviewed-by: Jiewen Yao --- UefiCpuPkg/Include/Library/VmgExitLib.h | 173 ------------------ .../Library/VmgExitLibNull/VmTdExitNull.c | 38 ---- .../Library/VmgExitLibNull/VmgExitLibNull.c | 165 ----------------- .../Library/VmgExitLibNull/VmgExitLibNull.inf | 28 --- .../Library/VmgExitLibNull/VmgExitLibNull.uni | 15 -- UefiCpuPkg/UefiCpuPkg.dec | 3 - UefiCpuPkg/UefiCpuPkg.dsc | 2 - 7 files changed, 424 deletions(-) delete mode 100644 UefiCpuPkg/Include/Library/VmgExitLib.h delete mode 100644 UefiCpuPkg/Library/VmgExitLibNull/VmTdExitNull.c delete mode 100644 UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.c delete mode 100644 UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf delete mode 100644 UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.uni diff --git a/UefiCpuPkg/Include/Library/VmgExitLib.h b/UefiCpuPkg/Include/L= ibrary/VmgExitLib.h deleted file mode 100644 index f9f911099a7b..000000000000 --- a/UefiCpuPkg/Include/Library/VmgExitLib.h +++ /dev/null @@ -1,173 +0,0 @@ -/** @file - Public header file for the VMGEXIT Support library class. - - This library class defines some routines used when invoking the VMGEXIT - instruction in support of SEV-ES and to handle #VC exceptions. - - Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#ifndef __VMG_EXIT_LIB_H__ -#define __VMG_EXIT_LIB_H__ - -#include -#include - -#define VE_EXCEPTION 20 - -/** - Perform VMGEXIT. - - Sets the necessary fields of the GHCB, invokes the VMGEXIT instruction a= nd - then handles the return actions. - - @param[in, out] Ghcb A pointer to the GHCB - @param[in] ExitCode VMGEXIT code to be assigned to the SwExitCode - field of the GHCB. - @param[in] ExitInfo1 VMGEXIT information to be assigned to the - SwExitInfo1 field of the GHCB. - @param[in] ExitInfo2 VMGEXIT information to be assigned to the - SwExitInfo2 field of the GHCB. - - @retval 0 VMGEXIT succeeded. - @return Exception number to be propagated, VMGEXIT - processing did not succeed. - -**/ -UINT64 -EFIAPI -VmgExit ( - IN OUT GHCB *Ghcb, - IN UINT64 ExitCode, - IN UINT64 ExitInfo1, - IN UINT64 ExitInfo2 - ); - -/** - Perform pre-VMGEXIT initialization/preparation. - - Performs the necessary steps in preparation for invoking VMGEXIT. Must be - called before setting any fields within the GHCB. - - @param[in, out] Ghcb A pointer to the GHCB - @param[in, out] InterruptState A pointer to hold the current interrupt - state, used for restoring in VmgDone () - -**/ -VOID -EFIAPI -VmgInit ( - IN OUT GHCB *Ghcb, - IN OUT BOOLEAN *InterruptState - ); - -/** - Perform post-VMGEXIT cleanup. - - Performs the necessary steps to cleanup after invoking VMGEXIT. Must be - called after obtaining needed fields within the GHCB. - - @param[in, out] Ghcb A pointer to the GHCB - @param[in] InterruptState An indicator to conditionally (re)enable - interrupts - -**/ -VOID -EFIAPI -VmgDone ( - IN OUT GHCB *Ghcb, - IN BOOLEAN InterruptState - ); - -/** - Marks a specified offset as valid in the GHCB. - - The ValidBitmap area represents the areas of the GHCB that have been mar= ked - valid. Set the bit in ValidBitmap for the input offset. - - @param[in, out] Ghcb A pointer to the GHCB - @param[in] Offset Qword offset in the GHCB to mark valid - -**/ -VOID -EFIAPI -VmgSetOffsetValid ( - IN OUT GHCB *Ghcb, - IN GHCB_REGISTER Offset - ); - -/** - Checks if a specified offset is valid in the GHCB. - - The ValidBitmap area represents the areas of the GHCB that have been mar= ked - valid. Return whether the bit in the ValidBitmap is set for the input of= fset. - - @param[in] Ghcb A pointer to the GHCB - @param[in] Offset Qword offset in the GHCB to mark valid - - @retval TRUE Offset is marked valid in the GHCB - @retval FALSE Offset is not marked valid in the GHCB - -**/ -BOOLEAN -EFIAPI -VmgIsOffsetValid ( - IN GHCB *Ghcb, - IN GHCB_REGISTER Offset - ); - -/** - Handle a #VC exception. - - Performs the necessary processing to handle a #VC exception. - - The base library function returns an error equal to VC_EXCEPTION, - to be propagated to the standard exception handling stack. - - @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et - as value to use on error. - @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT - - @retval EFI_SUCCESS Exception handled - @retval EFI_UNSUPPORTED #VC not supported, (new) exception value= to - propagate provided - @retval EFI_PROTOCOL_ERROR #VC handling failed, (new) exception val= ue to - propagate provided - -**/ -EFI_STATUS -EFIAPI -VmgExitHandleVc ( - IN OUT EFI_EXCEPTION_TYPE *ExceptionType, - IN OUT EFI_SYSTEM_CONTEXT SystemContext - ); - -/** - Handle a #VE exception. - - Performs the necessary processing to handle a #VE exception. - - The base library function returns an error equal to VE_EXCEPTION, - to be propagated to the standard exception handling stack. - - @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et - as value to use on error. - @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT - - @retval EFI_SUCCESS Exception handled - @retval EFI_UNSUPPORTED #VE not supported, (new) exception value= to - propagate provided - @retval EFI_PROTOCOL_ERROR #VE handling failed, (new) exception val= ue to - propagate provided - -**/ -EFI_STATUS -EFIAPI -VmTdExitHandleVe ( - IN OUT EFI_EXCEPTION_TYPE *ExceptionType, - IN OUT EFI_SYSTEM_CONTEXT SystemContext - ); - -#endif diff --git a/UefiCpuPkg/Library/VmgExitLibNull/VmTdExitNull.c b/UefiCpuPkg/= Library/VmgExitLibNull/VmTdExitNull.c deleted file mode 100644 index 6a4e8087cb89..000000000000 --- a/UefiCpuPkg/Library/VmgExitLibNull/VmTdExitNull.c +++ /dev/null @@ -1,38 +0,0 @@ -/** @file - - Copyright (c) 2021, Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ -#include -#include -#include - -/** - Handle a #VE exception. - - Performs the necessary processing to handle a #VE exception. - - @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et - as value to use on error. - @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT - - @retval EFI_SUCCESS Exception handled - @retval EFI_UNSUPPORTED #VE not supported, (new) exception value= to - propagate provided - @retval EFI_PROTOCOL_ERROR #VE handling failed, (new) exception val= ue to - propagate provided - -**/ -EFI_STATUS -EFIAPI -VmTdExitHandleVe ( - IN OUT EFI_EXCEPTION_TYPE *ExceptionType, - IN OUT EFI_SYSTEM_CONTEXT SystemContext - ) -{ - *ExceptionType =3D VE_EXCEPTION; - - return EFI_UNSUPPORTED; -} diff --git a/UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.c b/UefiCpuPk= g/Library/VmgExitLibNull/VmgExitLibNull.c deleted file mode 100644 index d661d8597434..000000000000 --- a/UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.c +++ /dev/null @@ -1,165 +0,0 @@ -/** @file - VMGEXIT Base Support Library. - - Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include -#include -#include - -/** - Perform VMGEXIT. - - Sets the necessary fields of the GHCB, invokes the VMGEXIT instruction a= nd - then handles the return actions. - - The base library function returns an error in the form of a - GHCB_EVENT_INJECTION representing a GP_EXCEPTION. - - @param[in, out] Ghcb A pointer to the GHCB - @param[in] ExitCode VMGEXIT code to be assigned to the SwExitCode - field of the GHCB. - @param[in] ExitInfo1 VMGEXIT information to be assigned to the - SwExitInfo1 field of the GHCB. - @param[in] ExitInfo2 VMGEXIT information to be assigned to the - SwExitInfo2 field of the GHCB. - - @retval 0 VMGEXIT succeeded. - @return Exception number to be propagated, VMGEXIT - processing did not succeed. - -**/ -UINT64 -EFIAPI -VmgExit ( - IN OUT GHCB *Ghcb, - IN UINT64 ExitCode, - IN UINT64 ExitInfo1, - IN UINT64 ExitInfo2 - ) -{ - GHCB_EVENT_INJECTION Event; - - Event.Uint64 =3D 0; - Event.Elements.Vector =3D GP_EXCEPTION; - Event.Elements.Type =3D GHCB_EVENT_INJECTION_TYPE_EXCEPTION; - Event.Elements.Valid =3D 1; - - return Event.Uint64; -} - -/** - Perform pre-VMGEXIT initialization/preparation. - - Performs the necessary steps in preparation for invoking VMGEXIT. Must be - called before setting any fields within the GHCB. - - @param[in, out] Ghcb A pointer to the GHCB - @param[in, out] InterruptState A pointer to hold the current interrupt - state, used for restoring in VmgDone () - -**/ -VOID -EFIAPI -VmgInit ( - IN OUT GHCB *Ghcb, - IN OUT BOOLEAN *InterruptState - ) -{ -} - -/** - Perform post-VMGEXIT cleanup. - - Performs the necessary steps to cleanup after invoking VMGEXIT. Must be - called after obtaining needed fields within the GHCB. - - @param[in, out] Ghcb A pointer to the GHCB - @param[in] InterruptState An indicator to conditionally (re)enable - interrupts - -**/ -VOID -EFIAPI -VmgDone ( - IN OUT GHCB *Ghcb, - IN BOOLEAN InterruptState - ) -{ -} - -/** - Marks a field at the specified offset as valid in the GHCB. - - The ValidBitmap area represents the areas of the GHCB that have been mar= ked - valid. Set the bit in ValidBitmap for the input offset. - - @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communication Bl= ock - @param[in] Offset Qword offset in the GHCB to mark valid - -**/ -VOID -EFIAPI -VmgSetOffsetValid ( - IN OUT GHCB *Ghcb, - IN GHCB_REGISTER Offset - ) -{ -} - -/** - Checks if a specified offset is valid in the GHCB. - - The ValidBitmap area represents the areas of the GHCB that have been mar= ked - valid. Return whether the bit in the ValidBitmap is set for the input of= fset. - - @param[in] Ghcb A pointer to the GHCB - @param[in] Offset Qword offset in the GHCB to mark valid - - @retval TRUE Offset is marked valid in the GHCB - @retval FALSE Offset is not marked valid in the GHCB - -**/ -BOOLEAN -EFIAPI -VmgIsOffsetValid ( - IN GHCB *Ghcb, - IN GHCB_REGISTER Offset - ) -{ - return FALSE; -} - -/** - Handle a #VC exception. - - Performs the necessary processing to handle a #VC exception. - - The base library function returns an error equal to VC_EXCEPTION, - to be propagated to the standard exception handling stack. - - @param[in, out] ExceptionType Pointer to an EFI_EXCEPTION_TYPE to be s= et - as value to use on error. - @param[in, out] SystemContext Pointer to EFI_SYSTEM_CONTEXT - - @retval EFI_SUCCESS Exception handled - @retval EFI_UNSUPPORTED #VC not supported, (new) exception value= to - propagate provided - @retval EFI_PROTOCOL_ERROR #VC handling failed, (new) exception val= ue to - propagate provided - -**/ -EFI_STATUS -EFIAPI -VmgExitHandleVc ( - IN OUT EFI_EXCEPTION_TYPE *ExceptionType, - IN OUT EFI_SYSTEM_CONTEXT SystemContext - ) -{ - *ExceptionType =3D VC_EXCEPTION; - - return EFI_UNSUPPORTED; -} diff --git a/UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf b/UefiCpu= Pkg/Library/VmgExitLibNull/VmgExitLibNull.inf deleted file mode 100644 index 4aab601939ff..000000000000 --- a/UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf +++ /dev/null @@ -1,28 +0,0 @@ -## @file -# VMGEXIT Support Library. -# -# Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved. -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -## - -[Defines] - INF_VERSION =3D 0x00010005 - BASE_NAME =3D VmgExitLibNull - MODULE_UNI_FILE =3D VmgExitLibNull.uni - FILE_GUID =3D 3cd7368f-ef9b-4a9b-9571-2ed93813677e - MODULE_TYPE =3D BASE - VERSION_STRING =3D 1.0 - LIBRARY_CLASS =3D VmgExitLib - -[Sources.common] - VmgExitLibNull.c - VmTdExitNull.c - -[Packages] - MdePkg/MdePkg.dec - UefiCpuPkg/UefiCpuPkg.dec - -[LibraryClasses] - BaseLib - diff --git a/UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.uni b/UefiCpu= Pkg/Library/VmgExitLibNull/VmgExitLibNull.uni deleted file mode 100644 index 8639bc0e8ce9..000000000000 --- a/UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.uni +++ /dev/null @@ -1,15 +0,0 @@ -// /** @file -// VMGEXIT support library instance. -// -// VMGEXIT support library instance. -// -// Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved. -// SPDX-License-Identifier: BSD-2-Clause-Patent -// -// **/ - - -#string STR_MODULE_ABSTRACT #language en-US "VMGEXIT support N= ULL library instance" - -#string STR_MODULE_DESCRIPTION #language en-US "VMGEXIT support N= ULL library instance." - diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index 8058b679412f..cff239d5283e 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -53,9 +53,6 @@ ## MpInitLib|Include/Library/MpInitLib.h =20 - ## @libraryclass Provides function to support VMGEXIT processing. - VmgExitLib|Include/Library/VmgExitLib.h - ## @libraryclass Provides function to support CcExit processing. CcExitLib|Include/Library/CcExitLib.h =20 diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc index 57c74ba844d2..67b0ce46e455 100644 --- a/UefiCpuPkg/UefiCpuPkg.dsc +++ b/UefiCpuPkg/UefiCpuPkg.dsc @@ -59,7 +59,6 @@ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeC= offGetEntryPointLib.inf PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeC= offExtraActionLibNull.inf TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurem= entLibNull.inf - VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf SmmCpuRendezvousLib|UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezv= ousLib.inf @@ -164,7 +163,6 @@ UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf UefiCpuPkg/Library/SmmCpuFeaturesLib/StandaloneMmCpuFeaturesLib.inf - UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf --=20 2.29.2.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#96013): https://edk2.groups.io/g/devel/message/96013 Mute This Topic: https://groups.io/mt/94856335/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 09:12:31 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+96014+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96014+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1667780879; cv=none; d=zohomail.com; s=zohoarc; b=e8L/pZZZrEykMWCTWuOPZGg2SeDUEnpsAM9fs/p2BDPkW0T0y8dVyQvgtw5saTIs7k5Lq3/FXEVSaDj0BRLsCLieognBDidyWEZlVJ35vG6AXGNMYq9eBnQhMaPNjDglP0KOFSCNeRRTjfbtJchshZYt381xlLqJg9UBhAHraC4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1667780879; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=SAoEdYx9Cpnwweogxd7YuIML5BDpqLT2/sHM+eXAXTA=; b=ljVqW93Y7u/f/AtGbNAYnTHMvuAIIDLj+CLsK8rrese1476cy7SXNWF7m6u15TJvhnje7NM9GGWVSRFltu45Y0Mc/y/14Yop1TVuuSnUnCP7fpFEPYpeqhLMf1GaVn3oOsE3krGnaSE8K/3SABRGfpYPz835VMnAyEBnAC+6G5M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+96014+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1667780879612894.8974103001924; Sun, 6 Nov 2022 16:27:59 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id c6NqYY1788612xE0tfQc2CHE; Sun, 06 Nov 2022 16:27:59 -0800 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web08.4939.1667780856864962924 for ; Sun, 06 Nov 2022 16:27:58 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="396593520" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="396593520" X-Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:58 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="613681611" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="613681611" X-Received: from mxu9-mobl1.ccr.corp.intel.com ([10.238.0.61]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 16:27:55 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min M Xu , Michael D Kinney , Liming Gao , Erdem Aktas , Gerd Hoffmann , James Bottomley , Jiewen Yao , Tom Lendacky Subject: [edk2-devel] [PATCH V3 9/9] Maintainers: Update the VmgExitLib to CcExitLib Date: Mon, 7 Nov 2022 08:27:17 +0800 Message-Id: <20221107002717.461-10-min.m.xu@intel.com> In-Reply-To: <20221107002717.461-1-min.m.xu@intel.com> References: <20221107002717.461-1-min.m.xu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,min.m.xu@intel.com X-Gm-Message-State: ut3sRiSx3P16E5P0YLhca9fMx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1667780879; bh=PFa206szsoxuMx6vR670XtQO6YvA/f2UWXzQYhV7/yk=; h=Cc:Date:From:Reply-To:Subject:To; b=uHXYFe8M15Bzhs7l8GxDhWnU9pInQIJUf7D2vlSaJZKjBQYMj+v81jFgaOnyXPPD3li szv6j7KeBORPKwwf8G1fC0V84KukLtFoubqnw25oDC17MWcmNqoZIo1cXd+QDMwfy2QyW RnNfY3rQGa/2VJiKpDmssC+ZvvAsxDMiGAk= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1667780881561100021 Content-Type: text/plain; charset="utf-8" From: Min M Xu BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4123 VmgExitLib is renamed as CcExitLib. The related section in Maintainers.txt should be updated as well. Cc: Michael D Kinney Cc: Liming Gao Cc: Erdem Aktas Cc: Gerd Hoffmann Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Reviewed-by: Michael D Kinney Signed-off-by: Min Xu Reviewed-by: Jiewen Yao --- Maintainers.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Maintainers.txt b/Maintainers.txt index 889990fa566f..454b93420da4 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -475,7 +475,7 @@ F: OvmfPkg/Include/Library/MemEncryptSevLib.h F: OvmfPkg/IoMmuDxe/AmdSevIoMmu.* F: OvmfPkg/Library/BaseMemEncryptSevLib/ F: OvmfPkg/Library/PlatformBootManagerLibGrub/ -F: OvmfPkg/Library/VmgExitLib/ +F: OvmfPkg/Library/CcExitLib/ F: OvmfPkg/PlatformPei/AmdSev.c F: OvmfPkg/ResetVector/ F: OvmfPkg/Sec/ --=20 2.29.2.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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