From nobody Mon Feb 9 22:39:00 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+95884+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+95884+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1667453885; cv=none; d=zohomail.com; s=zohoarc; b=Yr8IH7te/hPpAQGhmFQI3MyJaHIZoOf9xCeCQp3LYEMXIzBtZ7HZccAa1fqw+P/qBuHpuvxN/EM5kCQeOKAlJn1SS0W0xCaxg48O+gO5JwXZhXvKL2XD3d8N0fNyox5dOQZhR6bDlkrhEzkS07Ff/gBp4f3SBRzUOFz+v2vFt6s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1667453885; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=B1Y3KaaTnt3z1x6EVN8uJqCpA7Pf6we2WAZVerluhBg=; b=jQ9vAiYZiBCBb03ty7mBtIgGH3NU6AEX2q/zglqVck+vzlHynuFch0l3wH4nCCkLkQ1AmRb8grX8EUlBSheru7VTUA/2EgeO3BzHY7Ye5XQsV42vhG/gwuP3CjqdhL8bqqFsyeHj4Lr2g22fbStR4bOnq4gQ3PHKKesgdM+hj6s= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+95884+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1667453885969402.2084280313368; Wed, 2 Nov 2022 22:38:05 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id wcIrYY1788612xXcSzLkJ4wi; Wed, 02 Nov 2022 22:38:05 -0700 X-Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mx.groups.io with SMTP id smtpd.web08.15919.1667453877740586469 for ; Wed, 02 Nov 2022 22:38:05 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="307207609" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="307207609" X-Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 22:38:05 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="963805724" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="963805724" X-Received: from shwdeopenlab705.ccr.corp.intel.com ([10.239.56.33]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 22:38:03 -0700 From: "Yuanhao Xie" To: devel@edk2.groups.io Cc: Yuanhao , Eric Dong , Rahul Kumar , Ray Ni Subject: [edk2-devel] [PATCH 2/3] UefiCpuPkg: Skip Mp initialization in DXE phase Date: Thu, 3 Nov 2022 13:37:46 +0800 Message-Id: <20221103053747.289-3-yuanhao.xie@intel.com> In-Reply-To: <20221103053747.289-1-yuanhao.xie@intel.com> References: <20221103053747.289-1-yuanhao.xie@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,yuanhao.xie@intel.com X-Gm-Message-State: aHUT9nbzglWtvtDySgp2peSxx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1667453885; bh=EnBOuOwUI0nG+MvaAUEDEGPH9xfVEDDJl0llPasFHak=; h=Cc:Date:From:Reply-To:Subject:To; b=Ty00QoA9ciTy9ACSLtpvd0LhUAVApUOOuzGvytJOdVe6PcoKrboJfXyp9MTOO0pkTyz 0VO8jOJu703XswnkrhIUEjDftHdAtJCh8l6CtAJMX5T2/G9lCs+iTUhlAjd8oaoYKZKjw 0eSFxAdjBTaZMnMRuhnP8jzRT1hhwqvl6h4= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1667453886947100001 Content-Type: text/plain; charset="utf-8" From: Yuanhao If PEI and DXE stages are in the same bit mode, Mp initialization is removed in DXE phase. Signed-off-by: Yuanhao Xie Cc: Eric Dong Cc: Rahul Kumar Cc: Ray Ni --- UefiCpuPkg/Library/MpInitLib/MpLib.c | 128 +++++++++++++++++++++++++++++++= ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-----------------= ---------------------- UefiCpuPkg/Library/MpInitLib/MpLib.h | 1 + 2 files changed, 90 insertions(+), 39 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpIn= itLib/MpLib.c index 5430688946..c7d1e58909 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -1842,12 +1842,36 @@ MpInitLibInitialize ( UINTN ApResetVectorSizeAbove1Mb; UINTN BackupBufferAddr; UINTN ApIdtBase; + BOOLEAN FirstTimeMpInitializing; =20 - OldCpuMpData =3D GetCpuMpDataFromGuidedHob (); - if (OldCpuMpData =3D=3D NULL) { + OldCpuMpData =3D GetCpuMpDataFromGuidedHob (); + FirstTimeMpInitializing =3D (BOOLEAN)(OldCpuMpData =3D=3D NULL); + + if (FirstTimeMpInitializing) { MaxLogicalProcessorNumber =3D PcdGet32 (PcdCpuMaxLogicalProcessorNumbe= r); + // + // The first time Mp is initialized, or the saved CpuMpData is lost, t= he + // complete process including preparing the buffer, filling the CpuMpD= ata, + // loading the microcode, and waking up the Aps needs to be performed. + // } else { MaxLogicalProcessorNumber =3D OldCpuMpData->CpuCount; + // + // If both PEI and DXE phases are 64-bit, CpuMpdata collected in PEI s= tage + // can be reused in DXE stage, thus no need to redo the initialization. + // For the case where DXE is 64-bit and PEI is 32-bit, a partial + // initialization of Mp is required. + // + if (OldCpuMpData->SizeOfUINTN =3D=3D sizeof (UINTN)) { + DEBUG ((DEBUG_INFO, "OldCpuMpData->SizeOfUINTN: %04d, sizeof (UINTN)= : %04d\n", OldCpuMpData->SizeOfUINTN, sizeof (UINTN))); + + OldCpuMpData->NewCpuMpData =3D OldCpuMpData; + // + // Initialize global data for MP support + // + InitMpGlobalData (OldCpuMpData); + return EFI_SUCCESS; + } } =20 ASSERT (MaxLogicalProcessorNumber !=3D 0); @@ -1991,7 +2015,7 @@ MpInitLibInitialize ( // ProgramVirtualWireMode (); =20 - if (OldCpuMpData =3D=3D NULL) { + if (FirstTimeMpInitializing) { if (MaxLogicalProcessorNumber > 1) { // // Wakeup all APs and calculate the processor count in system @@ -2015,58 +2039,84 @@ MpInitLibInitialize ( // Detect and apply Microcode on BSP // MicrocodeDetect (CpuMpData, CpuMpData->BspNumber); + + // + // CpuMpData->CpuCount was updated in CollectProcessorCount() + // during the first time Mp Initialization. + // + if (CpuMpData->CpuCount > 1) { + WakeUpAP (CpuMpData, TRUE, 0, ApInitializeSync, CpuMpData, TRUE); + // + // Wait for all APs to complete initialization. + // + while (CpuMpData->FinishedCount < (CpuMpData->CpuCount - 1)) { + CpuPause (); + } + } + // + // After Mp is initialized, sizeof(UINTN) is saved and will be transfe= rred to DXE. + // It is used to decide whether Mp initialization needs to be done aga= in. + // SizeOfUINTN and other fields (CpuInfoInHob, CpuCount, BspNumber) de= clared at the top of + // the CPU_MP_DATA structure are independent of the bit mode( 32 or 64= ). + // + CpuMpData->SizeOfUINTN =3D sizeof (UINTN); } else { // - // APs have been wakeup before, just get the CPU Information - // from HOB + // For the else case where DXE is 64-bit and PEI is 32-bit, a partial + // initialization of Mp is required. // + OldCpuMpData->NewCpuMpData =3D CpuMpData; - CpuMpData->CpuCount =3D OldCpuMpData->CpuCount; - CpuMpData->BspNumber =3D OldCpuMpData->BspNumber; - CpuMpData->CpuInfoInHob =3D OldCpuMpData->CpuInfoInHob; - CpuInfoInHob =3D (CPU_INFO_IN_HOB *)(UINTN)CpuMpData->Cp= uInfoInHob; + // + // CpuCount\ufffd\ufffd\ufffd BspNumber, CpuInfoInHob as well as SizeO= fUINTN are collected during PEI, + // and need to be saved in HOB for DXE. The rest fields of _CPU_MP_DAT= A is more like the temporary field. + // They will be updated during DXE if the DXE mode is different from P= EI. + // + CpuMpData->CpuCount =3D OldCpuMpData->CpuCount; + CpuMpData->BspNumber =3D OldCpuMpData->BspNumber; + CpuMpData->CpuInfoInHob =3D OldCpuMpData->CpuInfoInHob; + CpuInfoInHob =3D (CPU_INFO_IN_HOB *)(UINTN)CpuMpData->CpuIn= foInHob; for (Index =3D 0; Index < CpuMpData->CpuCount; Index++) { + // + // In PEI phase, or for first time initialization, initializeSpinLoc= k is + // performed during CollectProcessorCount(). In DXE phase, it is don= e during traversal here. + // InitializeSpinLock (&CpuMpData->CpuData[Index].ApLock); CpuMpData->CpuData[Index].CpuHealthy =3D (CpuInfoInHob[Index].Health= =3D=3D 0) ? TRUE : FALSE; CpuMpData->CpuData[Index].ApFunction =3D 0; } - } =20 - // - // Store BSP's MTRR setting - // - MtrrGetAllMtrrs (&CpuMpData->MtrrTable); - - // - // Wakeup APs to do some AP initialize sync (Microcode & MTRR) - // - if (CpuMpData->CpuCount > 1) { - if (OldCpuMpData !=3D NULL) { - // - // Only needs to use this flag for DXE phase to update the wake up - // buffer. Wakeup buffer allocated in PEI phase is no longer valid - // in DXE. - // - CpuMpData->InitFlag =3D ApInitReconfig; - WakeUpAP (CpuMpData, TRUE, 0, ApMtrrSync, CpuMpData, TRUE); - } else { - WakeUpAP (CpuMpData, TRUE, 0, ApInitializeSync, CpuMpData, TRUE); - } + // + // Store BSP's MTRR setting + // + MtrrGetAllMtrrs (&CpuMpData->MtrrTable); =20 // - // Wait for all APs finished initialization + // Wakeup APs to do some AP initialize sync (Microcode & MTRR) // - while (CpuMpData->FinishedCount < (CpuMpData->CpuCount - 1)) { - CpuPause (); - } + if (CpuMpData->CpuCount > 1) { + if (OldCpuMpData !=3D NULL) { + // + // Only needs to use this flag for DXE phase to update the wake up + // buffer. Wakeup buffer allocated in PEI phase is no longer valid + // in DXE. + // + CpuMpData->InitFlag =3D ApInitReconfig; + WakeUpAP (CpuMpData, TRUE, 0, ApMtrrSync, CpuMpData, TRUE); + // + // Wait for all APs to complete initialization. + // + while (CpuMpData->FinishedCount < (CpuMpData->CpuCount - 1)) { + CpuPause (); + } =20 - if (OldCpuMpData !=3D NULL) { - CpuMpData->InitFlag =3D ApInitDone; + CpuMpData->InitFlag =3D ApInitDone; + } } + } =20 - for (Index =3D 0; Index < CpuMpData->CpuCount; Index++) { - SetApState (&CpuMpData->CpuData[Index], CpuStateIdle); - } + for (Index =3D 0; Index < CpuMpData->CpuCount; Index++) { + SetApState (&CpuMpData->CpuData[Index], CpuStateIdle); } =20 // diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpIn= itLib/MpLib.h index f5086e497e..d6a416b943 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -235,6 +235,7 @@ struct _CPU_MP_DATA { UINT64 CpuInfoInHob; UINT32 CpuCount; UINT32 BspNumber; + UINT32 SizeOfUINTN; // // The above fields data will be passed from PEI to DXE // Please make sure the fields offset same in the different --=20 2.36.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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