From nobody Sun Feb 8 08:43:20 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+95745+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+95745+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1667136582; cv=none; d=zohomail.com; s=zohoarc; b=kFxBd+XbqwIdGxoIyndQj1fg6M2aP+xofobbeJJ8HkIePd6EDTQTgBTTPck8k9E19A8TifBJE6sXEncWbjIKgUBCgXnWDQhfbfHggIa9Qsa+ut00eCdaUnqwM6OrIcJr6gWx45X8RMVJ3BgHRzCk08TIyPrtrTWujwlE7O8scJ8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1667136582; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=1Zy1OKu+NwvPR5y7wg9M6jki1ngyeC56AAbvMtzwa40=; b=ipHq/i3iMd2VnDvmm7+uJbK8GebPh03UBoz22zvXA3RIljdVuxQFEtIiwn4/DYA5aKx13FdIULOPKo2HuwekYyOFLxzOA0EleFSkoLZW1JmUJF09U/UeYRhbP1nYziWhgye9YREqywruUd//DMTOQfEW3W8FR1Ovnved2JP0LO4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+95745+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1667136582191127.59936997434056; Sun, 30 Oct 2022 06:29:42 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id a8aQYY1788612xWwhlpJrHfh; Sun, 30 Oct 2022 06:29:41 -0700 X-Received: from mail-pg1-f176.google.com (mail-pg1-f176.google.com [209.85.215.176]) by mx.groups.io with SMTP id smtpd.web11.8328.1667136581208830893 for ; Sun, 30 Oct 2022 06:29:41 -0700 X-Received: by mail-pg1-f176.google.com with SMTP id f193so8671903pgc.0 for ; Sun, 30 Oct 2022 06:29:41 -0700 (PDT) X-Gm-Message-State: nk4LDLtkqHYAJIz7Y1akxRc8x1787277AA= X-Google-Smtp-Source: AMsMyM6eOoIp6NbteoSsDECMUKV3o5B1EGPJm0fg1B8a9ycCg7LRVSZ0uSHgEDTCvLHPNmfXHZlc2A== X-Received: by 2002:a63:de0e:0:b0:46f:23c6:e7d9 with SMTP id f14-20020a63de0e000000b0046f23c6e7d9mr8197840pgg.68.1667136580510; Sun, 30 Oct 2022 06:29:40 -0700 (PDT) X-Received: from localhost.localdomain ([49.206.12.236]) by smtp.gmail.com with ESMTPSA id r10-20020aa79eca000000b0056b6a22d6c9sm2612330pfq.212.2022.10.30.06.29.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 30 Oct 2022 06:29:40 -0700 (PDT) From: "Sunil V L" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar , Daniel Schaefer , Abner Chang Subject: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V5 19/30] UefiCpuPkg/CpuDxe: Add RISCV_EFI_BOOT_PROTOCOL support Date: Sun, 30 Oct 2022 18:58:31 +0530 Message-Id: <20221030132842.54077-20-sunilvl@ventanamicro.com> In-Reply-To: <20221030132842.54077-1-sunilvl@ventanamicro.com> References: <20221030132842.54077-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sunilvl@ventanamicro.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1667136581; bh=li8XQ3Ua9pissZezlVqY4SLuILT+IM6uRqkErExrdK8=; h=Cc:Date:From:Reply-To:Subject:To; b=cIa2wVtV5ytdSnp7uUnd/n+f9SjZo7ZfpGLBwmZx+/tAJHcyGOtmCatYqsACcQedF6U zmMZ3kWog394PgRhkCgjpH25M1cdxlBEiUVF4difVRLuhIfL2xh2lvY+FsjgOJgOl1jqS 07KsGnaG50xMk9LzoMTX3Mk23ZrNASl5N/0= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1667136584153100002 Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4076 RISC-V UEFI platforms need to support RISCV_EFI_BOOT_PROTOCOL. Add the support for this protocol which is defined in the spec: https://github.com/riscv-non-isa/riscv-uefi/releases/download/1.0.0/RISCV_U= EFI_PROTOCOL-spec.pdf Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Daniel Schaefer Cc: Abner Chang Signed-off-by: Sunil V L Acked-by: Abner Chang --- UefiCpuPkg/UefiCpuPkg.dsc | 12 ++-- UefiCpuPkg/CpuDxe/CpuDxe.inf | 3 + UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c | 66 ++++++++++++++++++-- 3 files changed, 71 insertions(+), 10 deletions(-) diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc index 0e1a99ddc09f..aaf761fdcf48 100644 --- a/UefiCpuPkg/UefiCpuPkg.dsc +++ b/UefiCpuPkg/UefiCpuPkg.dsc @@ -125,9 +125,13 @@ [Components] UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf UefiCpuPkg/MicrocodeMeasurementDxe/MicrocodeMeasurementDxe.inf - -[Components.IA32, Components.X64] UefiCpuPkg/CpuDxe/CpuDxe.inf + UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf +!if $(TOOL_CHAIN_TAG) !=3D "XCODE5" + UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.i= nf +!endif + +[Components.IA32, Components.X64] UefiCpuPkg/CpuFeatures/CpuFeaturesPei.inf { NULL|UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf @@ -144,10 +148,6 @@ [Components.IA32, Components.X64] UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf - UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf -!if $(TOOL_CHAIN_TAG) !=3D "XCODE5" - UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.i= nf -!endif UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHandle= rLib.inf diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf index eddc86a38965..857b84ac3122 100644 --- a/UefiCpuPkg/CpuDxe/CpuDxe.inf +++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf @@ -74,6 +74,9 @@ [Protocols] gEfiMpServiceProtocolGuid ## PRODUCES gEfiSmmBase2ProtocolGuid ## SOMETIMES_CONSUMES =20 +[Protocols.RISCV64] + gRiscVEfiBootProtocolGuid ## PRODUCES + [Guids] gIdleLoopEventGuid ## CONSUMES ## E= vent gEfiVectorHandoffTableGuid ## SOMETIMES_CONSUMES ## S= ystemTable diff --git a/UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c b/UefiCpuPkg/CpuDxe/RiscV64= /CpuDxe.c index 9f557b776a09..7551e0653603 100644 --- a/UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c +++ b/UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c @@ -2,6 +2,7 @@ RISC-V CPU DXE driver. =20 Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. Al= l rights reserved.
+ Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -12,8 +13,41 @@ // // Global Variables // -STATIC BOOLEAN mInterruptState =3D FALSE; -STATIC EFI_HANDLE mCpuHandle =3D NULL; +STATIC BOOLEAN mInterruptState =3D FALSE; +STATIC EFI_HANDLE mCpuHandle =3D NULL; +STATIC UINTN mBootHartId; +RISCV_EFI_BOOT_PROTOCOL gRiscvBootProtocol; + +/** + Get the boot hartid + + @param This Protocol instance structure + @param BootHartId Pointer to the Boot Hart ID variable + + @retval EFI_SUCCESS If BootHartId is returned + @retval EFI_INVALID_PARAMETER Either "BootHartId" is NULL or "This" is = not + a valid RISCV_EFI_BOOT_PROTOCOL instance. + +**/ +EFI_STATUS +EFIAPI +RiscvGetBootHartId ( + IN RISCV_EFI_BOOT_PROTOCOL *This, + OUT UINTN *BootHartId + ) +{ + if ((This !=3D &gRiscvBootProtocol) || (BootHartId =3D=3D NULL)) { + return EFI_INVALID_PARAMETER; + } + + *BootHartId =3D mBootHartId; + return EFI_SUCCESS; +} + +RISCV_EFI_BOOT_PROTOCOL gRiscvBootProtocol =3D { + RISCV_EFI_BOOT_PROTOCOL_LATEST_VERSION, + RiscvGetBootHartId +}; =20 EFI_CPU_ARCH_PROTOCOL gCpu =3D { CpuFlushCpuDataCache, @@ -284,15 +318,39 @@ InitializeCpu ( IN EFI_SYSTEM_TABLE *SystemTable ) { - EFI_STATUS Status; + EFI_STATUS Status; + EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContext; =20 - InitializeCpuExceptionHandlers(NULL); + GetFirmwareContextPointer (&FirmwareContext); + ASSERT (FirmwareContext !=3D NULL); + if (FirmwareContext =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "Failed to get the pointer of EFI_RISCV_FIRMWARE_= CONTEXT\n")); + return EFI_NOT_FOUND; + } + + DEBUG ((DEBUG_INFO, " %a: Firmware Context is at 0x%x.\n", __FUNCTION__,= FirmwareContext)); + + mBootHartId =3D FirmwareContext->BootHartId; + DEBUG ((DEBUG_INFO, " %a: mBootHartId =3D 0x%x.\n", __FUNCTION__, mBootH= artId)); + + InitializeCpuExceptionHandlers (NULL); =20 // // Make sure interrupts are disabled // DisableInterrupts (); =20 + // + // Install Boot protocol + // + Status =3D gBS->InstallProtocolInterface ( + &ImageHandle, + &gRiscVEfiBootProtocolGuid, + EFI_NATIVE_INTERFACE, + &gRiscvBootProtocol + ); + ASSERT_EFI_ERROR (Status); + // // Install CPU Architectural Protocol // --=20 2.38.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#95745): https://edk2.groups.io/g/devel/message/95745 Mute This Topic: https://groups.io/mt/94664331/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-