From nobody Tue Feb 10 07:21:33 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+92228+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+92228+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1660008373; cv=none; d=zohomail.com; s=zohoarc; b=V0abtzrlaosQ6ZmIpGR4scytOEFEMV+3YJSqN4zwF1yepfhuSFw1HT2VmdZZq0AcMEBnXfyVJBPwNBE4+P8CnqAAvYW4wPu97kGYqY+Yi8YnIlVy+GV9KckMztCvPsu4brcyxFnQ13HSDq4Y3+AvSPVeOaO0RvvFHn4aSMR4Bgo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1660008373; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=Yo8MVZcrZrMu0xFUpOyIsN+SfVXWBA9O/n4XHLD1970=; b=iI7A1BDGltd+3VHg7ksVzffHHnWruFf4LJno8Gk8Fijt5iR8mmtS8boS9VqGq6inRM0lla1ArS7bkETMDIkPupdKcp9hlAxf+7PAhF7ZP+UR7uNdjXUqXvAPNjMCrNXEPCcvAL9Xx4L9R+8UZgHOqWg4NHTKur1bFIOe7pEslXc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+92228+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1660008373946721.6552969535023; Mon, 8 Aug 2022 18:26:13 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id AvzMYY1788612x0cOyUkCVhE; Mon, 08 Aug 2022 18:26:13 -0700 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web12.6742.1660008368004129018 for ; Mon, 08 Aug 2022 18:26:12 -0700 X-IronPort-AV: E=McAfee;i="6400,9594,10433"; a="377020615" X-IronPort-AV: E=Sophos;i="5.93,223,1654585200"; d="scan'208";a="377020615" X-Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Aug 2022 18:26:12 -0700 X-IronPort-AV: E=Sophos;i="5.93,223,1654585200"; d="scan'208";a="932291965" X-Received: from unknown (HELO shwdesfp01.ccr.corp.intel.com) ([10.239.158.151]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Aug 2022 18:26:10 -0700 From: "Zhiguang Liu" To: devel@edk2.groups.io Cc: Zhiguang Liu , Eric Dong , Ray Ni , Rahul Kumar , Leif Lindholm , Dandan Bi , Liming Gao , Jian J Wang Subject: [edk2-devel] [PATCH v3 2/3] MdeModulePkg: Move CPU_EXCEPTION_INIT_DATA to UefiCpuPkg Date: Tue, 9 Aug 2022 09:25:36 +0800 Message-Id: <20220809012537.1513-3-zhiguang.liu@intel.com> In-Reply-To: <20220809012537.1513-1-zhiguang.liu@intel.com> References: <20220809012537.1513-1-zhiguang.liu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,zhiguang.liu@intel.com X-Gm-Message-State: uNIdUMjzjdHrZfVgVVB50vowx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1660008373; bh=NkHQx9GrmJxW3uPxIAA51c4TW6d3xqedEIaubyC7CYE=; h=Cc:Date:From:Reply-To:Subject:To; b=rmJ9eJ+/9qJiDixgVwRDyIgw+Sih5eM47BEyVocgZ9xQUrgGfB7yHvvLTHDoYtUPqYL UepGI2KCh3l51KDOtjtyvEfKBwHaxIm1kiw9l7MkjTMQ72Z7ZFOtGo6eJ4YU8zYfHR6rJ 3uV4Sx7RicqyJ43GiMfQftI/tx/vVPeFCdk= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1660008374610100009 Content-Type: text/plain; charset="utf-8" Since the API InitializeSeparateExceptionStacks is simplified and does't use the struct CPU_EXCEPTION_INIT_DATA, CPU_EXCEPTION_INIT_DATA become a inner implementation of CpuExcetionHandlerLib. Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Leif Lindholm Cc: Dandan Bi Cc: Liming Gao Cc: Jian J Wang Signed-off-by: Zhiguang Liu --- .../Include/Library/CpuExceptionHandlerLib.h | 67 ------------------ .../CpuExceptionCommon.h | 69 ++++++++++++++++++- 2 files changed, 68 insertions(+), 68 deletions(-) diff --git a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h b/MdeMod= ulePkg/Include/Library/CpuExceptionHandlerLib.h index 8d44ed916a..94e9b20ae1 100644 --- a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h +++ b/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h @@ -13,73 +13,6 @@ #include #include =20 -#define CPU_EXCEPTION_INIT_DATA_REV 1 - -typedef union { - struct { - // - // Revision number of this structure. - // - UINT32 Revision; - // - // The address of top of known good stack reserved for *ALL* exceptions - // listed in field StackSwitchExceptions. - // - UINTN KnownGoodStackTop; - // - // The size of known good stack for *ONE* exception only. - // - UINTN KnownGoodStackSize; - // - // Buffer of exception vector list for stack switch. - // - UINT8 *StackSwitchExceptions; - // - // Number of exception vectors in StackSwitchExceptions. - // - UINTN StackSwitchExceptionNumber; - // - // Buffer of IDT table. It must be type of IA32_IDT_GATE_DESCRIPTOR. - // Normally there's no need to change IDT table size. - // - VOID *IdtTable; - // - // Size of buffer for IdtTable. - // - UINTN IdtTableSize; - // - // Buffer of GDT table. It must be type of IA32_SEGMENT_DESCRIPTOR. - // - VOID *GdtTable; - // - // Size of buffer for GdtTable. - // - UINTN GdtTableSize; - // - // Pointer to start address of descriptor of exception task gate in the - // GDT table. It must be type of IA32_TSS_DESCRIPTOR. - // - VOID *ExceptionTssDesc; - // - // Size of buffer for ExceptionTssDesc. - // - UINTN ExceptionTssDescSize; - // - // Buffer of task-state segment for exceptions. It must be type of - // IA32_TASK_STATE_SEGMENT. - // - VOID *ExceptionTss; - // - // Size of buffer for ExceptionTss. - // - UINTN ExceptionTssSize; - // - // Flag to indicate if default handlers should be initialized or not. - // - BOOLEAN InitDefaultHandlers; - } Ia32, X64; -} CPU_EXCEPTION_INIT_DATA; - /** Initializes all CPU exceptions entries and provides the default exceptio= n handlers. =20 diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h= b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h index fd42c4be0f..443eaf359b 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h @@ -1,7 +1,7 @@ /** @file Common header file for CPU Exception Handler Library. =20 - Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2012 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -49,6 +49,73 @@ =20 #define CPU_TSS_GDT_SIZE (SIZE_2KB + CPU_TSS_DESC_SIZE + CPU_TSS_SIZE) =20 +#define CPU_EXCEPTION_INIT_DATA_REV 1 + +typedef union { + struct { + // + // Revision number of this structure. + // + UINT32 Revision; + // + // The address of top of known good stack reserved for *ALL* exceptions + // listed in field StackSwitchExceptions. + // + UINTN KnownGoodStackTop; + // + // The size of known good stack for *ONE* exception only. + // + UINTN KnownGoodStackSize; + // + // Buffer of exception vector list for stack switch. + // + UINT8 *StackSwitchExceptions; + // + // Number of exception vectors in StackSwitchExceptions. + // + UINTN StackSwitchExceptionNumber; + // + // Buffer of IDT table. It must be type of IA32_IDT_GATE_DESCRIPTOR. + // Normally there's no need to change IDT table size. + // + VOID *IdtTable; + // + // Size of buffer for IdtTable. + // + UINTN IdtTableSize; + // + // Buffer of GDT table. It must be type of IA32_SEGMENT_DESCRIPTOR. + // + VOID *GdtTable; + // + // Size of buffer for GdtTable. + // + UINTN GdtTableSize; + // + // Pointer to start address of descriptor of exception task gate in the + // GDT table. It must be type of IA32_TSS_DESCRIPTOR. + // + VOID *ExceptionTssDesc; + // + // Size of buffer for ExceptionTssDesc. + // + UINTN ExceptionTssDescSize; + // + // Buffer of task-state segment for exceptions. It must be type of + // IA32_TASK_STATE_SEGMENT. + // + VOID *ExceptionTss; + // + // Size of buffer for ExceptionTss. + // + UINTN ExceptionTssSize; + // + // Flag to indicate if default handlers should be initialized or not. + // + BOOLEAN InitDefaultHandlers; + } Ia32, X64; +} CPU_EXCEPTION_INIT_DATA; + // // Record exception handler information // --=20 2.31.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#92228): https://edk2.groups.io/g/devel/message/92228 Mute This Topic: https://groups.io/mt/92907051/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-