From nobody Mon Feb 9 21:19:48 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+91756+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+91756+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1658535732; cv=none; d=zohomail.com; s=zohoarc; b=lMjvKwcemZ0vBtoOgujq0DwEZWzNK0Gz2nCFUwQpRQk4DE05qEr4jL+BdHoxwFQlj98pN2uFhe7dg1UwR3LaETBQS1Ta8SIOQQSLbMwHXfQTEKo3SG2qoNI93ImHbVmVM6WU9tOWZtk9KkG5gwqfNHjkvUsOkMF7C3YETP0A/OI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1658535732; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=+s8jUSLRzEXRttzdtKo4sexC88reOXGnipPr1KRwBJ4=; b=ZEUgjGHsiUv/Pt/5YiG5P3/kDlEqhP16SZ/jQQTy9EuffXOqH/el7JMKY5iGEezPV2IV1/jEbfSfl9jXAF5okAgmDmy1dc3XrpGyvspxiDk+BxJMU+EObC2ABpfHcW7p8XzdOD0+yIxM6EJXrzvbM6TeJMET3WmdubUGhb9ujqs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+91756+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1658535732218631.87860105598; Fri, 22 Jul 2022 17:22:12 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id xco5YY1788612xmutbZAuaz0; Fri, 22 Jul 2022 17:22:11 -0700 X-Received: from mail-qt1-f181.google.com (mail-qt1-f181.google.com [209.85.160.181]) by mx.groups.io with SMTP id smtpd.web08.1595.1658535729136005758 for ; Fri, 22 Jul 2022 17:22:11 -0700 X-Received: by mail-qt1-f181.google.com with SMTP id g24so4656249qtu.2 for ; Fri, 22 Jul 2022 17:22:10 -0700 (PDT) X-Gm-Message-State: liNJRLGezrmFwQmkE8sNstNpx1787277AA= X-Google-Smtp-Source: AGRyM1ujzFMEQLlPPgWXqBrg0yVBM0aQ1lKT0coVBePin0JUVaMpSVf2RJczBhAKszwIgacdFDh8/w== X-Received: by 2002:ac8:5784:0:b0:31f:24e:93f5 with SMTP id v4-20020ac85784000000b0031f024e93f5mr2304665qta.429.1658535730120; Fri, 22 Jul 2022 17:22:10 -0700 (PDT) X-Received: from aturtleortwo-benjamindomain.. ([2607:f2c0:e98c:e:39b7:8453:91b5:69bf]) by smtp.gmail.com with ESMTPSA id z8-20020ac84308000000b0031ee1f0c420sm3766705qtm.10.2022.07.22.17.22.09 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Jul 2022 17:22:09 -0700 (PDT) From: "Benjamin Doron" To: devel@edk2.groups.io Subject: [edk2-devel] [PATCH v1 5/5] [WIP] KabylakeOpenBoardPkg: Example of board S3 Date: Fri, 22 Jul 2022 20:20:01 -0400 Message-Id: <20220723002001.1309418-6-benjamin.doron00@gmail.com> In-Reply-To: <20220723002001.1309418-1-benjamin.doron00@gmail.com> References: <20220723002001.1309418-1-benjamin.doron00@gmail.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,benjamin.doron00@gmail.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1658535731; bh=G/YIbl4F/Hxt6LHPr/V5XTRwhVXh3j9ZweU6NsnxVKA=; h=Date:From:Reply-To:Subject:To; b=gM6XR1zwvHKrhSWClnsyHthXQUgVf5+7jvp57XHX1z5bGSZHOgWxCRKSj+agJlR3DsB qmDHHnT8AS3OLjFnrKBailjsOFw7Sk05tE5Pzyo1SIwdEJ/JVv1fAv+gJHH5llr0XWzs6 hVri8t9C2YdJI1XmBOndNhi3jkSI8Pr4LgI= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1658535733404100020 Content-Type: text/plain; charset="utf-8" Signed-off-by: Benjamin Doron --- Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/P= eiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c | 12 ++- Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/P= eiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c | 13 ++- Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib= /PeiAspireVn7Dash572GInitPreMemLib.c | 84 +++++++++++++----= --- Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib= /PeiBoardInitPreMemLib.inf | 4 +- Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSi= liconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c | 12 ++- Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSi= liconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf | 1 + Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc = | 1 + Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc = | 1 + 8 files changed, 97 insertions(+), 31 deletions(-) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapp= er/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c b/Platform= /Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSilicon= PolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c index a9b7e446c8d6..7e4194bf4fe6 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Libr= ary/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Libr= ary/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c @@ -11,6 +11,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include #include #include +#include + #include #include #include @@ -32,11 +34,15 @@ PeiFspMiscUpdUpdatePreMem ( ) { EFI_STATUS Status; + EFI_BOOT_MODE BootMode; UINTN VariableSize; VOID *FspNvsBufferPtr; UINT8 MorControl; VOID *MorControlPtr; =20 + Status =3D PeiServicesGetBootMode (&BootMode); + ASSERT_EFI_ERROR (Status); + // // Initialize S3 Data variable (S3DataPtr). It may be used for warm and = fast boot paths. // @@ -70,7 +76,11 @@ PeiFspMiscUpdUpdatePreMem ( &VariableSize ); DEBUG ((DEBUG_INFO, "MorControl - 0x%x (%r)\n", MorControl, Status)); - if (MOR_CLEAR_MEMORY_VALUE (MorControl)) { + // + // Do not set CleanMemory on S3 resume + // TODO: Handle advanced features later - capsule update is in-memory li= st + // + if (MOR_CLEAR_MEMORY_VALUE (MorControl) && BootMode !=3D BOOT_ON_S3_RESU= ME) { FspmUpd->FspmConfig.CleanMemory =3D (BOOLEAN)(MorControl & MOR_CLEAR_M= EMORY_BIT_MASK); } =20 diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapp= er/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c b/Platform/Inte= l/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolic= yUpdateLibFsp/PeiSaPolicyUpdate.c index 4621cbd3ca3a..ca91eaa8836b 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Libr= ary/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Libr= ary/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c @@ -11,6 +11,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include #include #include +#include =20 /** Performs FSP SA PEI Policy initialization. @@ -27,12 +28,17 @@ PeiFspSaPolicyUpdate ( IN OUT FSPS_UPD *FspsUpd ) { + EFI_STATUS Status; + EFI_BOOT_MODE BootMode; VOID *Buffer; VOID *MemBuffer; UINT32 Size; =20 DEBUG((DEBUG_INFO, "\nUpdating SA Policy in Post Mem\n")); =20 + Status =3D PeiServicesGetBootMode (&BootMode); + ASSERT_EFI_ERROR (Status); + FspsUpd->FspsConfig.PeiGraphicsPeimInit =3D 1; =20 Size =3D 0; @@ -40,7 +46,12 @@ PeiFspSaPolicyUpdate ( PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RA= W, 0, &Buffer, &Size); if (Buffer =3D=3D NULL) { DEBUG((DEBUG_WARN, "Could not locate VBT\n")); - } else { + // + // TODO: Follow coreboot and do not assign + // GraphicsConfigPtr on S3 resume. + // - Reinitialisation is unnecessary? + // + } else if (BootMode !=3D BOOT_ON_S3_RESUME) { MemBuffer =3D (VOID *)AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Size)= ); if ((MemBuffer !=3D NULL) && (Buffer !=3D NULL)) { CopyMem (MemBuffer, (VOID *)Buffer, (UINTN)Size); diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/= BoardInitLib/PeiAspireVn7Dash572GInitPreMemLib.c b/Platform/Intel/KabylakeO= penBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiAspireVn7Dash572GInit= PreMemLib.c index 487caf158fb2..bd87b1409575 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardIn= itLib/PeiAspireVn7Dash572GInitPreMemLib.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardIn= itLib/PeiAspireVn7Dash572GInitPreMemLib.c @@ -12,9 +12,10 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include #include #include +#include #include #include -#include +#include =20 #include #include @@ -45,12 +46,6 @@ GLOBAL_REMOVE_IF_UNREFERENCED const UINT16 RcompTargetAs= pireVn7Dash572G[SA_MRC_M #define DGPU_HOLD_RST GPIO_SKL_LP_GPP_B4 /* Active low */ #define DGPU_PWR_EN GPIO_SKL_LP_GPP_B21 /* Active low */ =20 -EFI_STATUS -EFIAPI -AspireVn7Dash572GBoardDetect ( - VOID - ); - /** Aspire VN7-572G board configuration init function for PEI pre-memory pha= se. =20 @@ -73,7 +68,7 @@ AspireVn7Dash572GInitPreMem ( // PcdSet8S (PcdSaMiscUserBd, 5); // ULT/ULX/Mobile Halo PcdSet8S (PcdMrcCaVrefConfig, 2); // DDR4: "VREF_CA to CH_A and VREF_DQ= _B to CH_B" - // TODO: Clear Dq/Dqs? + // TODO: Search vendor FW for Dq/Dqs. Unnecessary if FSP detects LPDDR PcdSetBoolS (PcdMrcDqPinsInterleaved, TRUE); =20 PcdSet32S (PcdMrcRcompResistor, (UINTN) RcompResistorAspireVn7Dash572G); @@ -134,7 +129,7 @@ DgpuPowerOn ( { UINT32 OutputVal; =20 - DEBUG ((DEBUG_INFO, "DgpuPowerOn() Start\n")); + DEBUG ((DEBUG_INFO, "%a() Start\n", __FUNCTION__)); =20 GpioGetOutputValue (DGPU_PRESENT, &OutputVal); if (!OutputVal) { @@ -151,7 +146,7 @@ DgpuPowerOn ( GpioSetOutputValue (DGPU_PWR_EN, 1); // Deassert dGPU_PWR_EN# } =20 - DEBUG ((DEBUG_INFO, "DgpuPowerOn() End\n")); + DEBUG ((DEBUG_INFO, "%a() End\n", __FUNCTION__)); } =20 /** @@ -225,7 +220,7 @@ AspireVn7Dash572GBoardInitAfterMemoryInit ( VOID ) { - EFI_STATUS Status; + EFI_STATUS Status; =20 // BUGBUG: Workaround for a misbehaving system firmware not setting goId= le // - Based on prior investigation for coreboot, I suspect FSP @@ -239,15 +234,24 @@ AspireVn7Dash572GBoardInitAfterMemoryInit ( if (EFI_ERROR (Status)) { DEBUG ((DEBUG_WARN, "Failed to enable LGMR. Were ACPI tables built for= LGMR memory map?\n")); } + return EFI_SUCCESS; } =20 +EFI_STATUS +EFIAPI +AspireVn7Dash572GBoardDetect ( + VOID + ); + EFI_STATUS EFIAPI AspireVn7Dash572GBoardDebugInit ( VOID ) { + UINT16 ABase; + /// /// Do Early PCH init /// @@ -258,6 +262,16 @@ AspireVn7Dash572GBoardDebugInit ( // - Alternatively, move the preceding calls to BoardDetect() AspireVn7Dash572GBoardDetect (); =20 + // Dump relevant registers + // - TODO: Remove after debugging + DEBUG ((DEBUG_INFO, "PMC GEN_PMCON_A=3D 0x%x\n", PciRead32 ((UINTN)PCI_L= IB_ADDRESS (0, PCI_DEVICE_NUMBER_PCH_PMC, PCI_FUNCTION_NUMBER_PCH_PMC, R_PC= H_PMC_GEN_PMCON_A)))); + DEBUG ((DEBUG_INFO, "PMC GEN_PMCON_B=3D 0x%x\n", PciRead32 ((UINTN)PCI_L= IB_ADDRESS (0, PCI_DEVICE_NUMBER_PCH_PMC, PCI_FUNCTION_NUMBER_PCH_PMC, R_PC= H_PMC_GEN_PMCON_B)))); + + PchAcpiBaseGet (&ABase); + DEBUG ((DEBUG_INFO, "ABase PM1_STS=3D 0x%x\n", IoRead16 (ABase))); + DEBUG ((DEBUG_INFO, "ABase PM1_EN=3D 0x%x\n", IoRead16 (ABase + R_PCH_AC= PI_PM1_EN))); + DEBUG ((DEBUG_INFO, "ABase PM1_CNT=3D 0x%x\n", IoRead32 (ABase + R_PCH_A= CPI_PM1_CNT))); + return EFI_SUCCESS; } =20 @@ -267,26 +281,42 @@ AspireVn7Dash572GBoardBootModeDetect ( VOID ) { - UINT16 ABase; UINT32 SleepType; + EFI_BOOT_MODE BootMode; + UINT16 ABase; =20 DEBUG ((DEBUG_INFO, "Performing boot mode detection\n")); =20 - // TODO: Perform advanced detection (recovery/capsule) - // FIXME: This violates PI specification? But BOOT_WITH* would always ta= ke precedence - // over BOOT_ON_S{4,5}... - // - Use PchPmcLib GetSleepTypeAfterWakeup() instead - PchAcpiBaseGet (&ABase); - SleepType =3D IoRead32 (ABase + R_PCH_ACPI_PM1_CNT) & B_PCH_ACPI_PM1_CNT= _SLP_TYP; + // Known sane defaults; TODO: Consider "default"? + BootMode =3D BOOT_WITH_FULL_CONFIGURATION; =20 - switch (SleepType) { - case V_PCH_ACPI_PM1_CNT_S3: - return BOOT_ON_S3_RESUME; - case V_PCH_ACPI_PM1_CNT_S4: - return BOOT_ON_S4_RESUME; -// case V_PCH_ACPI_PM1_CNT_S5: -// return BOOT_ON_S5_RESUME; - default: - return BOOT_WITH_FULL_CONFIGURATION; + // TODO: Perform advanced detection (capsule/recovery) + // TODO: Perform "IsFirstBoot" test with VariablePpi for "minimal"/"assu= me" + if (GetSleepTypeAfterWakeup (&SleepType)) { + switch (SleepType) { + case V_PCH_ACPI_PM1_CNT_S3: + BootMode =3D BOOT_ON_S3_RESUME; + break; + case V_PCH_ACPI_PM1_CNT_S4: + BootMode =3D BOOT_ON_S4_RESUME; + break; + case V_PCH_ACPI_PM1_CNT_S5: + BootMode =3D BOOT_ON_S5_RESUME; + break; + } } + + DEBUG ((DEBUG_INFO, "BootMode is 0x%x\n", BootMode)); + + // Dump relevant registers + // - TODO: Remove after debugging + DEBUG ((DEBUG_INFO, "PMC GEN_PMCON_A=3D 0x%x\n", PciRead32 ((UINTN)PCI_L= IB_ADDRESS (0, PCI_DEVICE_NUMBER_PCH_PMC, PCI_FUNCTION_NUMBER_PCH_PMC, R_PC= H_PMC_GEN_PMCON_A)))); + DEBUG ((DEBUG_INFO, "PMC GEN_PMCON_B=3D 0x%x\n", PciRead32 ((UINTN)PCI_L= IB_ADDRESS (0, PCI_DEVICE_NUMBER_PCH_PMC, PCI_FUNCTION_NUMBER_PCH_PMC, R_PC= H_PMC_GEN_PMCON_B)))); + + PchAcpiBaseGet (&ABase); + DEBUG ((DEBUG_INFO, "ABase PM1_STS=3D 0x%x\n", IoRead16 (ABase))); + DEBUG ((DEBUG_INFO, "ABase PM1_EN=3D 0x%x\n", IoRead16 (ABase + R_PCH_AC= PI_PM1_EN))); + DEBUG ((DEBUG_INFO, "ABase PM1_CNT=3D 0x%x\n", IoRead32 (ABase + R_PCH_A= CPI_PM1_CNT))); + + return BootMode; } diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/= BoardInitLib/PeiBoardInitPreMemLib.inf b/Platform/Intel/KabylakeOpenBoardPk= g/AspireVn7Dash572G/Library/BoardInitLib/PeiBoardInitPreMemLib.inf index 4de6b7e1721e..a3164870ef9b 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardIn= itLib/PeiBoardInitPreMemLib.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardIn= itLib/PeiBoardInitPreMemLib.inf @@ -23,11 +23,13 @@ TimerLib PchCycleDecodingLib PchResetLib + PciLib IoLib EcLib BoardEcLib GpioLib - PeiLib + PeiServicesLib + PchPmcLib =20 [Packages] MinPlatformPkg/MinPlatformPkg.dec diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/L= ibrary/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c b/Platform/Int= el/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUp= dateLib/PeiSiliconPolicyUpdateLib.c index 3764f7c3ac09..9c8542a29719 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/= PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/= PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c @@ -20,6 +20,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include #include #include +#include #include #include #include @@ -549,6 +550,7 @@ SiliconPolicyUpdatePostMem ( ) { EFI_STATUS Status; + EFI_BOOT_MODE BootMode; VOID *Buffer; VOID *MemBuffer; UINT32 Size; @@ -557,6 +559,9 @@ SiliconPolicyUpdatePostMem ( =20 DEBUG((DEBUG_INFO, "\nUpdating Policy in Post Mem\n")); =20 + Status =3D PeiServicesGetBootMode (&BootMode); + ASSERT_EFI_ERROR (Status); + GtConfig =3D NULL; Status =3D GetConfigBlock ((VOID *) Policy, &gGraphicsPeiConfigGuid, (VO= ID *)&GtConfig); ASSERT_EFI_ERROR (Status); @@ -571,7 +576,12 @@ SiliconPolicyUpdatePostMem ( PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RA= W, 0, &Buffer, &Size); if (Buffer =3D=3D NULL) { DEBUG((DEBUG_WARN, "Could not locate VBT\n")); - } else { + // + // TODO: Follow coreboot and do not assign + // GraphicsConfigPtr on S3 resume. + // - Reinitialisation is unnecessary? + // + } else if (BootMode !=3D BOOT_ON_S3_RESUME) { MemBuffer =3D (VOID *)AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Size)= ); if ((MemBuffer !=3D NULL) && (Buffer !=3D NULL)) { CopyMem (MemBuffer, (VOID *)Buffer, (UINTN)Size); diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/L= ibrary/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf b/Platform/I= ntel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicy= UpdateLib/PeiSiliconPolicyUpdateLib.inf index 1ce26fc3dcec..31a45292209d 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/= PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/= PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf @@ -23,6 +23,7 @@ BaseMemoryLib MemoryAllocationLib PeiLib + PeiServicesLib CpuPlatformLib PchPcieRpLib PchInfoLib diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.ds= c b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc index 2e3c6d3ca506..985c1ea93660 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc @@ -108,6 +108,7 @@ ConfigBlockLib|IntelSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBloc= kLib.inf SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconInitLib/PeiSilic= onInitLib.inf SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInit= LibFsp/PeiSiliconPolicyInitLibFsp.inf + IntelCompatShimLib|$(PLATFORM_SI_PACKAGE)/Library/BaseIntelCompatShimLib= Kbl/BaseIntelCompatShimLibKbl.inf =20 ##################################### # Platform Package diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.= dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc index 26a54b0dc7cc..a2c548101ff3 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc @@ -138,6 +138,7 @@ ####################################### ConfigBlockLib|IntelSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBloc= kLib.inf SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconInitLib/PeiSilic= onInitLib.inf + IntelCompatShimLib|$(PLATFORM_SI_PACKAGE)/Library/BaseIntelCompatShimLib= Kbl/BaseIntelCompatShimLibKbl.inf =20 !if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection =3D=3D 1 # --=20 2.36.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#91756): https://edk2.groups.io/g/devel/message/91756 Mute This Topic: https://groups.io/mt/92559635/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-