From nobody Sun May 5 03:02:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+89576+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89576+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1651936402; cv=none; d=zohomail.com; s=zohoarc; b=a/mHowAtuEFRQEemOA5yLF5+K3UbJURh+8KvxcX/sAy4QjzvvkCSMpj/avH9EPn7hlGUPkp3aSoxggZGLcxor2tH9VW73x/yMw9CWa/x6tXXDgMDR+k0DWYozLNAiReztVvfos9mr0ekuDQ5cROfdWXCgPGpcB31G7PGNNlk48U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1651936402; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=e+o3wApf5qfZoFUNZA252ZEYwim3lzGO6zBMi4TJpBo=; b=TcnqpoUH0kJVoTEtthJ3BPEDdYOBYcfYtp13Tv+KUN9xcctplJyrUhFIUDaUO2gUDAPovIPaQ00L+wFV0v0jWScd+CUwas2J+qD/3EHnZ7g3y2sac+ZfW1zW8Q7Ex1GijLnN37YXt2QoZ/B7NOT+e8vWClUdHq/wLwi5jG4kIcY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89576+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1651936402178701.1459841579638; Sat, 7 May 2022 08:13:22 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id ad4pYY1788612xYNNThjot2r; Sat, 07 May 2022 08:13:21 -0700 X-Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mx.groups.io with SMTP id smtpd.web10.10774.1651936399606004842 for ; Sat, 07 May 2022 08:13:20 -0700 X-IronPort-AV: E=McAfee;i="6400,9594,10340"; a="268345239" X-IronPort-AV: E=Sophos;i="5.91,207,1647327600"; d="scan'208";a="268345239" X-Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 May 2022 08:13:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,207,1647327600"; d="scan'208";a="601004352" X-Received: from shwdeopenlab706.ccr.corp.intel.com ([10.239.183.102]) by orsmga001.jf.intel.com with ESMTP; 07 May 2022 08:13:18 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong Subject: [edk2-devel] [PATCH 1/4] MpInitLib: Allocate code buffer for PEI phase Date: Sat, 7 May 2022 23:13:10 +0800 Message-Id: <20220507151313.115-2-ray.ni@intel.com> In-Reply-To: <20220507151313.115-1-ray.ni@intel.com> References: <20220507151313.115-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com X-Gm-Message-State: DWfANuvDiIOU0zCwRkqZRXizx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1651936401; bh=HcIwVaFUTd6lI0aep6j5MdzbzvY9Ag1h+Oga14s5eYo=; h=Cc:Date:From:Reply-To:Subject:To; b=SHX9DVeSm7uQYOfVPxbdbovTmo1jnHpAoynbw8XOhfieQlxNttwqBD3yKD0Fxoq/ifC tQSBv00dP5qnqAUJHuiOfvRJ/uqumj+4ljKJ53OTrRCjIln0RPs+mQahUNGj8VJd6oK9z 2RkjGfkb8heEDnY0CXpFATUD0abyq3hvlcM= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1651937305596100001 Content-Type: text/plain; charset="utf-8" Today's implementation assumes PEI phase runs at 32bit so the execution-disable feature is not applicable. It's not always TRUE. The patch allocates 32bit&64bit code buffer for PEI phase as well. Signed-off-by: Ray Ni Cc: Eric Dong --- UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 2 +- UefiCpuPkg/Library/MpInitLib/MpLib.c | 2 +- UefiCpuPkg/Library/MpInitLib/MpLib.h | 2 +- UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 15 ++++++++++----- 4 files changed, 13 insertions(+), 8 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c b/UefiCpuPkg/Library/M= pInitLib/DxeMpLib.c index 60d14a5a0e..78cc3e2b93 100644 --- a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c @@ -162,7 +162,7 @@ GetWakeupBuffer ( @retval 0 Cannot find free memory below 4GB. **/ UINTN -GetModeTransitionBuffer ( +AllocateCodeBuffer ( IN UINTN BufferSize ) { diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpIn= itLib/MpLib.c index 91c7afaeb2..3dc1b9f872 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -1058,7 +1058,7 @@ AllocateResetVector ( (CpuMpData->WakeupBuffer + CpuMpData->AddressMap.RendezvousFunnel= Size + CpuMpData->AddressMap.SwitchToRealSize= ); - CpuMpData->WakeupBufferHigh =3D GetModeTransitionBuffer ( + CpuMpData->WakeupBufferHigh =3D AllocateCodeBuffer ( CpuMpData->AddressMap.RendezvousFunnel= Size + CpuMpData->AddressMap.SwitchToRealSize= - CpuMpData->AddressMap.ModeTransitionOf= fset diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpIn= itLib/MpLib.h index f8c52426dd..59ab960897 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -442,7 +442,7 @@ GetWakeupBuffer ( @retval 0 Cannot find free memory below 4GB. **/ UINTN -GetModeTransitionBuffer ( +AllocateCodeBuffer ( IN UINTN BufferSize ); =20 diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c b/UefiCpuPkg/Library/M= pInitLib/PeiMpLib.c index efce574727..65400b95a2 100644 --- a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c @@ -299,14 +299,19 @@ GetWakeupBuffer ( @retval 0 Cannot find free memory below 4GB. **/ UINTN -GetModeTransitionBuffer ( +AllocateCodeBuffer ( IN UINTN BufferSize ) { - // - // PEI phase doesn't need to do such transition. So simply return 0. - // - return 0; + EFI_STATUS Status; + EFI_PHYSICAL_ADDRESS Address; + + Status =3D PeiServicesAllocatePages (EfiBootServicesCode, EFI_SIZE_TO_PA= GES (BufferSize), &Address); + if (EFI_ERROR (Status)) { + Address =3D 0; + } + + return (UINTN)Address; } =20 /** --=20 2.32.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#89576): https://edk2.groups.io/g/devel/message/89576 Mute This Topic: https://groups.io/mt/90954625/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 5 03:02:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+89577+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89577+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1651936402; cv=none; d=zohomail.com; s=zohoarc; b=lfgNsl36dtPKCaTnOxu6zV7HFl2ZSezunLydOckhLGO0rl5aIAFIbX12vFGloyUZmR7HhtsSOWa+MxofIcZZg4MJ9UMh8HQdL8wTRgjG2svRMG8AcrDKUGq5lEK3qnMc6Ph8QT7t8dGhr3UAR+8rUl79Wxdmbf6BiNztikLwahc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1651936402; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=SaCN6I+MmB0ah0Ez+H4B10gW1hC+JYEzvyd5sgLKUP8=; b=FRsPHirhZa/cA5fp/Fub2o1tKDq2/R7EQE5WDN13c6u2tecihw2cFVOjAX4Pjtl9YxU9ij4mA5vlV7Bm4SJN34WBvXvllE0I9B0ehG/wAatik0vcYwTxLTX+9j1WV4y7NZkDec9bPXdj1AqpzJ8a1YDLYXzAucqWn0bGLQsPq4U= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89577+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1651936402552895.0664188914071; Sat, 7 May 2022 08:13:22 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id eFayYY1788612xg8jCaCFla8; Sat, 07 May 2022 08:13:21 -0700 X-Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mx.groups.io with SMTP id smtpd.web10.10776.1651936400565355060 for ; Sat, 07 May 2022 08:13:20 -0700 X-IronPort-AV: E=McAfee;i="6400,9594,10340"; a="268345241" X-IronPort-AV: E=Sophos;i="5.91,207,1647327600"; d="scan'208";a="268345241" X-Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 May 2022 08:13:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,207,1647327600"; d="scan'208";a="601004353" X-Received: from shwdeopenlab706.ccr.corp.intel.com ([10.239.183.102]) by orsmga001.jf.intel.com with ESMTP; 07 May 2022 08:13:19 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Subject: [edk2-devel] [PATCH 2/4] MpInitLib: remove unneeded global ASM_PFX Date: Sat, 7 May 2022 23:13:11 +0800 Message-Id: <20220507151313.115-3-ray.ni@intel.com> In-Reply-To: <20220507151313.115-1-ray.ni@intel.com> References: <20220507151313.115-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com X-Gm-Message-State: xwUqvodr7Y6SygVC52j01yQox1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1651936401; bh=FP0sVaY9lKOURFWs6hexRPRsiPL4lYtt8x1xbVoSx0M=; h=Date:From:Reply-To:Subject:To; b=nRMAM8Pq2LXa7Ctk9oV/E0aARn/HyI6VZ28YElTTAY5z0DzoJ9qEdXMAXjag7Ec3FFz hdp4FpOKX6IVnEQCC1KWzYRGi+1KdyHj0rJ891QUiuEYyz4+O5JSv2/MfcXYbVHIShJze RkrF0wLx/d2ZMSDs50f1P5ObnY5oT7CjV1k= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1651936403787100010 Content-Type: text/plain; charset="utf-8" global in NASM file is used for symbols that are referenced in C files. Remove unneeded global keyword in NASM file. Signed-off-by: Ray Ni --- UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm | 8 +------- UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 10 ++-------- 2 files changed, 3 insertions(+), 15 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Li= brary/MpInitLib/Ia32/MpFuncs.nasm index 7bd2415670..8981c32722 100644 --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm @@ -1,5 +1,5 @@ ;-------------------------------------------------------------------------= ----- ; -; Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.
+; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent ; ; Module Name: @@ -24,8 +24,6 @@ SECTION .text ;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PR= OC ;IS IN MACHINE CODE. ;-------------------------------------------------------------------------= ------------ -global ASM_PFX(RendezvousFunnelProc) -ASM_PFX(RendezvousFunnelProc): RendezvousFunnelProcStart: ; At this point CS =3D 0x(vv00) and ip=3D 0x0. BITS 16 @@ -207,8 +205,6 @@ RendezvousFunnelProcEnd: ;SwitchToRealProc procedure follows. ;NOT USED IN 32 BIT MODE. ;-------------------------------------------------------------------------= ------------ -global ASM_PFX(SwitchToRealProc) -ASM_PFX(SwitchToRealProc): SwitchToRealProcStart: jmp $ ; Never reach here SwitchToRealProcEnd: @@ -219,8 +215,6 @@ SwitchToRealProcEnd: ; The last three parameters (Pm16CodeSegment, SevEsAPJumpTable and Wakeup= Buffer) are ; specific to SEV-ES support and are not applicable on IA32. ;-------------------------------------------------------------------------= ------------ -global ASM_PFX(AsmRelocateApLoop) -ASM_PFX(AsmRelocateApLoop): AsmRelocateApLoopStart: mov eax, esp mov esp, [eax + 16] ; TopOfApStack diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Lib= rary/MpInitLib/X64/MpFuncs.nasm index f1422fd30a..d7e0e1fabd 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm @@ -35,8 +35,6 @@ SECTION .text ;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PR= OC ;IS IN MACHINE CODE. ;-------------------------------------------------------------------------= ------------ -global ASM_PFX(RendezvousFunnelProc) -ASM_PFX(RendezvousFunnelProc): RendezvousFunnelProcStart: ; At this point CS =3D 0x(vv00) and ip=3D 0x0. ; Save BIST information to ebp firstly @@ -279,8 +277,6 @@ RendezvousFunnelProcEnd: ; r8 - Code32 Selector Offset ; r9 - Stack Start ;-------------------------------------------------------------------------= ------------ -global ASM_PFX(SwitchToRealProc) -ASM_PFX(SwitchToRealProc): SwitchToRealProcStart: BITS 64 cli @@ -421,8 +417,6 @@ SwitchToRealProcEnd: ;-------------------------------------------------------------------------= ------------ ; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfAp= Stack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer); ;-------------------------------------------------------------------------= ------------ -global ASM_PFX(AsmRelocateApLoop) -ASM_PFX(AsmRelocateApLoop): AsmRelocateApLoopStart: BITS 64 cmp qword [rsp + 56], 0 ; SevEsAPJumpTable @@ -594,11 +588,11 @@ AsmRelocateApLoopEnd: ;-------------------------------------------------------------------------= ------------ global ASM_PFX(AsmGetAddressMap) ASM_PFX(AsmGetAddressMap): - lea rax, [ASM_PFX(RendezvousFunnelProc)] + lea rax, [RendezvousFunnelProcStart] mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RendezvousFunnelAddres= s], rax mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.ModeEntryOffset], Long= ModeStart - RendezvousFunnelProcStart mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RendezvousFunnelSize],= RendezvousFunnelProcEnd - RendezvousFunnelProcStart - lea rax, [ASM_PFX(AsmRelocateApLoop)] + lea rax, [AsmRelocateApLoopStart] mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddr= ess], rax mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize= ], AsmRelocateApLoopEnd - AsmRelocateApLoopStart mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.ModeTransitionOffset],= Flat32Start - RendezvousFunnelProcStart --=20 2.32.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#89577): https://edk2.groups.io/g/devel/message/89577 Mute This Topic: https://groups.io/mt/90954626/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 5 03:02:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+89578+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89578+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1651936405; cv=none; d=zohomail.com; s=zohoarc; b=eUt9eSb/CW4tldfNJFG3htWqFrft2JcPXFG5YcsJ9tVBDDKZHJ/ax5G028Wf/miOwQO8+c7E9PMx5btCz1+zqlJNDPD4UKku5C+ZAdscVHEB8ibQnau00EaLebVWE1g2K4USMQaR5lrGBJowZ/Bfrdvwfyvm6zz2FDsBOkLlMIg= ARC-Message-Signature: i=1; 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Sat, 07 May 2022 08:13:24 -0700 X-IronPort-AV: E=McAfee;i="6400,9594,10340"; a="268345274" X-IronPort-AV: E=Sophos;i="5.91,207,1647327600"; d="scan'208";a="268345274" X-Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 May 2022 08:13:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,207,1647327600"; d="scan'208";a="601004371" X-Received: from shwdeopenlab706.ccr.corp.intel.com ([10.239.183.102]) by orsmga001.jf.intel.com with ESMTP; 07 May 2022 08:13:20 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong , Rahul Kumar , Michael Roth , James Bottomley , Min Xu , Jiewen Yao , Tom Lendacky , Jordan Justen , Ard Biesheuvel , Erdem Aktas , Gerd Hoffmann Subject: [edk2-devel] [PATCH 3/4] MpInitLib: Put SEV logic in separate file Date: Sat, 7 May 2022 23:13:12 +0800 Message-Id: <20220507151313.115-4-ray.ni@intel.com> In-Reply-To: <20220507151313.115-1-ray.ni@intel.com> References: <20220507151313.115-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com X-Gm-Message-State: 90riwTsdUxdk2dfMLSkpdBb3x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1651936404; bh=MYhadQi4ohN7sQs3IqNthnJY1hlITFWc7jQqLm7PcoM=; h=Cc:Date:From:Reply-To:Subject:To; b=QLe/Q3FluC2o+A1RZ6Rq1GEDW45nzCKSnBl5onwVSEzgXlyIs9WrI2DWxf/gwg5EcnJ +fKZ5hwFyI6Eems6DLhksc9rChzRK/Qi84Ox7RH4pQK+yLa8GjOI2IAe7TJsNnH/lbr3M XUtEkZCJpn9aMUsuz7fWhgMpxebS1nRuNG8= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1651936405805100015 Content-Type: text/plain; charset="utf-8" Signed-off-by: Ray Ni Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Michael Roth Cc: James Bottomley Cc: Min Xu Cc: Jiewen Yao Cc: Tom Lendacky Cc: Jordan Justen Cc: Ard Biesheuvel Cc: Erdem Aktas Cc: Gerd Hoffmann --- .../Library/MpInitLib/Ia32/MpFuncs.nasm | 3 +- UefiCpuPkg/Library/MpInitLib/MpLib.c | 13 +- UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm | 148 +++++++++++++++++ UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 157 +----------------- 4 files changed, 159 insertions(+), 162 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Li= brary/MpInitLib/Ia32/MpFuncs.nasm index 8981c32722..67f9ed05cf 100644 --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm @@ -199,7 +199,6 @@ CProcedureInvoke: call eax ; Invoke C function =20 jmp $ ; Never reach here -RendezvousFunnelProcEnd: =20 ;-------------------------------------------------------------------------= ------------ ;SwitchToRealProc procedure follows. @@ -209,6 +208,8 @@ SwitchToRealProcStart: jmp $ ; Never reach here SwitchToRealProcEnd: =20 +RendezvousFunnelProcEnd: + ;-------------------------------------------------------------------------= ------------ ; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfAp= Stack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer); ; diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpIn= itLib/MpLib.c index 3dc1b9f872..722ff3fd42 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -938,8 +938,7 @@ FillExchangeInfoData ( // EfiBootServicesCode to avoid page fault if NX memory protection is en= abled. // if (CpuMpData->WakeupBufferHigh !=3D 0) { - Size =3D CpuMpData->AddressMap.RendezvousFunnelSize + - CpuMpData->AddressMap.SwitchToRealSize - + Size =3D CpuMpData->AddressMap.RendezvousFunnelSize - CpuMpData->AddressMap.ModeTransitionOffset; CopyMem ( (VOID *)CpuMpData->WakeupBufferHigh, @@ -993,8 +992,7 @@ BackupAndPrepareWakeupBuffer ( CopyMem ( (VOID *)CpuMpData->WakeupBuffer, (VOID *)CpuMpData->AddressMap.RendezvousFunnelAddress, - CpuMpData->AddressMap.RendezvousFunnelSize + - CpuMpData->AddressMap.SwitchToRealSize + CpuMpData->AddressMap.RendezvousFunnelSize ); } =20 @@ -1031,7 +1029,6 @@ GetApResetVectorSize ( UINTN Size; =20 Size =3D AddressMap->RendezvousFunnelSize + - AddressMap->SwitchToRealSize + sizeof (MP_CPU_EXCHANGE_INFO); =20 return Size; @@ -1056,11 +1053,9 @@ AllocateResetVector ( CpuMpData->WakeupBuffer =3D GetWakeupBuffer (ApResetVectorSize); CpuMpData->MpCpuExchangeInfo =3D (MP_CPU_EXCHANGE_INFO *)(UINTN) (CpuMpData->WakeupBuffer + - CpuMpData->AddressMap.RendezvousFunnel= Size + - CpuMpData->AddressMap.SwitchToRealSize= ); + CpuMpData->AddressMap.RendezvousFunnel= Size); CpuMpData->WakeupBufferHigh =3D AllocateCodeBuffer ( - CpuMpData->AddressMap.RendezvousFunnel= Size + - CpuMpData->AddressMap.SwitchToRealSize= - + CpuMpData->AddressMap.RendezvousFunnel= Size - CpuMpData->AddressMap.ModeTransitionOf= fset ); // diff --git a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm b/UefiCpuPkg/Libr= ary/MpInitLib/X64/AmdSev.nasm index 8bb1161fa0..7c2469f9c5 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm +++ b/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm @@ -198,3 +198,151 @@ RestoreGhcb: =20 SevEsGetApicIdExit: OneTimeCallRet SevEsGetApicId + + +;-------------------------------------------------------------------------= ------------ +;SwitchToRealProc procedure follows. +;ALSO THIS PROCEDURE IS EXECUTED BY APs TRANSITIONING TO 16 BIT MODE. HENC= E THIS PROC +;IS IN MACHINE CODE. +; SwitchToRealProc (UINTN BufferStart, UINT16 Code16, UINT16 Code32, UINT= N StackStart) +; rcx - Buffer Start +; rdx - Code16 Selector Offset +; r8 - Code32 Selector Offset +; r9 - Stack Start +;-------------------------------------------------------------------------= ------------ +SwitchToRealProcStart: +BITS 64 + cli + + ; + ; Get RDX reset value before changing stacks since the + ; new stack won't be able to accomodate a #VC exception. + ; + push rax + push rbx + push rcx + push rdx + + mov rax, 1 + cpuid + mov rsi, rax ; Save off the reset value for = RDX + + pop rdx + pop rcx + pop rbx + pop rax + + ; + ; Establish stack below 1MB + ; + mov rsp, r9 + + ; + ; Push ultimate Reset Vector onto the stack + ; + mov rax, rcx + shr rax, 4 + push word 0x0002 ; RFLAGS + push ax ; CS + push word 0x0000 ; RIP + push word 0x0000 ; For alignment, will be discar= ded + + ; + ; Get address of "16-bit operand size" label + ; + lea rbx, [PM16Mode] + + ; + ; Push addresses used to change to compatibility mode + ; + lea rax, [CompatMode] + push r8 + push rax + + ; + ; Clear R8 - R15, for reset, before going into 32-bit mode + ; + xor r8, r8 + xor r9, r9 + xor r10, r10 + xor r11, r11 + xor r12, r12 + xor r13, r13 + xor r14, r14 + xor r15, r15 + + ; + ; Far return into 32-bit mode + ; + retfq + +BITS 32 +CompatMode: + ; + ; Set up stack to prepare for exiting protected mode + ; + push edx ; Code16 CS + push ebx ; PM16Mode label address + + ; + ; Disable paging + ; + mov eax, cr0 ; Read CR0 + btr eax, 31 ; Set PG=3D0 + mov cr0, eax ; Write CR0 + + ; + ; Disable long mode + ; + mov ecx, 0c0000080h ; EFER MSR number + rdmsr ; Read EFER + btr eax, 8 ; Set LME=3D0 + wrmsr ; Write EFER + + ; + ; Disable PAE + ; + mov eax, cr4 ; Read CR4 + btr eax, 5 ; Set PAE=3D0 + mov cr4, eax ; Write CR4 + + mov edx, esi ; Restore RDX reset value + + ; + ; Switch to 16-bit operand size + ; + retf + +BITS 16 + ; + ; At entry to this label + ; - RDX will have its reset value + ; - On the top of the stack + ; - Alignment data (two bytes) to be discarded + ; - IP for Real Mode (two bytes) + ; - CS for Real Mode (two bytes) + ; + ; This label is also used with AsmRelocateApLoop. During MP finalizati= on, + ; the code from PM16Mode to SwitchToRealProcEnd is copied to the start= of + ; the WakeupBuffer, allowing a parked AP to be booted by an OS. + ; +PM16Mode: + mov eax, cr0 ; Read CR0 + btr eax, 0 ; Set PE=3D0 + mov cr0, eax ; Write CR0 + + pop ax ; Discard alignment data + + ; + ; Clear registers (except RDX and RSP) before going into 16-bit mode + ; + xor eax, eax + xor ebx, ebx + xor ecx, ecx + xor esi, esi + xor edi, edi + xor ebp, ebp + + iret + +SwitchToRealProcEnd: diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Lib= rary/MpInitLib/X64/MpFuncs.nasm index d7e0e1fabd..53df478661 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm @@ -152,11 +152,6 @@ SkipEnable5LevelPaging: =20 BITS 64 =20 -; -; Required for the AMD SEV helper functions -; -%include "AmdSev.nasm" - LongModeStart: mov esi, ebx lea edi, [esi + MP_CPU_EXCHANGE_INFO_FIELD (InitFlag)] @@ -265,154 +260,12 @@ CProcedureInvoke: add rsp, 20h jmp $ ; Should never reach here =20 -RendezvousFunnelProcEnd: - -;-------------------------------------------------------------------------= ------------ -;SwitchToRealProc procedure follows. -;ALSO THIS PROCEDURE IS EXECUTED BY APs TRANSITIONING TO 16 BIT MODE. HENC= E THIS PROC -;IS IN MACHINE CODE. -; SwitchToRealProc (UINTN BufferStart, UINT16 Code16, UINT16 Code32, UINT= N StackStart) -; rcx - Buffer Start -; rdx - Code16 Selector Offset -; r8 - Code32 Selector Offset -; r9 - Stack Start -;-------------------------------------------------------------------------= ------------ -SwitchToRealProcStart: -BITS 64 - cli - - ; - ; Get RDX reset value before changing stacks since the - ; new stack won't be able to accomodate a #VC exception. - ; - push rax - push rbx - push rcx - push rdx - - mov rax, 1 - cpuid - mov rsi, rax ; Save off the reset value for = RDX - - pop rdx - pop rcx - pop rbx - pop rax - - ; - ; Establish stack below 1MB - ; - mov rsp, r9 - - ; - ; Push ultimate Reset Vector onto the stack - ; - mov rax, rcx - shr rax, 4 - push word 0x0002 ; RFLAGS - push ax ; CS - push word 0x0000 ; RIP - push word 0x0000 ; For alignment, will be discar= ded - - ; - ; Get address of "16-bit operand size" label - ; - lea rbx, [PM16Mode] - - ; - ; Push addresses used to change to compatibility mode - ; - lea rax, [CompatMode] - push r8 - push rax - - ; - ; Clear R8 - R15, for reset, before going into 32-bit mode - ; - xor r8, r8 - xor r9, r9 - xor r10, r10 - xor r11, r11 - xor r12, r12 - xor r13, r13 - xor r14, r14 - xor r15, r15 - - ; - ; Far return into 32-bit mode - ; - retfq - -BITS 32 -CompatMode: - ; - ; Set up stack to prepare for exiting protected mode - ; - push edx ; Code16 CS - push ebx ; PM16Mode label address - - ; - ; Disable paging - ; - mov eax, cr0 ; Read CR0 - btr eax, 31 ; Set PG=3D0 - mov cr0, eax ; Write CR0 - - ; - ; Disable long mode - ; - mov ecx, 0c0000080h ; EFER MSR number - rdmsr ; Read EFER - btr eax, 8 ; Set LME=3D0 - wrmsr ; Write EFER - - ; - ; Disable PAE - ; - mov eax, cr4 ; Read CR4 - btr eax, 5 ; Set PAE=3D0 - mov cr4, eax ; Write CR4 - - mov edx, esi ; Restore RDX reset value - - ; - ; Switch to 16-bit operand size - ; - retf - -BITS 16 - ; - ; At entry to this label - ; - RDX will have its reset value - ; - On the top of the stack - ; - Alignment data (two bytes) to be discarded - ; - IP for Real Mode (two bytes) - ; - CS for Real Mode (two bytes) - ; - ; This label is also used with AsmRelocateApLoop. During MP finalizati= on, - ; the code from PM16Mode to SwitchToRealProcEnd is copied to the start= of - ; the WakeupBuffer, allowing a parked AP to be booted by an OS. - ; -PM16Mode: - mov eax, cr0 ; Read CR0 - btr eax, 0 ; Set PE=3D0 - mov cr0, eax ; Write CR0 - - pop ax ; Discard alignment data - - ; - ; Clear registers (except RDX and RSP) before going into 16-bit mode - ; - xor eax, eax - xor ebx, ebx - xor ecx, ecx - xor esi, esi - xor edi, edi - xor ebp, ebp - - iret +; +; Required for the AMD SEV helper functions +; +%include "AmdSev.nasm" =20 -SwitchToRealProcEnd: +RendezvousFunnelProcEnd: =20 ;-------------------------------------------------------------------------= ------------ ; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfAp= Stack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer); --=20 2.32.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#89578): https://edk2.groups.io/g/devel/message/89578 Mute This Topic: https://groups.io/mt/90954628/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 5 03:02:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+89579+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89579+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1651936406; cv=none; d=zohomail.com; s=zohoarc; b=N7acEiQoNzlDmY750O5rQGPJVWJ3u+rJ/Ro8ExFhXKgDNdPGeVoNfSafAFS19eKxl/JSCXvbu7vkgUaYKPSITm0Fei0jEq3Bm1aXh83QeakmRx9u7peImVgBHtc0gQUcjD+94xkstW4w518l5lZQWS+gqQe+p+dAxCAZRyOAFoQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1651936406; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=/yHNEDA/oXVG0AzcjMx2wCjOWpdkxYxrr8nlXRgEMMw=; b=FBvBw8OANh0TG13lxrm0FAM6+SxhMjud2ZPvy70ylO1cRPMCpcev9hGJyN2zzA0nYAuCSGgBSEkY98NTFrbd1WtFhvVUSEIyJGnVgmXWXucLB4uYHU6guXtpFZbC/+V33D27zUqVATq2o2t6GM0rCOXcNdmRdjfZ21PvBk1F3Vc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89579+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1651936406389772.4895262372756; Sat, 7 May 2022 08:13:26 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 6At1YY1788612xoexSULHvxG; Sat, 07 May 2022 08:13:26 -0700 X-Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mx.groups.io with SMTP id smtpd.web10.10776.1651936400565355060 for ; Sat, 07 May 2022 08:13:25 -0700 X-IronPort-AV: E=McAfee;i="6400,9594,10340"; a="268345284" X-IronPort-AV: E=Sophos;i="5.91,207,1647327600"; d="scan'208";a="268345284" X-Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 May 2022 08:13:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,207,1647327600"; d="scan'208";a="601004388" X-Received: from shwdeopenlab706.ccr.corp.intel.com ([10.239.183.102]) by orsmga001.jf.intel.com with ESMTP; 07 May 2022 08:13:23 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong Subject: [edk2-devel] [PATCH 4/4] MpInitLib: Only allocate below 1MB memory for 16bit code Date: Sat, 7 May 2022 23:13:13 +0800 Message-Id: <20220507151313.115-5-ray.ni@intel.com> In-Reply-To: <20220507151313.115-1-ray.ni@intel.com> References: <20220507151313.115-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com X-Gm-Message-State: q6214yp4V1UpKBW6qFpdMts8x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1651936406; bh=35m5gVsMzLW87n/SVafypJc4sTw3gXx2pyWu8OiQ7co=; h=Cc:Date:From:Reply-To:Subject:To; b=mnEEPeCVVkQT1vlcNISBSfJ/ECSBRsGQ2rmHeMt5R4RPMkrl/a8pt04fi+fZ60jjccW oiofR/25KRe3YxCXfl/PjyUboE0UnrQjyjqjsf20XN+D+g2MOWNi0TOp0Fvltu0gGH8bR Y01wFAsadKmS7xiFJN/NCZ4Em8PkEfJsykM= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1651936407822100019 Content-Type: text/plain; charset="utf-8" Today's implementation allocates below 1MB memory for the 16bit, 32bit and 64bit code. But it's not necessary since now the 32bit and 64bit code run at high memory no matter in PEI and DXE phase. The patch simplifies the logic to remove the code that handles the case when WakeupBufferHigh is 0. It also reduce the memory foot print under 1MB by allocating memory for 16bit code only. MP_CPU_EXCHANGE_INFO is still under 1MB which is immediate after the 16bit code. Signed-off-by: Ray Ni Cc: Eric Dong --- UefiCpuPkg/Library/MpInitLib/AmdSev.c | 6 +- UefiCpuPkg/Library/MpInitLib/MpEqu.inc | 2 +- UefiCpuPkg/Library/MpInitLib/MpLib.c | 94 ++++++++++++-------------- 3 files changed, 46 insertions(+), 56 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/AmdSev.c b/UefiCpuPkg/Library/MpI= nitLib/AmdSev.c index b4a344ee6b..4e4c63a52d 100644 --- a/UefiCpuPkg/Library/MpInitLib/AmdSev.c +++ b/UefiCpuPkg/Library/MpInitLib/AmdSev.c @@ -110,11 +110,7 @@ MpInitLibSevEsAPReset ( Code16 =3D GetProtectedMode16CS (); Code32 =3D GetProtectedMode32CS (); =20 - if (CpuMpData->WakeupBufferHigh !=3D 0) { - APResetFn =3D (AP_RESET *)(CpuMpData->WakeupBufferHigh + CpuMpData->Ad= dressMap.SwitchToRealNoNxOffset); - } else { - APResetFn =3D (AP_RESET *)(CpuMpData->MpCpuExchangeInfo->BufferStart += CpuMpData->AddressMap.SwitchToRealOffset); - } + APResetFn =3D (AP_RESET *)(CpuMpData->WakeupBufferHigh + CpuMpData->Addr= essMap.SwitchToRealNoNxOffset); =20 BufferStart =3D CpuMpData->MpCpuExchangeInfo->BufferStart; StackStart =3D CpuMpData->SevEsAPResetStackStart - diff --git a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc b/UefiCpuPkg/Library/Mp= InitLib/MpEqu.inc index aba53f5720..831fcc2cc7 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc +++ b/UefiCpuPkg/Library/MpInitLib/MpEqu.inc @@ -97,5 +97,5 @@ struc MP_CPU_EXCHANGE_INFO .ExtTopoAvail: CTYPE_BOOLEAN 1 endstruc =20 -MP_CPU_EXCHANGE_INFO_OFFSET equ (SwitchToRealProcEnd - RendezvousFunnelPro= cStart) +MP_CPU_EXCHANGE_INFO_OFFSET equ (Flat32Start - RendezvousFunnelProcStart) %define MP_CPU_EXCHANGE_INFO_FIELD(Field) (MP_CPU_EXCHANGE_INFO_OFFSET + M= P_CPU_EXCHANGE_INFO. %+ Field) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpIn= itLib/MpLib.c index 722ff3fd42..df297b5bf5 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -850,6 +850,30 @@ WaitApWakeup ( } } =20 +/** + Calculate the size of the reset vector. + + @param[in] AddressMap The pointer to Address Map structure. + + @return Total amount of memory required for the AP reset= area +**/ +STATIC +VOID +GetApResetVectorSize ( + IN MP_ASSEMBLY_ADDRESS_MAP *AddressMap, + OUT UINTN *SizeBelow1Mb OPTIONAL, + OUT UINTN *SizeAbove1Mb OPTIONAL + ) +{ + if (SizeBelow1Mb !=3D NULL) { + *SizeBelow1Mb =3D AddressMap->ModeTransitionOffset + sizeof (MP_CPU_EX= CHANGE_INFO); + } + + if (SizeAbove1Mb !=3D NULL) { + *SizeAbove1Mb =3D AddressMap->RendezvousFunnelSize - AddressMap->ModeT= ransitionOffset; + } +} + /** This function will fill the exchange info structure. =20 @@ -937,21 +961,15 @@ FillExchangeInfoData ( // Copy all 32-bit code and 64-bit code into memory with type of // EfiBootServicesCode to avoid page fault if NX memory protection is en= abled. // - if (CpuMpData->WakeupBufferHigh !=3D 0) { - Size =3D CpuMpData->AddressMap.RendezvousFunnelSize - - CpuMpData->AddressMap.ModeTransitionOffset; - CopyMem ( - (VOID *)CpuMpData->WakeupBufferHigh, - CpuMpData->AddressMap.RendezvousFunnelAddress + - CpuMpData->AddressMap.ModeTransitionOffset, - Size - ); + GetApResetVectorSize (&CpuMpData->AddressMap, NULL, &Size); + CopyMem ( + (VOID *)CpuMpData->WakeupBufferHigh, + CpuMpData->AddressMap.RendezvousFunnelAddress + + CpuMpData->AddressMap.ModeTransitionOffset, + Size + ); =20 - ExchangeInfo->ModeTransitionMemory =3D (UINT32)CpuMpData->WakeupBuffer= High; - } else { - ExchangeInfo->ModeTransitionMemory =3D (UINT32) - (ExchangeInfo->BufferStart + CpuM= pData->AddressMap.ModeTransitionOffset); - } + ExchangeInfo->ModeTransitionMemory =3D (UINT32)CpuMpData->WakeupBufferHi= gh; =20 ExchangeInfo->ModeHighMemory =3D ExchangeInfo->ModeTransitionMemory + (UINT32)ExchangeInfo->ModeOffset - @@ -992,7 +1010,7 @@ BackupAndPrepareWakeupBuffer ( CopyMem ( (VOID *)CpuMpData->WakeupBuffer, (VOID *)CpuMpData->AddressMap.RendezvousFunnelAddress, - CpuMpData->AddressMap.RendezvousFunnelSize + CpuMpData->BackupBufferSize - sizeof (MP_CPU_EXCHANGE_INFO) ); } =20 @@ -1013,27 +1031,6 @@ RestoreWakeupBuffer ( ); } =20 -/** - Calculate the size of the reset vector. - - @param[in] AddressMap The pointer to Address Map structure. - - @return Total amount of memory required for the AP reset= area -**/ -STATIC -UINTN -GetApResetVectorSize ( - IN MP_ASSEMBLY_ADDRESS_MAP *AddressMap - ) -{ - UINTN Size; - - Size =3D AddressMap->RendezvousFunnelSize + - sizeof (MP_CPU_EXCHANGE_INFO); - - return Size; -} - /** Allocate reset vector buffer. =20 @@ -1044,20 +1041,17 @@ AllocateResetVector ( IN OUT CPU_MP_DATA *CpuMpData ) { - UINTN ApResetVectorSize; + UINTN ApResetVectorSizeBelow1Mb; + UINTN ApResetVectorSizeAbove1Mb; UINTN ApResetStackSize; =20 if (CpuMpData->WakeupBuffer =3D=3D (UINTN)-1) { - ApResetVectorSize =3D GetApResetVectorSize (&CpuMpData->AddressMap); + GetApResetVectorSize (&CpuMpData->AddressMap, &ApResetVectorSizeBelow1= Mb, &ApResetVectorSizeAbove1Mb); =20 - CpuMpData->WakeupBuffer =3D GetWakeupBuffer (ApResetVectorSize); + CpuMpData->WakeupBuffer =3D GetWakeupBuffer (ApResetVectorSizeBel= ow1Mb); CpuMpData->MpCpuExchangeInfo =3D (MP_CPU_EXCHANGE_INFO *)(UINTN) - (CpuMpData->WakeupBuffer + - CpuMpData->AddressMap.RendezvousFunnel= Size); - CpuMpData->WakeupBufferHigh =3D AllocateCodeBuffer ( - CpuMpData->AddressMap.RendezvousFunnel= Size - - CpuMpData->AddressMap.ModeTransitionOf= fset - ); + (CpuMpData->WakeupBuffer + ApResetVecto= rSizeBelow1Mb - sizeof (MP_CPU_EXCHANGE_INFO)); + CpuMpData->WakeupBufferHigh =3D AllocateCodeBuffer (ApResetVectorSizeA= bove1Mb); // // The AP reset stack is only used by SEV-ES guests. Do not allocate it // if SEV-ES is not enabled. An SEV-SNP guest is also considered @@ -1796,7 +1790,7 @@ MpInitLibInitialize ( UINT8 ApLoopMode; UINT8 *MonitorBuffer; UINTN Index; - UINTN ApResetVectorSize; + UINTN ApResetVectorSizeBelow1Mb; UINTN BackupBufferAddr; UINTN ApIdtBase; =20 @@ -1814,7 +1808,7 @@ MpInitLibInitialize ( ASSERT (MaxLogicalProcessorNumber !=3D 0); =20 AsmGetAddressMap (&AddressMap); - ApResetVectorSize =3D GetApResetVectorSize (&AddressMap); + GetApResetVectorSize (&AddressMap, &ApResetVectorSizeBelow1Mb, NULL); ApStackSize =3D PcdGet32 (PcdCpuApStackSize); ApLoopMode =3D GetApLoopMode (&MonitorFilterSize); =20 @@ -1825,7 +1819,7 @@ MpInitLibInitialize ( =20 BufferSize =3D ApStackSize * MaxLogicalProcessorNumber; BufferSize +=3D MonitorFilterSize * MaxLogicalProcessorNumber; - BufferSize +=3D ApResetVectorSize; + BufferSize +=3D ApResetVectorSizeBelow1Mb; BufferSize =3D ALIGN_VALUE (BufferSize, 8); BufferSize +=3D VolatileRegisters.Idtr.Limit + 1; BufferSize +=3D sizeof (CPU_MP_DATA); @@ -1858,12 +1852,12 @@ MpInitLibInitialize ( // MonitorBuffer =3D (UINT8 *)(Buffer + ApStackSize * MaxLogi= calProcessorNumber); BackupBufferAddr =3D (UINTN)MonitorBuffer + MonitorFilterSize= * MaxLogicalProcessorNumber; - ApIdtBase =3D ALIGN_VALUE (BackupBufferAddr + ApResetV= ectorSize, 8); + ApIdtBase =3D ALIGN_VALUE (BackupBufferAddr + ApResetV= ectorSizeBelow1Mb, 8); CpuMpData =3D (CPU_MP_DATA *)(ApIdtBase + VolatileRegi= sters.Idtr.Limit + 1); CpuMpData->Buffer =3D Buffer; CpuMpData->CpuApStackSize =3D ApStackSize; CpuMpData->BackupBuffer =3D BackupBufferAddr; - CpuMpData->BackupBufferSize =3D ApResetVectorSize; + CpuMpData->BackupBufferSize =3D ApResetVectorSizeBelow1Mb; CpuMpData->WakeupBuffer =3D (UINTN)-1; CpuMpData->CpuCount =3D 1; CpuMpData->BspNumber =3D 0; --=20 2.32.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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