From nobody Tue Feb 10 10:55:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+89000+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89000+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1650282890; cv=none; d=zohomail.com; s=zohoarc; b=f8Ky3JDDo6KBv4JsLN/q+gEVJX4MiNdikG+UdqWwE3SJX12XEt7MCzq/QAiVi62vJ9soZihkI9f8lMPbwGCbASLuni75Y/XWGUMvZRFb0WsgGi/yh0sah5u4PuvUdSPfP6tqJfKvjeRE+7Uwdp71AZVp8TnSBBPkvqavYqTTOGM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650282890; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=I7FbqcXZxfyjh0gZzCRk9ibotJsIt0HWY+xOy0Gp/7E=; b=ewINc/cC5NNa+SHIIJO6pe4bK4ogum3rxNFgBefn+GVPx8C7LxQW7l00GbwjhEgWmhBHrClgXhWu0l7x/zfzhT4HlQBk3T6ULLWzvcbcZ9fcFsd1Tt6npjFOwwioU7kJCNcZaGV011p8QpZW5g2RIepy/SNwH5SONZk2z+169AU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89000+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 165028289079620.07119979677725; Mon, 18 Apr 2022 04:54:50 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id Nf2FYY1788612xoETGmCELFB; Mon, 18 Apr 2022 04:54:50 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.38018.1650282889334603276 for ; Mon, 18 Apr 2022 04:54:49 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D8029D6E; Mon, 18 Apr 2022 04:54:48 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 3EA413F73B; Mon, 18 Apr 2022 04:54:47 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar Subject: [edk2-devel] [edk2-platforms][PATCH V2 1/9] Platform/Sgi: Update ACPI version to v6.4 Date: Mon, 18 Apr 2022 17:24:23 +0530 Message-Id: <20220418115431.30602-2-pranav.madhu@arm.com> In-Reply-To: <20220418115431.30602-1-pranav.madhu@arm.com> References: <20220418115431.30602-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: 9l1VXeWSawKh9nLT0Q5gX7zmx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1650282890; bh=2f5DrUhIcjiWu7jQ26tNaWyjCD+fdx2sOwXCTA2U1tw=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=OoeCTXNWZsO/xCqrk8+nH0SS0NULaaTaCwbOhXyseLZYvXDrxjJQBtAs5zWV8huqBHo BwSNHBjpJS/0W6RoOusU5OgqTMdp6pmj6iDIQ6ud8N6dILGYAb41t7hoMGU4BVRSYt2iU /BqMOQBK25rxrXYwkGVqlu49PXjhsfZpYa8= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1650282891212100001 Content-Type: text/plain; charset="utf-8" Update the common ACPI tables used by all the Neoverse Reference Design platforms to ACPI version v6.4. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h | 219 ++++++++++---------- Platform/ARM/SgiPkg/AcpiTables/Dbg2.aslc | 30 +-- Platform/ARM/SgiPkg/AcpiTables/Fadt.aslc | 38 ++-- Platform/ARM/SgiPkg/AcpiTables/Gtdt.aslc | 69 +++--- Platform/ARM/SgiPkg/AcpiTables/Mcfg.aslc | 26 +-- Platform/ARM/SgiPkg/AcpiTables/Spcr.aslc | 29 ++- 6 files changed, 219 insertions(+), 192 deletions(-) diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/Sgi= Pkg/Include/SgiAcpiHeader.h index e9b6923cb035..72ece6cd153f 100644 --- a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h +++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2018-2021, ARM Limited. All rights reserved. +* Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -44,131 +44,132 @@ #pragma pack(1) // PPTT processor core structure typedef struct { - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core; + EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR Core; UINT32 ResourceOffset[2]; - EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE DCache; - EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE ICache; - EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L2Cache; + EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE DCache; + EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE ICache; + EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE L2Cache; } RD_PPTT_CORE; =20 // PPTT processor cluster structure typedef struct { - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster; + EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR Cluster; UINT32 ResourceOffset; - EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L3Cache; + EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE L3Cache; RD_PPTT_CORE Core[CORE_COUNT]; } RD_PPTT_CLUSTER; =20 // PPTT processor cluster structure without cache typedef struct { - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster; + EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR Cluster; RD_PPTT_CORE Core[CORE_COUNT]; } RD_PPTT_MINIMAL_CLUSTER; =20 // PPTT processor package structure typedef struct { - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Package; + EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR Package; RD_PPTT_MINIMAL_CLUSTER Cluster[CLUSTER_COUNT]; } RD_PPTT_PACKAGE; #pragma pack () =20 // // PPTT processor structure flags for different SoC components as defined = in -// ACPI 6.3 specification +// ACPI 6.4 specification // =20 // Processor structure flags for SoC package #define PPTT_PROCESSOR_PACKAGE_FLAGS = \ { = \ - EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL, = \ - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, = \ - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ - EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, = \ - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL = \ + EFI_ACPI_6_4_PPTT_PACKAGE_PHYSICAL, = \ + EFI_ACPI_6_4_PPTT_PROCESSOR_ID_INVALID, = \ + EFI_ACPI_6_4_PPTT_PROCESSOR_IS_NOT_THREAD, = \ + EFI_ACPI_6_4_PPTT_NODE_IS_NOT_LEAF, = \ + EFI_ACPI_6_4_PPTT_IMPLEMENTATION_IDENTICAL = \ } =20 // Processor structure flags for cluster #define PPTT_PROCESSOR_CLUSTER_FLAGS = \ { = \ - EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, = \ - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ - EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, = \ - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL = \ + EFI_ACPI_6_4_PPTT_PACKAGE_NOT_PHYSICAL, = \ + EFI_ACPI_6_4_PPTT_PROCESSOR_ID_VALID, = \ + EFI_ACPI_6_4_PPTT_PROCESSOR_IS_NOT_THREAD, = \ + EFI_ACPI_6_4_PPTT_NODE_IS_NOT_LEAF, = \ + EFI_ACPI_6_4_PPTT_IMPLEMENTATION_IDENTICAL = \ } =20 // Processor structure flags for cluster with multi-thread core #define PPTT_PROCESSOR_CLUSTER_THREADED_FLAGS = \ { = \ - EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, = \ - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ - EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, = \ - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL = \ + EFI_ACPI_6_4_PPTT_PACKAGE_NOT_PHYSICAL, = \ + EFI_ACPI_6_4_PPTT_PROCESSOR_ID_INVALID, = \ + EFI_ACPI_6_4_PPTT_PROCESSOR_IS_NOT_THREAD, = \ + EFI_ACPI_6_4_PPTT_NODE_IS_NOT_LEAF, = \ + EFI_ACPI_6_4_PPTT_IMPLEMENTATION_IDENTICAL = \ } =20 // Processor structure flags for single-thread core #define PPTT_PROCESSOR_CORE_FLAGS = \ { = \ - EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, = \ - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ - EFI_ACPI_6_3_PPTT_NODE_IS_LEAF = \ + EFI_ACPI_6_4_PPTT_PACKAGE_NOT_PHYSICAL, = \ + EFI_ACPI_6_4_PPTT_PROCESSOR_ID_VALID, = \ + EFI_ACPI_6_4_PPTT_PROCESSOR_IS_NOT_THREAD, = \ + EFI_ACPI_6_4_PPTT_NODE_IS_LEAF = \ } =20 // Processor structure flags for multi-thread core #define PPTT_PROCESSOR_CORE_THREADED_FLAGS = \ { = \ - EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, = \ - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ - EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, = \ - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL = \ + EFI_ACPI_6_4_PPTT_PACKAGE_NOT_PHYSICAL, = \ + EFI_ACPI_6_4_PPTT_PROCESSOR_ID_INVALID, = \ + EFI_ACPI_6_4_PPTT_PROCESSOR_IS_NOT_THREAD, = \ + EFI_ACPI_6_4_PPTT_NODE_IS_NOT_LEAF, = \ + EFI_ACPI_6_4_PPTT_IMPLEMENTATION_IDENTICAL = \ } =20 // Processor structure flags for CPU thread #define PPTT_PROCESSOR_THREAD_FLAGS = \ { = \ - EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, = \ - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_THREAD, = \ - EFI_ACPI_6_3_PPTT_NODE_IS_LEAF = \ + EFI_ACPI_6_4_PPTT_PACKAGE_NOT_PHYSICAL, = \ + EFI_ACPI_6_4_PPTT_PROCESSOR_ID_VALID, = \ + EFI_ACPI_6_4_PPTT_PROCESSOR_IS_THREAD, = \ + EFI_ACPI_6_4_PPTT_NODE_IS_LEAF = \ } =20 -// PPTT cache structure flags as defined in ACPI 6.3 Specification +// PPTT cache structure flags as defined in ACPI 6.4 Specification #define PPTT_CACHE_STRUCTURE_FLAGS = \ { = \ - EFI_ACPI_6_3_PPTT_CACHE_SIZE_VALID, = \ - EFI_ACPI_6_3_PPTT_NUMBER_OF_SETS_VALID, = \ - EFI_ACPI_6_3_PPTT_ASSOCIATIVITY_VALID, = \ - EFI_ACPI_6_3_PPTT_ALLOCATION_TYPE_VALID, = \ - EFI_ACPI_6_3_PPTT_CACHE_TYPE_VALID, = \ - EFI_ACPI_6_3_PPTT_WRITE_POLICY_VALID, = \ - EFI_ACPI_6_3_PPTT_LINE_SIZE_VALID = \ + EFI_ACPI_6_4_PPTT_CACHE_SIZE_VALID, = \ + EFI_ACPI_6_4_PPTT_NUMBER_OF_SETS_VALID, = \ + EFI_ACPI_6_4_PPTT_ASSOCIATIVITY_VALID, = \ + EFI_ACPI_6_4_PPTT_ALLOCATION_TYPE_VALID, = \ + EFI_ACPI_6_4_PPTT_CACHE_TYPE_VALID, = \ + EFI_ACPI_6_4_PPTT_WRITE_POLICY_VALID, = \ + EFI_ACPI_6_4_PPTT_LINE_SIZE_VALID, = \ + EFI_ACPI_6_4_PPTT_CACHE_ID_VALID = \ } =20 // PPTT cache attributes for data cache #define PPTT_DATA_CACHE_ATTR = \ { = \ - EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ - EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_DATA, = \ - EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ + EFI_ACPI_6_4_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ + EFI_ACPI_6_4_CACHE_ATTRIBUTES_CACHE_TYPE_DATA, = \ + EFI_ACPI_6_4_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ } =20 // PPTT cache attributes for instruction cache #define PPTT_INST_CACHE_ATTR = \ { = \ - EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ, = \ - EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION, = \ - EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ + EFI_ACPI_6_4_CACHE_ATTRIBUTES_ALLOCATION_READ, = \ + EFI_ACPI_6_4_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION, = \ + EFI_ACPI_6_4_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ } =20 // PPTT cache attributes for unified cache #define PPTT_UNIFIED_CACHE_ATTR = \ { = \ - EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ - EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED, = \ - EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ + EFI_ACPI_6_4_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ + EFI_ACPI_6_4_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED, = \ + EFI_ACPI_6_4_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ } =20 // A macro to initialise the common header part of EFI ACPI tables as defi= ned by @@ -185,12 +186,13 @@ typedef struct { EFI_ACPI_ARM_CREATOR_REVISION /* UINT32 CreatorRevision */ \ } =20 -// EFI_ACPI_6_2_GIC_STRUCTURE -#define EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, = \ - PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency) = \ +// EFI_ACPI_6_4_GIC_STRUCTURE +#define EFI_ACPI_6_4_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, = \ + PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency, = \ + SpeOverflowInterrupt) = \ { = \ - EFI_ACPI_6_2_GIC, /* Type */ = \ - sizeof (EFI_ACPI_6_2_GIC_STRUCTURE), /* Length */ = \ + EFI_ACPI_6_4_GIC, /* Type */ = \ + sizeof (EFI_ACPI_6_4_GIC_STRUCTURE), /* Length */ = \ EFI_ACPI_RESERVED_WORD, /* Reserved */ = \ GicId, /* CPUInterfaceNumber */ = \ AcpiCpuUid, /* AcpiProcessorUid */ = \ @@ -205,19 +207,16 @@ typedef struct { GicRBase, /* GICRBaseAddress */ = \ Mpidr, /* MPIDR */ = \ Efficiency, /* ProcessorPowerEfficiencyClass= */ \ - { = \ - EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ = \ - EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ = \ - EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ = \ - } = \ + EFI_ACPI_RESERVED_BYTE, /* Reserved2 */ = \ + SpeOverflowInterrupt /* SpeOverflowInterrupt */ = \ } =20 -// EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE -#define EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, = \ +// EFI_ACPI_6_4_GIC_DISTRIBUTOR_STRUCTURE +#define EFI_ACPI_6_4_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, = \ GicDistVector, GicVersion) = \ { = \ - EFI_ACPI_6_2_GICD, /* Type */ = \ - sizeof (EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE), = \ + EFI_ACPI_6_4_GICD, /* Type */ = \ + sizeof (EFI_ACPI_6_4_GIC_DISTRIBUTOR_STRUCTURE), = \ EFI_ACPI_RESERVED_WORD, /* Reserved1 */ = \ GicDistHwId, /* GicId */ = \ GicDistBase, /* PhysicalBaseAddress */ = \ @@ -230,43 +229,43 @@ typedef struct { } = \ } =20 -// EFI_ACPI_6_2_GICR_STRUCTURE -#define EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLeng= th) \ +// EFI_ACPI_6_4_GICR_STRUCTURE +#define EFI_ACPI_6_4_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLeng= th) \ { = \ - EFI_ACPI_6_2_GICR, /* Type */ = \ - sizeof (EFI_ACPI_6_2_GICR_STRUCTURE), /* Length */ = \ + EFI_ACPI_6_4_GICR, /* Type */ = \ + sizeof (EFI_ACPI_6_4_GICR_STRUCTURE), /* Length */ = \ EFI_ACPI_RESERVED_WORD, /* Reserved */ = \ RedisRegionAddr, /* DiscoveryRangeBaseAddress */ = \ RedisDiscLength /* DiscoveryRangeLength */ = \ } =20 -// EFI_ACPI_6_2_GIC_ITS_STRUCTURE -#define EFI_ACPI_6_2_GIC_ITS_INIT(GicItsId, GicItsBase) = \ +// EFI_ACPI_6_4_GIC_ITS_STRUCTURE +#define EFI_ACPI_6_4_GIC_ITS_INIT(GicItsId, GicItsBase) = \ { = \ - EFI_ACPI_6_2_GIC_ITS, /* Type */ = \ - sizeof (EFI_ACPI_6_2_GIC_ITS_STRUCTURE), = \ + EFI_ACPI_6_4_GIC_ITS, /* Type */ = \ + sizeof (EFI_ACPI_6_4_GIC_ITS_STRUCTURE), = \ EFI_ACPI_RESERVED_WORD, /* Reserved */ = \ GicItsId, /* GicItsId */ = \ GicItsBase, /* PhysicalBaseAddress */ = \ EFI_ACPI_RESERVED_DWORD /* DiscoveryRangeLength */ = \ } =20 -// EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE -#define EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT( = \ +// EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE +#define EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE_INIT( = \ ProximityDomain, Base, Length, Flags) = \ { = \ - 1, sizeof (EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE), ProximityDomain, = \ + 1, sizeof (EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE), ProximityDomain, = \ EFI_ACPI_RESERVED_WORD, (Base) & 0xffffffff, = \ (Base) >> 32, (Length) & 0xffffffff, = \ (Length) >> 32, EFI_ACPI_RESERVED_DWORD, Flags, = \ EFI_ACPI_RESERVED_QWORD = \ } =20 -// EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE -#define EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT( = \ +// EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE +#define EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT( = \ ProximityDomain, ACPIProcessorUID, Flags, ClockDomain) = \ { = \ - 3, sizeof (EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE), ProximityDomain, = \ + 3, sizeof (EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE), ProximityDomain, = \ ACPIProcessorUID, Flags, ClockDomain = \ } =20 @@ -274,16 +273,16 @@ typedef struct { // HMAT related structures // // Memory Proximity Domain Attributes Structure -// Refer Section 5.2.27.3 in ACPI Specification, Version 6.3 -#define EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INI= T( \ +// Refer Section 5.2.27.3 in ACPI Specification, Version 6.4 +#define EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INI= T( \ Flags, ProximityDomainForAttachedIntiator, ProximityDomainForMemory) = \ { = \ - EFI_ACPI_6_3_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES, = \ + EFI_ACPI_6_4_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES, = \ { = \ EFI_ACPI_RESERVED_BYTE, = \ EFI_ACPI_RESERVED_BYTE = \ }, = \ - sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES= ), \ + sizeof (EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES= ), \ { = \ Flags, = \ 0 = \ @@ -319,28 +318,27 @@ typedef struct { } =20 // System Locality Latency and Bandwidth Information Structure -// Refer Section 5.2.27.4 in ACPI Specification, Version 6.3 -#define EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_= INFO_INIT( \ - Flags, DataType, NumInitiatorProximityDomains, = \ +// Refer Section 5.2.27.4 in ACPI Specification, Version 6.4 +#define EFI_ACPI_6_4_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_= INFO_INIT( \ + Flags, DataType, MinTransferSize, NumInitiatorProximityDomains, = \ NumTargetProximityDomains, EntryBaseUnit) = \ { = \ - EFI_ACPI_6_3_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO, = \ + EFI_ACPI_6_4_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO, = \ { = \ EFI_ACPI_RESERVED_BYTE, = \ EFI_ACPI_RESERVED_BYTE = \ }, = \ - sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWI= DTH_INFO) + \ + sizeof (EFI_ACPI_6_4_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWI= DTH_INFO) + \ (4 * NumInitiatorProximityDomains) + (4 * NumTargetProximityDomains)= + \ (2 * NumInitiatorProximityDomains * NumTargetProximityDomains), = \ { = \ Flags, = \ + 0, = \ 0 = \ }, = \ + MinTransferSize, = \ DataType, = \ - { = \ - EFI_ACPI_RESERVED_BYTE, = \ - EFI_ACPI_RESERVED_BYTE = \ - }, = \ + EFI_ACPI_RESERVED_BYTE, = \ NumInitiatorProximityDomains, = \ NumTargetProximityDomains, = \ { = \ @@ -353,17 +351,17 @@ typedef struct { } =20 // Memory Side Cache Information Structure -// Refer Section 5.2.27.5 in ACPI Specification, Version 6.3 -#define EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT( = \ +// Refer Section 5.2.27.5 in ACPI Specification, Version 6.4 +#define EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT( = \ MemoryProximityDomain, MemorySideCacheSize, CacheAttributes, = \ NumberOfSmbiosHandles) = \ { = \ - EFI_ACPI_6_3_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO, = \ + EFI_ACPI_6_4_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO, = \ { = \ EFI_ACPI_RESERVED_BYTE, = \ EFI_ACPI_RESERVED_BYTE = \ }, = \ - sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO) + = \ + sizeof (EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO) + = \ (NumberOfSmbiosHandles * 2), = \ MemoryProximityDomain, = \ { = \ @@ -382,7 +380,7 @@ typedef struct { } =20 /** A macro to initialise the Memory Side Cache Information Attributes. - See Table 5.124 in ACPI Specification, Version 6.3 + See Table 5.130 in ACPI Specification, Version 6.4 =20 @param [in] TotalCacheLevels Total Cache Levels for this Memory Proxi= mity. @param [in] CacheLevel Cache Level described in this structure. @@ -397,11 +395,11 @@ typedef struct { TotalCacheLevels, CacheLevel, CacheAssociativity, WritePolicy, CacheLine= Size \ } =20 -// EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR -#define EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT(Length, Flag, Parent, = \ +// EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR +#define EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR_INIT(Length, Flag, Parent, = \ ACPIProcessorID, NumberOfPrivateResource) = \ { = \ - EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, /* Type 0 */ = \ + EFI_ACPI_6_4_PPTT_TYPE_PROCESSOR, /* Type 0 */ = \ Length, /* Length */ = \ { = \ EFI_ACPI_RESERVED_BYTE, = \ @@ -413,12 +411,12 @@ typedef struct { NumberOfPrivateResource /* Resource count */= \ } =20 -// EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE -#define EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT(Flag, NextLevelCache, Size,= \ - NoOfSets, Associativity, Attributes, LineSize) = \ +// EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE +#define EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_INIT(Flag, NextLevelCache, Size,= \ + NoOfSets, Associativity, Attributes, LineSize, CacheId) = \ { = \ - EFI_ACPI_6_3_PPTT_TYPE_CACHE, /* Type 1 */ = \ - sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE), /* Length */ = \ + EFI_ACPI_6_4_PPTT_TYPE_CACHE, /* Type 1 */ = \ + sizeof (EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE), /* Length */ = \ { = \ EFI_ACPI_RESERVED_BYTE, = \ EFI_ACPI_RESERVED_BYTE, = \ @@ -429,7 +427,8 @@ typedef struct { NoOfSets, /* Num of sets */ = \ Associativity, /* Num of ways */ = \ Attributes, /* Cache attributes = */ \ - LineSize /* Line size in byte= s */ \ + LineSize, /* Line size in byte= s */ \ + CacheId /* Cache id */ = \ } =20 /** Helper macro for CPPC _CPC object initialization. Use of this macro is diff --git a/Platform/ARM/SgiPkg/AcpiTables/Dbg2.aslc b/Platform/ARM/SgiPkg= /AcpiTables/Dbg2.aslc index 279f847cce4c..b85e7272fd82 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/Dbg2.aslc +++ b/Platform/ARM/SgiPkg/AcpiTables/Dbg2.aslc @@ -1,16 +1,22 @@ /** @file -* Debug Port Table 2 (DBG2) -* -* Copyright (c) 2018, ARM Limited. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* + Debug Port Table 2 (DBPG2) + + Debug Port Table 2 is used in platform firmware to describe the debug + ports available on the system to the OS. The reference design platforms = use + the non-secure UART port in the compute subsystem as the debug port. + + Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Specification Reference: + - https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup + /acpi-debug-port-table **/ =20 -#include "SgiAcpiHeader.h" -#include -#include #include +#include +#include "SgiAcpiHeader.h" =20 #define SGI_DBG2_NUM_DEBUG_PORTS 1 #define SGI_DBG2_NUM_GAS 1 @@ -21,7 +27,7 @@ =20 typedef struct { EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device; - EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister; + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister; UINT32 AddressSize; UINT8 NameSpaceString[SGI_DBG2_N= S_STR_LENGTH]; } DBG2_DEBUG_DEVICE_INFORMATION; @@ -48,7 +54,7 @@ typedef struct { OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister), /* UIN= T16 BaseAddressRegister Offset */ \ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize) /* UIN= T16 AddressSize Offset */ \ }, = \ - ARM_GAS32 (UartBase), /* EFI_ACPI_6_2_GENERIC= _ADDRESS_STRUCTURE BaseAddressRegister */ \ + ARM_GAS32 (UartBase), /* EFI_ACPI_6_4_GENERIC= _ADDRESS_STRUCTURE BaseAddressRegister */ \ UartAddrLen, /* UINT32 AddressSize = */ \ UartNameStr /* UINT8 NameSpaceStr= ing[MAX_DBG2_NAME_LEN] */ \ } @@ -56,7 +62,7 @@ typedef struct { STATIC DBG2_TABLE Dbg2 =3D { { ARM_ACPI_HEADER ( - EFI_ACPI_6_2_DEBUG_PORT_2_TABLE_SIGNATURE, + EFI_ACPI_6_4_DEBUG_PORT_2_TABLE_SIGNATURE, DBG2_TABLE, EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION ), diff --git a/Platform/ARM/SgiPkg/AcpiTables/Fadt.aslc b/Platform/ARM/SgiPkg= /AcpiTables/Fadt.aslc index 9472aff2e054..5ad448d9c9d2 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/Fadt.aslc +++ b/Platform/ARM/SgiPkg/AcpiTables/Fadt.aslc @@ -1,26 +1,32 @@ /** @file -* Fixed ACPI Description Table (FADT) -* -* Copyright (c) 2018, ARM Limited. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* + Fixed ACPI Description Table (FADT) + + FADT defines various fixed hardware ACPI information vital to an ACPI + compatible OS. FADT also has a pointer to the DSDT that contains the + Differentiated Definition Block, which in turn provides variable informa= tion + to an ACPI-compatible OS concerning the base system design. + + Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Specification Reference: + - ACPI 6.4, Chapter 5, Section 5.2.9, Fixed ACPI Description Table **/ =20 -#include "SgiAcpiHeader.h" #include -#include +#include "SgiAcpiHeader.h" =20 -STATIC EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE Fadt =3D { +STATIC EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE Fadt =3D { ARM_ACPI_HEADER ( - EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, - EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE, - EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_REVISION + EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE, + EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_REVISION ), 0, = // UINT32 FirmwareCtrl 0, = // UINT32 Dsdt EFI_ACPI_RESERVED_BYTE, = // UINT8 Reserved0 - EFI_ACPI_6_2_PM_PROFILE_ENTERPRISE_SERVER, = // UINT8 PreferredPmProfile + EFI_ACPI_6_4_PM_PROFILE_ENTERPRISE_SERVER, = // UINT8 PreferredPmProfile 0, = // UINT16 SciInt 0, = // UINT32 SmiCmd 0, = // UINT8 AcpiEnable @@ -54,11 +60,11 @@ STATIC EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE Fadt = =3D { 0, = // UINT8 Century 0, = // UINT16 IaPcBootArch 0, = // UINT8 Reserved1 - EFI_ACPI_6_2_HW_REDUCED_ACPI | EFI_ACPI_6_2_LOW_POWER_S0_IDLE_CAPABLE, = // UINT32 Flags + EFI_ACPI_6_4_HW_REDUCED_ACPI | EFI_ACPI_6_4_LOW_POWER_S0_IDLE_CAPABLE, = // UINT32 Flags NULL_GAS, = // GAS ResetReg 0, = // UINT8 ResetValue - EFI_ACPI_6_2_ARM_PSCI_COMPLIANT, = // UINT16 ArmBootArchFlags - EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, = // UINT8 MinorRevision + EFI_ACPI_6_4_ARM_PSCI_COMPLIANT, = // UINT16 ArmBootArchFlags + EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, = // UINT8 MinorRevision 0, = // UINT64 XFirmwareCtrl 0, = // UINT64 XDsdt NULL_GAS, = // GAS XPm1aEvtBlk diff --git a/Platform/ARM/SgiPkg/AcpiTables/Gtdt.aslc b/Platform/ARM/SgiPkg= /AcpiTables/Gtdt.aslc index b53cbb228f92..70765f87e537 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/Gtdt.aslc +++ b/Platform/ARM/SgiPkg/AcpiTables/Gtdt.aslc @@ -1,16 +1,21 @@ /** @file -* Generic Timer Description Table (GTDT) -* -* Copyright (c) 2018, ARM Limited. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* + Generic Timer Description Table (GTDT) + + GTDT provides OSPM with information about a system=E2=80=99s Generic Tim= ers + configuration. This table lists the watchdog and generic timer instances + available on the reference design platforms. + + Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Specification Reference: + - ACPI 6.4, Chapter 5, Section 5.2.24, Generic Timer Description Table **/ =20 -#include "SgiAcpiHeader.h" #include #include -#include +#include "SgiAcpiHeader.h" =20 #define SGI_PLATFORM_WATCHDOG_COUNT 2 #define SGI_PLATFORM_TIMER_COUNT (SGI_PLATFORM_WATCHDOG_COUNT + 1) @@ -18,7 +23,7 @@ =20 #define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF #define GTDT_GLOBAL_FLAGS 0 -#define GTDT_GTIMER_FLAGS EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIM= ER_INTERRUPT_POLARITY +#define GTDT_GTIMER_FLAGS EFI_ACPI_6_4_GTDT_TIMER_FLAG_TIM= ER_INTERRUPT_POLARITY =20 #define SGI_GT_BLOCK_CTL_BASE 0x2A810000 #define SGI_GT_BLOCK_FRAME1_CTL_BASE 0x2A820000 @@ -30,18 +35,18 @@ #define SGI_GT_BLOCK_FRAME0_GSIV FixedPcdGet32 (PcdGtFrame0Gsiv) =20 #define SGI_GTX_TIMER_FLAGS 0 -#define GTX_TIMER_SECURE EFI_ACPI_6_2_GTDT_GT_BLOCK_COMMO= N_FLAG_SECURE_TIMER +#define GTX_TIMER_SECURE EFI_ACPI_6_4_GTDT_GT_BLOCK_COMMO= N_FLAG_SECURE_TIMER #define GTX_TIMER_NON_SECURE 0 -#define GTX_TIMER_SAVE_CONTEXT EFI_ACPI_6_2_GTDT_GT_BLOCK_COMMO= N_FLAG_ALWAYS_ON_CAPABILITY +#define GTX_TIMER_SAVE_CONTEXT EFI_ACPI_6_4_GTDT_GT_BLOCK_COMMO= N_FLAG_ALWAYS_ON_CAPABILITY #define SGI_GTX_COMMON_FLAGS_S (GTX_TIMER_SAVE_CONTEXT | GTX_TI= MER_SECURE) #define SGI_GTX_COMMON_FLAGS_NS (GTX_TIMER_SAVE_CONTEXT | GTX_TI= MER_NON_SECURE) =20 -#define EFI_ACPI_6_2_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT( \ +#define EFI_ACPI_6_4_ARM_GENERIC_WATCHDOG_STRUCTURE_INIT( \ RefreshFramePhysicalAddress, ControlFramePhysicalAddress, \ WatchdogTimerGSIV, WatchdogTimerFlags) \ { \ - EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG, \ - sizeof (EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE), \ + EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG, \ + sizeof (EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_STRUCTURE), \ EFI_ACPI_RESERVED_WORD, \ RefreshFramePhysicalAddress, \ ControlFramePhysicalAddress, \ @@ -52,20 +57,20 @@ #pragma pack (1) =20 typedef struct { - EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt; - EFI_ACPI_6_2_GTDT_GT_BLOCK_STRUCTURE GtBlock; - EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_STRUCTURE Frames[SGI_TIMER_FRAM= ES_COUNT]; - EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE Watchdogs[SGI_PLATFOR= M_WATCHDOG_COUNT]; -} EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLES; + EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt; + EFI_ACPI_6_4_GTDT_GT_BLOCK_STRUCTURE GtBlock; + EFI_ACPI_6_4_GTDT_GT_BLOCK_TIMER_STRUCTURE Frames[SGI_TIMER_FRAM= ES_COUNT]; + EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_STRUCTURE Watchdogs[SGI_PLATFOR= M_WATCHDOG_COUNT]; +} EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLES; =20 #pragma pack () =20 -STATIC EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt =3D { +STATIC EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt =3D { { ARM_ACPI_HEADER ( - EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, - EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLES, - EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION + EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLES, + EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION ), SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddre= ss 0, // UINT32 Reserved @@ -79,17 +84,19 @@ STATIC EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLES Gt= dt =3D { GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2T= imerFlags 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePh= ysicalAddress SGI_PLATFORM_TIMER_COUNT, // UINT32 PlatformTimer= Count - sizeof (EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32 Platfr= omTimerOffset + sizeof (EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE), // UINT32 Platf= romTimerOffset + 0, // UINT32 VirtualPL2Tim= erGSIV + 0 // UINT32 VirtualPL2Tim= erFlags }, { - EFI_ACPI_6_2_GTDT_GT_BLOCK, // UINT8 Type - sizeof (EFI_ACPI_6_2_GTDT_GT_BLOCK_STRUCTURE) + // UINT16 Length - sizeof (EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_STRUCTURE) * + EFI_ACPI_6_4_GTDT_GT_BLOCK, // UINT8 Type + sizeof (EFI_ACPI_6_4_GTDT_GT_BLOCK_STRUCTURE) + // UINT16 Length + sizeof (EFI_ACPI_6_4_GTDT_GT_BLOCK_TIMER_STRUCTURE) * SGI_TIMER_FRAMES_COUNT, EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved SGI_GT_BLOCK_CTL_BASE, // UINT64 CntCtl= Base SGI_TIMER_FRAMES_COUNT, // UINT32 GTBloc= kTimerCount - sizeof (EFI_ACPI_6_2_GTDT_GT_BLOCK_STRUCTURE) // UINT32 GTBloc= kTimerOffset + sizeof (EFI_ACPI_6_4_GTDT_GT_BLOCK_STRUCTURE) // UINT32 GTBloc= kTimerOffset }, { { @@ -124,17 +131,17 @@ STATIC EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLES = Gtdt =3D { } }, { - EFI_ACPI_6_2_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT ( + EFI_ACPI_6_4_ARM_GENERIC_WATCHDOG_STRUCTURE_INIT ( FixedPcdGet32 (PcdGenericWatchdogRefreshBase), FixedPcdGet32 (PcdGenericWatchdogControlBase), FixedPcdGet32 (PcdWdogWS0Gsiv), 0 ), - EFI_ACPI_6_2_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT ( + EFI_ACPI_6_4_ARM_GENERIC_WATCHDOG_STRUCTURE_INIT ( FixedPcdGet32 (PcdGenericWatchdogRefreshBase), FixedPcdGet32 (PcdGenericWatchdogControlBase), FixedPcdGet32 (PcdWdogWS1Gsiv), - EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER + EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_FLAG_SECURE_TIMER ) } }; diff --git a/Platform/ARM/SgiPkg/AcpiTables/Mcfg.aslc b/Platform/ARM/SgiPkg= /AcpiTables/Mcfg.aslc index 090297d9541a..96fb6281ea53 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/Mcfg.aslc +++ b/Platform/ARM/SgiPkg/AcpiTables/Mcfg.aslc @@ -1,22 +1,24 @@ /** @file -* Memory mapped configuration space base address description table (MCFG) -* -* Copyright (c) 2018, ARM Ltd. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* + Memory mapped configuration space base address description table (MCFG) + + The MCFG table provides the address of the PCI configuration space, which + is required by the OS to perform the PCIe bus enumeration. + + Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Specification Reference: + - http://www.pcisig.com/home **/ =20 -#include #include +#include +#include #include #include "SgiAcpiHeader.h" #include "SgiPlatform.h" =20 -#include -#include -#include - #pragma pack(1) typedef struct { @@ -28,7 +30,7 @@ typedef struct EFI_ACPI_PCI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE Mc= fg =3D { { ARM_ACPI_HEADER ( - EFI_ACPI_6_2_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDR= ESS_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_4_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDR= ESS_DESCRIPTION_TABLE_SIGNATURE, EFI_ACPI_PCI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TA= BLE, EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION ), diff --git a/Platform/ARM/SgiPkg/AcpiTables/Spcr.aslc b/Platform/ARM/SgiPkg= /AcpiTables/Spcr.aslc index 632144530076..6467fcdf4fd0 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/Spcr.aslc +++ b/Platform/ARM/SgiPkg/AcpiTables/Spcr.aslc @@ -1,20 +1,27 @@ /** @file -* Serial Port Console Redirection Table (SPCR) -* -* Copyright (c) 2018, ARM Limited. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* + Serial Port Console Redirection Table (SPCR) + + SPCR table provides information about the configuration and use of the s= erial + port or non-legacy UART interface. This table list the non-secure UART + instance in the compute subsystem on the reference design platforms as t= he + available serial port. + + Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Specification Reference: + - https://docs.microsoft.com/en-us/windows-hardware/drivers/serports/ + serial-port-console-redirection-table **/ =20 -#include "SgiAcpiHeader.h" -#include -#include #include +#include +#include "SgiAcpiHeader.h" =20 STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr =3D { ARM_ACPI_HEADER ( - EFI_ACPI_6_2_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE, + EFI_ACPI_6_4_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE, EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE, EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION ), @@ -26,7 +33,7 @@ STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spc= r =3D { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, - // EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE BaseAddress; + // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE BaseAddress; ARM_GAS32 (FixedPcdGet64 (PcdSerialDbgRegisterBase)), // UINT8 InterruptType; EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC, --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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