From nobody Sun Feb 8 14:53:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+87234+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+87234+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1646234598; cv=none; d=zohomail.com; s=zohoarc; b=lBGVS/XlUalHzyyZmMfGjPGOmrTFqjKdS9ZHdUh7vnGn8tBO0Bbxm7UoqptDYA6l1BY84KtUd+bpx1TP3qMfOS9apnJjfXCbj+HQVeIwMTc9cIbP5KJpymyLUsY5JksU9bpoQdD35xniuYMmVoMNxfkVI/MH6CMUOA7mS2CYM4Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1646234598; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=f3U2geBz26z1Ajx7PPlRVzQIEYv/8Cd1TRg+heq0CxI=; b=JFaWPG5avh508SvL3PS4K2T+tBkLg0uW3EG2COf88jo1QnOkbSdbna8MIgbkkWblwEzNZpJfxt3yMoEUkC1GFExnZsL8TdmgjUCzKJ4jwX09RrWOS7yrOxavy2zQjNbNnqVnEKLfArdAI0EY+hEk2I46YLfs23QMSI2ebiieilQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+87234+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1646234598900252.29803655944568; Wed, 2 Mar 2022 07:23:18 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id SPFcYY1788612xOW6hAUNiif; Wed, 02 Mar 2022 07:23:18 -0800 X-Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web10.5530.1646212796036188164 for ; Wed, 02 Mar 2022 01:19:56 -0800 X-IronPort-AV: E=McAfee;i="6200,9189,10273"; a="233324159" X-IronPort-AV: E=Sophos;i="5.90,148,1643702400"; d="scan'208";a="233324159" X-Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Mar 2022 01:19:55 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,148,1643702400"; d="scan'208";a="641630294" X-Received: from shwdeopenlab704.ccr.corp.intel.com ([10.239.182.239]) by orsmga004.jf.intel.com with ESMTP; 02 Mar 2022 01:19:53 -0800 From: Yu Pu To: devel@edk2.groups.io Cc: Yu Pu , Eric Dong , Ray Ni Subject: [edk2-devel] [PATCH v1 1/7] UefiCpuPackage: Add APIs for CPU physical address mask calculation Date: Wed, 2 Mar 2022 17:18:53 +0800 Message-Id: <20220302091859.2783-2-yu.pu@intel.com> In-Reply-To: <20220302091859.2783-1-yu.pu@intel.com> References: <20220302091859.2783-1-yu.pu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,yu.pu@intel.com X-Gm-Message-State: dOQRWAo2ZDDPUYgSpsUFDEo8x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1646234598; bh=9O5zNI0vUyvhSWG33ZyVXzDKwqcEdGYWHjYBZJp8ESg=; h=Cc:Date:From:Reply-To:Subject:To; b=Wuy9OBOXvu5OV6ZTTO6UWKiNsRjJL+iSCsOAvjjvclrZco0Ngur5JDLdR4cQ2turY5b Q3FmesNnxctLRur5qdSym8pf9cqImpKbbVM0SdMEdqwj/xLLt5UbUORgM9y9Uyg0i8DKS 8445DwkgMN/pjip6plEtAWnPqKnJYIXjytc= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1646235502720100005 Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3394 Add API named GetPhysicalAddressBits() for CPU physical address mask calculation, and remove the duplicated code in UefiCpuPackage. Cc: Eric Dong Cc: Ray Ni Signed-off-by: Yu Pu --- UefiCpuPkg/CpuDxe/CpuDxe.c | 16 +------ UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c | 47 ++++++++++++++++++= ++ UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c | 9 +--- UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 9 +--- UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c | 9 +--- UefiCpuPkg/Include/Library/UefiCpuLib.h | 17 +++++++ 6 files changed, 70 insertions(+), 37 deletions(-) diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c index 00f3cb09572c..8aca1bf72b4c 100644 --- a/UefiCpuPkg/CpuDxe/CpuDxe.c +++ b/UefiCpuPkg/CpuDxe/CpuDxe.c @@ -503,21 +503,7 @@ InitializeMtrrMask ( VOID ) { - UINT32 RegEax; - UINT8 PhysicalAddressBits; - - AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL); - - if (RegEax >=3D 0x80000008) { - AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL); - - PhysicalAddressBits =3D (UINT8)RegEax; - } else { - PhysicalAddressBits =3D 36; - } - - mValidMtrrBitsMask =3D LShiftU64 (1, PhysicalAddressBits) - 1; - mValidMtrrAddressMask =3D mValidMtrrBitsMask & 0xfffffffffffff000ULL; + GetPhysicalAddressBits(&mValidMtrrBitsMask, &mValidMtrrAddressMask); } =20 /** diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c b/UefiCpuPk= g/Library/BaseUefiCpuLib/BaseUefiCpuLib.c index 5d925bc273f8..bb1343f3cd21 100644 --- a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c +++ b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c @@ -79,3 +79,50 @@ GetCpuSteppingId ( =20 return (UINT8)Eax.Bits.SteppingId; } + +/** + Get the physical address width supported by the processor. + @param[out] ValidAddressMask Bitmask with valid address bits se= t to + one; other bits are clear. Optional + parameter. + @param[out] ValidPageBaseAddressMask Bitmask with valid page base addre= ss + bits set to one; other bits are cl= ear. + Optional parameter. + @return The physical address width supported by the processor. +**/ +UINT8 +EFIAPI +GetPhysicalAddressBits ( + OUT UINT64 *ValidAddressMask OPTIONAL, + OUT UINT64 *ValidPageBaseAddressMask OPTIONAL + ) +{ + UINT32 MaxExtendedFunction; + CPUID_VIR_PHY_ADDRESS_SIZE_EAX VirPhyAddressSize; + UINT64 AddressMask; + UINT64 PageBaseAddressMask; + + AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunction, NULL, NULL, NUL= L); + if (MaxExtendedFunction >=3D CPUID_VIR_PHY_ADDRESS_SIZE) { + AsmCpuid ( + CPUID_VIR_PHY_ADDRESS_SIZE, + &VirPhyAddressSize.Uint32, + NULL, + NULL, + NULL + ); + } else { + VirPhyAddressSize.Bits.PhysicalAddressBits =3D 36; + } + + AddressMask =3D LShiftU64 (1, VirPhyAddressSize.Bits.PhysicalAddressBits= ) - 1; + PageBaseAddressMask =3D AddressMask & ~(UINT64)0xFFF; + + if (ValidAddressMask !=3D NULL) { + *ValidAddressMask =3D AddressMask; + } + if (ValidPageBaseAddressMask !=3D NULL) { + *ValidPageBaseAddressMask =3D PageBaseAddressMask; + } + return (UINT8)VirPhyAddressSize.Bits.PhysicalAddressBits; +} diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c b/UefiCpuPkg/Lib= rary/SmmCpuFeaturesLib/SmmStm.c index 4e8f897f5e9c..ec7cd4013132 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -330,13 +331,7 @@ SmmCpuFeaturesInstallSmiHandler ( if (Hob !=3D NULL) { Psd->PhysicalAddressBits =3D ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace; } else { - AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL); - if (RegEax >=3D 0x80000008) { - AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL); - Psd->PhysicalAddressBits =3D (UINT8)RegEax; - } else { - Psd->PhysicalAddressBits =3D 36; - } + Psd->PhysicalAddressBits =3D GetPhysicalAddressBits (NULL, NULL); } =20 if (!mStmConfigurationTableInitialized) { diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuD= xeSmm/X64/PageTbl.c index 538394f23910..de1385a86948 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c @@ -194,7 +194,6 @@ CalculateMaximumSupportAddress ( VOID ) { - UINT32 RegEax; UINT8 PhysicalAddressBits; VOID *Hob; =20 @@ -205,13 +204,7 @@ CalculateMaximumSupportAddress ( if (Hob !=3D NULL) { PhysicalAddressBits =3D ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace; } else { - AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL); - if (RegEax >=3D 0x80000008) { - AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL); - PhysicalAddressBits =3D (UINT8)RegEax; - } else { - PhysicalAddressBits =3D 36; - } + PhysicalAddressBits =3D GetPhysicalAddressBits (NULL, NULL); } =20 return PhysicalAddressBits; diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c b/UefiCpuPkg= /Universal/Acpi/S3Resume2Pei/S3Resume.c index 8419a4e32acb..1017f0316093 100644 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c +++ b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c @@ -42,6 +42,7 @@ #include #include #include +#include =20 /** This macro aligns the address of a variable with auto storage @@ -646,13 +647,7 @@ RestoreS3PageTables ( if (Hob !=3D NULL) { PhysicalAddressBits =3D ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace; } else { - AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL); - if (RegEax >=3D 0x80000008) { - AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL); - PhysicalAddressBits =3D (UINT8)RegEax; - } else { - PhysicalAddressBits =3D 36; - } + PhysicalAddressBits =3D GetPhysicalAddressBits (NULL, NULL); } =20 // diff --git a/UefiCpuPkg/Include/Library/UefiCpuLib.h b/UefiCpuPkg/Include/L= ibrary/UefiCpuLib.h index 0ff4a35774c1..dabed95ab38a 100644 --- a/UefiCpuPkg/Include/Library/UefiCpuLib.h +++ b/UefiCpuPkg/Include/Library/UefiCpuLib.h @@ -62,4 +62,21 @@ GetCpuSteppingId ( VOID ); =20 +/** + Get the physical address width supported by the processor. + @param[out] ValidAddressMask Bitmask with valid address bits se= t to + one; other bits are clear. Optional + parameter. + @param[out] ValidPageBaseAddressMask Bitmask with valid page base addre= ss + bits set to one; other bits are cl= ear. + Optional parameter. + @return The physical address width supported by the processor. +**/ +UINT8 +EFIAPI +GetPhysicalAddressBits ( + OUT UINT64 *ValidAddressMask OPTIONAL, + OUT UINT64 *ValidPageBaseAddressMask OPTIONAL + ); + #endif --=20 2.30.0.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#87234): https://edk2.groups.io/g/devel/message/87234 Mute This Topic: https://groups.io/mt/89503324/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-