From nobody Fri May 17 07:07:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+86974+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+86974+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=quicinc.com ARC-Seal: i=1; a=rsa-sha256; t=1645709379; cv=none; d=zohomail.com; s=zohoarc; b=Fbgbs9OEMeni0vw1cgPxWWKFu5Xf9aKgBc/EC8GZafzfd1WqI/x+qhL8dlxOG3bpYwpGssTwgjgeLELUL+PlcIZZ9YuS+xNiCB0aKWCsdIbM664xW/7K4LVU5y8LqYTHnefNaLnuSaEe+nDt86gGQoG0Vb2X6k8VVeo2WGsaDEM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1645709379; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=r3xDMh7SKJMvhjKQ952w6GH3z5fJ1i/QBvGeQ/7rrtI=; b=lJ1LbPqmADqm8+UQq9kGybUiEBzg/OrPo6nAGb5RjDqflEBl9lcNRmcZTXWKcFw0Gsyjk0K46/kryX9zMeh0n2xpqK1fYMZEPVsD5Yv+hKm6rv2xm6f9z3Xp/BO14HsoBobtcDCE5vCWk7Oi+gtqenbT6VXDU0BvT8CJ1WozTTg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+86974+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1645709379327290.82407658998125; Thu, 24 Feb 2022 05:29:39 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id V23SYY1788612xs5AaDNhKfN; Thu, 24 Feb 2022 05:29:39 -0800 X-Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by mx.groups.io with SMTP id smtpd.web10.10194.1645709378574990544 for ; Thu, 24 Feb 2022 05:29:38 -0800 X-Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 24 Feb 2022 05:29:38 -0800 X-QCInternal: smtphost X-Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Feb 2022 05:29:38 -0800 X-Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.15; Thu, 24 Feb 2022 05:29:38 -0800 X-Received: from krabica.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.15; Thu, 24 Feb 2022 05:29:36 -0800 From: "Tomas Pilar (tpilar)" To: CC: Ray Ni , Ard Biesheuvel , Leif Lindholm Subject: [edk2-devel] [PATCH v3] MdeModulePkg: Correct high-memory use in NvmExpressDxe Date: Thu, 24 Feb 2022 13:29:29 +0000 Message-ID: <20220224132929.2052626-1-quic_tpilar@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,quic_tpilar@quicinc.com X-Gm-Message-State: PunynD6DxRxKyrHVLrLhgqGUx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1645709379; bh=W6JgiXty3lyWZ8sSnUnqwkvJiaINiTJts0QtpN4YY3k=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=ptg086dxdc+bC4LRvIvvf1aVqOkcQXXtlwJOaJusw6n4fb1q+RyfbCVM3ztUOXe9poX 5RVFh9zgca1AXfkTxJma6+tICd2eZUSUen5VdfNGqzIqtLzmDx/f6JrX2vURvEfeeUYKN Ss26SB0/CZ6h+6gWQcOldKGWhEJyUDsSvko= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1645709381387100002 Content-Type: text/plain; charset="utf-8" Move the logic that stores starting PCI attributes and sets the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute to DriverBindingStart() before the memory that backs the DMA engine is allocated. This ensures that the DMA-backing memory is not forcibly allocated below 4G in system address map. Otherwise the allocation fails on platforms that do not have any memory below the 4G mark and the drive initialisation fails. Leave the PCI device enabling attribute logic in NvmeControllerInit() to ensure that the device is re-enabled on reset in case it was disabled via PCI attributes. Cc: Ray Ni Cc: Ard Biesheuvel Cc: Leif Lindholm Signed-off-by: Tomas Pilar Reviewed-by: Ard Biesheuvel --- .../Bus/Pci/NvmExpressDxe/NvmExpress.c | 27 +++++++++++++++++++ .../Bus/Pci/NvmExpressDxe/NvmExpressHci.c | 26 +----------------- 2 files changed, 28 insertions(+), 25 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c b/MdeModulePkg= /Bus/Pci/NvmExpressDxe/NvmExpress.c index 9d40f67e8e..b70499e3be 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c @@ -959,6 +959,33 @@ NvmExpressDriverBindingStart ( goto Exit; } =20 + // + // Save original PCI attributes + // + Status =3D PciIo->Attributes ( + PciIo, + EfiPciIoAttributeOperationGet, + 0, + &Private->PciAttributes + ); + + if (EFI_ERROR (Status)) { + return Status; + } + + // + // Enable 64-bit DMA support in the PCI layer. + // + Status =3D PciIo->Attributes ( + PciIo, + EfiPciIoAttributeOperationEnable, + EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE, + NULL + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, "NvmeControllerInit: failed to enable 64-bit DMA= (%r)\n", Status)); + } + // // 6 x 4kB aligned buffers will be carved out of this buffer. // 1st 4kB boundary is the start of the admin submission queue. diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c b/MdeModule= Pkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c index ac77afe113..d87212ffb2 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c @@ -728,20 +728,9 @@ NvmeControllerInit ( UINT8 Mn[41]; =20 // - // Save original PCI attributes and enable this controller. + // Enable this controller. // PciIo =3D Private->PciIo; - Status =3D PciIo->Attributes ( - PciIo, - EfiPciIoAttributeOperationGet, - 0, - &Private->PciAttributes - ); - - if (EFI_ERROR (Status)) { - return Status; - } - Status =3D PciIo->Attributes ( PciIo, EfiPciIoAttributeOperationSupported, @@ -764,19 +753,6 @@ NvmeControllerInit ( return Status; } =20 - // - // Enable 64-bit DMA support in the PCI layer. - // - Status =3D PciIo->Attributes ( - PciIo, - EfiPciIoAttributeOperationEnable, - EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE, - NULL - ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "NvmeControllerInit: failed to enable 64-bit DMA (= %r)\n", Status)); - } - // // Read the Controller Capabilities register and verify that the NVM com= mand set is supported // --=20 2.30.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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