From nobody Mon Feb 9 06:34:19 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+85956+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85956+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=hpe.com ARC-Seal: i=1; a=rsa-sha256; t=1642838109; cv=none; d=zohomail.com; s=zohoarc; b=fk9Zrce248O1HgJfOypxQRwIGcTD32NhEKcdMPJSFjZi8r2GCRuwKiNEkTIYGWGAKEjz2C0w0ZZ0osivBiyL3d11nlzwVyrWtpT5XA0hv8vZn8ubkU5Ttc/x/d/V++PP2cUfaPVDMJDb4F4gBfV7N9Ag+HyiD2Y8GeL/6sCB+wk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1642838109; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=t4pxd9ie60RKiJgd8ECdIw1s9xebnA57HCoNwALLYFQ=; b=EFloaTqAexlGhYrsdvlmmc/sM9NCgIwlIM1UU7GEUh+rql9fmLNISFK8TjXNAbrP9yYM1kN988Rcv+43rm3xB11rCgNkQpxT9zVbP/5P4L0DXySRyhcWG6VU1chCkbJtNhHYDhSreC3aJEW4SiowfC45xW/1LJ4dBLMBzsDpItA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85956+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1642838109185239.65871172068228; Fri, 21 Jan 2022 23:55:09 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id OmfqYY1788612x34rdg9M49q; Fri, 21 Jan 2022 23:55:08 -0800 X-Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by mx.groups.io with SMTP id smtpd.web11.6085.1642838108360986549 for ; Fri, 21 Jan 2022 23:55:08 -0800 X-Received: from pps.filterd (m0148663.ppops.net [127.0.0.1]) by mx0a-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 20M4gNcd023499; Sat, 22 Jan 2022 07:55:08 GMT X-Received: from g4t3427.houston.hpe.com (g4t3427.houston.hpe.com [15.241.140.73]) by mx0a-002e3701.pphosted.com (PPS) with ESMTPS id 3drb438rvt-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 22 Jan 2022 07:55:08 +0000 X-Received: from g4t3433.houston.hpecorp.net (g4t3433.houston.hpecorp.net [16.208.49.245]) by g4t3427.houston.hpe.com (Postfix) with ESMTP id 3C0C357; Sat, 22 Jan 2022 07:55:07 +0000 (UTC) X-Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g4t3433.houston.hpecorp.net (Postfix) with ESMTP id 2930545; Sat, 22 Jan 2022 07:55:05 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Daniel Schaefer , Sunil V L Subject: [edk2-devel] [edk2-platforms][PATCH V2 11/14] RISC-V/ProcessorPkg: Address Core CI Spelling errors. Date: Sat, 22 Jan 2022 14:53:15 +0800 Message-Id: <20220122065318.21808-12-abner.chang@hpe.com> In-Reply-To: <20220122065318.21808-1-abner.chang@hpe.com> References: <20220122065318.21808-1-abner.chang@hpe.com> X-Proofpoint-GUID: LB9TQ27XhRbiGLOXDUAzcEM2IUiEO6lQ X-Proofpoint-ORIG-GUID: LB9TQ27XhRbiGLOXDUAzcEM2IUiEO6lQ X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-HPE-SCL: -1 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,abner.chang@hpe.com X-Gm-Message-State: 7LJlKi2H1tSa9k5uBYMZqaEbx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1642838108; bh=O1REtgMhER0BK0uXuchNbZ1aaejQncCfLdauW6Urn2I=; h=Cc:Date:From:Reply-To:Subject:To; b=b/k6UYGUgqhxujwEcMkCphowykIglG/K32opnH0MffDmPgNfFugpVpnTZ5+FGSucNno wINbM91WjAuHOprizropVPb+qOqJDJMFsY9MvBMwL/79LgZAazY11m5G2p7EMO4OqZEy1 AootXmQnIyN9zyDAPwofoveEzHNufp3tBV8= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1642838110610100015 Content-Type: text/plain; charset="utf-8" Signed-off-by: Abner Chang Cc: Daniel Schaefer Cc: Sunil V L --- .../RISC-V/ProcessorPkg/RiscVProcessorPkg.dec | 4 ++-- .../RiscVFirmwareContextSbiLib.inf | 6 +++--- .../RiscVFirmwareContextSscratchLib.inf | 4 ++-- .../Include/Library/RiscVEdk2SbiLib.h | 16 ++++++++-------- .../RISC-V/ProcessorPkg/Include/OpensbiTypes.h | 4 ++-- .../Include/ProcessorSpecificHobData.h | 2 +- .../Include/SmbiosProcessorSpecificData.h | 4 ++-- .../Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c | 16 ++++++++-------- .../RiscVFirmwareContextSbiLib.c | 4 ++-- .../RiscVFirmwareContextStvecLib.c | 4 ++-- 10 files changed, 32 insertions(+), 32 deletions(-) diff --git a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec b/Silicon/RI= SC-V/ProcessorPkg/RiscVProcessorPkg.dec index 59634f4413..177c1a710d 100644 --- a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec +++ b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec @@ -1,7 +1,7 @@ -## @file RiscVProcesssorPkg.dec +## @file RiscVProcessorPkg.dec # This Package provides UEFI RISC-V processor modules and libraries. # -# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All right= s reserved.
+# Copyright (c) 2020-2022, Hewlett Packard Enterprise Development LP. All = rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib= /RiscVFirmwareContextSbiLib.inf b/Silicon/RISC-V/ProcessorPkg/Library/RiscV= FirmwareContextSbiLib/RiscVFirmwareContextSbiLib.inf index 0edf781149..1e4f14724b 100644 --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVF= irmwareContextSbiLib.inf +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVF= irmwareContextSbiLib.inf @@ -1,9 +1,9 @@ ## @file -# Instance of OpebSBI Firmware Conext Library +# Instance of OpenSBI Firmware Context Library # -# This iinstance uses RISC-V OpenSBI Firmware Extension SBI. +# This instance uses RISC-V OpenSBI Firmware Extension SBI. # -# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
+# Copyright (c) 2021-2022, Hewlett Packard Enterprise Development LP. All= rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscrat= chLib/RiscVFirmwareContextSscratchLib.inf b/Silicon/RISC-V/ProcessorPkg/Lib= rary/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.inf index 750c1cf51f..09e635fd1d 100644 --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/R= iscVFirmwareContextSscratchLib.inf +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/R= iscVFirmwareContextSscratchLib.inf @@ -1,9 +1,9 @@ ## @file -# Instance of OpebSBI Firmware Conext Library +# Instance of OpenSBI Firmware Context Library # # This instance uses RISC-V Supervisor mode SCRATCH CSR # -# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
+# Copyright (c) 2021-2022, Hewlett Packard Enterprise Development LP. All= rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h = b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h index 88d957f002..6089137373 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h @@ -1,7 +1,7 @@ /** @file Library to call the RISC-V SBI ecalls =20 - Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved.=
+ Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights rese= rved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -54,7 +54,7 @@ SbiGetSpecVersion ( /** Get the SBI implementation ID =20 - This ID is used to idenetify a specific SBI implementation in order to w= ork + This ID is used to identify a specific SBI implementation in order to wo= rk around any quirks it might have. =20 @param[out] ImplId The ID of the SBI implementation. @@ -275,7 +275,7 @@ SbiRemoteFenceI ( /** Instructs the remote harts to execute one or more SFENCE.VMA instruction= s. =20 - The SFENCE.VMA covers the range of virtual addresses between StartAaddr = and Size. + The SFENCE.VMA covers the range of virtual addresses between StartAddr a= nd Size. =20 The remote fence function acts as a full tlb flush if * StartAddr and si= ze are both 0 * size is equal to 2^XLEN-1 @@ -305,7 +305,7 @@ SbiRemoteSfenceVma ( /** Instructs the remote harts to execute one or more SFENCE.VMA instruction= s. =20 - The SFENCE.VMA covers the range of virtual addresses between StartAaddr = and Size. + The SFENCE.VMA covers the range of virtual addresses between StartAddr a= nd Size. Covers only the given ASID. =20 The remote fence function acts as a full tlb flush if * StartAddr and si= ze @@ -337,7 +337,7 @@ SbiRemoteSfenceVmaAsid ( /** Instructs the remote harts to execute one or more SFENCE.GVMA instructio= ns. =20 - The SFENCE.GVMA covers the range of virtual addresses between StartAaddr= and Size. + The SFENCE.GVMA covers the range of virtual addresses between StartAddr = and Size. Covers only the given VMID. This function call is only valid for harts implementing the hypervisor e= xtension. =20 @@ -373,7 +373,7 @@ SbiRemoteHfenceGvmaVmid ( /** Instructs the remote harts to execute one or more SFENCE.GVMA instructio= ns. =20 - The SFENCE.GVMA covers the range of virtual addresses between StartAaddr= and Size. + The SFENCE.GVMA covers the range of virtual addresses between StartAddr = and Size. This function call is only valid for harts implementing the hypervisor e= xtension. =20 The remote fence function acts as a full tlb flush if * StartAddr and si= ze @@ -407,7 +407,7 @@ SbiRemoteHfenceGvma ( /** Instructs the remote harts to execute one or more SFENCE.VVMA instructio= ns. =20 - The SFENCE.GVMA covers the range of virtual addresses between StartAaddr= and Size. + The SFENCE.GVMA covers the range of virtual addresses between StartAddr = and Size. Covers only the given ASID. This function call is only valid for harts implementing the hypervisor e= xtension. =20 @@ -443,7 +443,7 @@ SbiRemoteHfenceVvmaAsid ( /** Instructs the remote harts to execute one or more SFENCE.VVMA instructio= ns. =20 - The SFENCE.GVMA covers the range of virtual addresses between StartAaddr= and Size. + The SFENCE.GVMA covers the range of virtual addresses between StartAddr = and Size. This function call is only valid for harts implementing the hypervisor e= xtension. =20 The remote fence function acts as a full tlb flush if * StartAddr and si= ze diff --git a/Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h b/Silicon/R= ISC-V/ProcessorPkg/Include/OpensbiTypes.h index 8a6ea97708..af34e8b0ae 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h @@ -1,7 +1,7 @@ /** @file - RISC-V OpesbSBI header file reference. + RISC-V OpenSBI header file reference. =20 - Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All right= s reserved.
+ Copyright (c) 2020-2022, Hewlett Packard Enterprise Development LP. All = rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 diff --git a/Silicon/RISC-V/ProcessorPkg/Include/ProcessorSpecificHobData.h= b/Silicon/RISC-V/ProcessorPkg/Include/ProcessorSpecificHobData.h index 97285289f7..4b2a92e2f2 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/ProcessorSpecificHobData.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/ProcessorSpecificHobData.h @@ -29,7 +29,7 @@ typedef struct { EFI_GUID CoreGuid; VOID *Context; // The additional information of this core whi= ch // built in PEI phase and carried to DXE phase. - // The content is pocessor or platform specifi= c. + // The content is processor or platform specif= ic. SMBIOS_RISC_V_PROCESSOR_SPECIFIC_DATA ProcessorSpecificData; } RISC_V_PROCESSOR_SPECIFIC_HOB_DATA; =20 diff --git a/Silicon/RISC-V/ProcessorPkg/Include/SmbiosProcessorSpecificDat= a.h b/Silicon/RISC-V/ProcessorPkg/Include/SmbiosProcessorSpecificData.h index 81e48cd068..85b8dcbe20 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/SmbiosProcessorSpecificData.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/SmbiosProcessorSpecificData.h @@ -1,9 +1,9 @@ /** @file Industry Standard Definitions of RISC-V Processor Specific data defined = in - below link for complaiant with SMBIOS Table Specification v3.3.0. + below link for compliant with SMBIOS Table Specification v3.3.0. https://github.com/riscv/riscv-smbios =20 - Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All right= s reserved.
+ Copyright (c) 2019-2022, Hewlett Packard Enterprise Development LP. All = rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2S= biLib.c b/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiL= ib.c index 319526ed8f..a51139542d 100644 --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c @@ -15,7 +15,7 @@ - SbiLegacyRemoteSfenceVmaAsid -> Use SbiRemoteSfenceVmaAsid - SbiLegacyShutdown -> Wait for new System Reset extension =20 - Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved.=
+ Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights rese= rved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 @par Revision Reference: @@ -173,7 +173,7 @@ SbiGetSpecVersion ( /** Get the SBI implementation ID =20 - This ID is used to idenetify a specific SBI implementation in order to w= ork + This ID is used to identify a specific SBI implementation in order to wo= rk around any quirks it might have. =20 @param[out] ImplId The ID of the SBI implementation. @@ -441,7 +441,7 @@ SbiRemoteFenceI ( /** Instructs the remote harts to execute one or more SFENCE.VMA instruction= s. =20 - The SFENCE.VMA covers the range of virtual addresses between StartAaddr = and Size. + The SFENCE.VMA covers the range of virtual addresses between StartAddr a= nd Size. =20 The remote fence function acts as a full tlb flush if * StartAddr and si= ze are both 0 * size is equal to 2^XLEN-1 @@ -483,7 +483,7 @@ SbiRemoteSfenceVma ( /** Instructs the remote harts to execute one or more SFENCE.VMA instruction= s. =20 - The SFENCE.VMA covers the range of virtual addresses between StartAaddr = and Size. + The SFENCE.VMA covers the range of virtual addresses between StartAddr a= nd Size. Covers only the given ASID. =20 The remote fence function acts as a full tlb flush if * StartAddr and si= ze @@ -528,7 +528,7 @@ SbiRemoteSfenceVmaAsid ( /** Instructs the remote harts to execute one or more SFENCE.GVMA instructio= ns. =20 - The SFENCE.GVMA covers the range of virtual addresses between StartAaddr= and Size. + The SFENCE.GVMA covers the range of virtual addresses between StartAddr = and Size. Covers only the given VMID. This function call is only valid for harts implementing the hypervisor e= xtension. =20 @@ -577,7 +577,7 @@ SbiRemoteHFenceGvmaVmid ( /** Instructs the remote harts to execute one or more SFENCE.GVMA instructio= ns. =20 - The SFENCE.GVMA covers the range of virtual addresses between StartAaddr= and Size. + The SFENCE.GVMA covers the range of virtual addresses between StartAddr = and Size. This function call is only valid for harts implementing the hypervisor e= xtension. =20 The remote fence function acts as a full tlb flush if * StartAddr and si= ze @@ -623,7 +623,7 @@ SbiRemoteHFenceGvma ( /** Instructs the remote harts to execute one or more SFENCE.VVMA instructio= ns. =20 - The SFENCE.GVMA covers the range of virtual addresses between StartAaddr= and Size. + The SFENCE.GVMA covers the range of virtual addresses between StartAddr = and Size. Covers only the given ASID. This function call is only valid for harts implementing the hypervisor e= xtension. =20 @@ -672,7 +672,7 @@ SbiRemoteHFenceVvmaAsid ( /** Instructs the remote harts to execute one or more SFENCE.VVMA instructio= ns. =20 - The SFENCE.GVMA covers the range of virtual addresses between StartAaddr= and Size. + The SFENCE.GVMA covers the range of virtual addresses between StartAddr = and Size. This function call is only valid for harts implementing the hypervisor e= xtension. =20 The remote fence function acts as a full tlb flush if * StartAddr and si= ze diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib= /RiscVFirmwareContextSbiLib.c b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFi= rmwareContextSbiLib/RiscVFirmwareContextSbiLib.c index 6125618eaf..a2a18d3eb7 100644 --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVF= irmwareContextSbiLib.c +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVF= irmwareContextSbiLib.c @@ -1,8 +1,8 @@ /** @file - This iinstance uses RISC-V OpenSBI Firmware Extension SBI to + This instance uses RISC-V OpenSBI Firmware Extension SBI to get the pointer of firmware context. =20 - Copyright (c) 2021 Hewlett Packard Enterprise Development LP. All rights= reserved.
+ Copyright (c) 2021-2022 Hewlett Packard Enterprise Development LP. All r= ights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent **/ diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextStvecL= ib/RiscVFirmwareContextStvecLib.c b/Silicon/RISC-V/ProcessorPkg/Library/Ris= cVFirmwareContextStvecLib/RiscVFirmwareContextStvecLib.c index 7d1675355a..cc5a7e2ccc 100644 --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextStvecLib/Risc= VFirmwareContextStvecLib.c +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextStvecLib/Risc= VFirmwareContextStvecLib.c @@ -1,8 +1,8 @@ /** @file - This instance uses This iinstance Supervisor mode STVEC CSR to + This instance uses Supervisor mode STVEC CSR to get/set the pointer of firmware context. =20 - Copyright (c) 2021 Hewlett Packard Enterprise Development LP. All rights= reserved.
+ Copyright (c) 2021-2022 Hewlett Packard Enterprise Development LP. All r= ights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent **/ --=20 2.31.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#85956): https://edk2.groups.io/g/devel/message/85956 Mute This Topic: https://groups.io/mt/88601631/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-