From nobody Mon Feb 9 06:00:30 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+85954+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85954+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=hpe.com ARC-Seal: i=1; a=rsa-sha256; t=1642838107; cv=none; d=zohomail.com; s=zohoarc; b=Z8nkQdxTYBdOCvME3R58EXVWA5jPoIzLBvzooYJ3blozmWelXM3bY+3Eerqw7VXLrN8X+7j4f4x5NdA/NTAvLNRcob6hdYqbRTjj3Hqz5vZB7dh2Bc43BYuFLy/8cVnqWfd4SVNRsJxpv+sNcaue4O0COCXBbAafSxeDz3ru0Fo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1642838107; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=ni1aw2U3ei32q26G6SgvlojJM8QHSj1W0xVgQ8WPiuw=; b=HoZlLz0FaQc8bC/8ZRNxLwH0bQYenfHSmUvAfG8ijiaavQ1IjAvjp8A0dXs9IcjRta3Ipvyg3vNj19Uc/oxHQr3uTJ2jMsqCJe0wBRSqdI2NHBuyn0mPhDn3xBijuJ5KF7sWW0YAtkC4xG9AyvGaUSZRJlU7LlyY/+NCJjHMjfQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85954+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1642838107024623.1216745237507; Fri, 21 Jan 2022 23:55:07 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id wkM9YY1788612xL063zBBENr; Fri, 21 Jan 2022 23:55:06 -0800 X-Received: from mx0b-002e3701.pphosted.com (mx0b-002e3701.pphosted.com [148.163.143.35]) by mx.groups.io with SMTP id smtpd.web11.6083.1642838105899121873 for ; Fri, 21 Jan 2022 23:55:06 -0800 X-Received: from pps.filterd (m0148664.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 20M6WQxS019065; Sat, 22 Jan 2022 07:55:05 GMT X-Received: from g9t5009.houston.hpe.com (g9t5009.houston.hpe.com [15.241.48.73]) by mx0b-002e3701.pphosted.com (PPS) with ESMTPS id 3drb2mgsxt-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 22 Jan 2022 07:55:05 +0000 X-Received: from g4t3433.houston.hpecorp.net (g4t3433.houston.hpecorp.net [16.208.49.245]) by g9t5009.houston.hpe.com (Postfix) with ESMTP id 5F2D055; Sat, 22 Jan 2022 07:55:04 +0000 (UTC) X-Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g4t3433.houston.hpecorp.net (Postfix) with ESMTP id 4D1F245; Sat, 22 Jan 2022 07:55:03 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Daniel Schaefer , Sunil V L Subject: [edk2-devel] [edk2-platforms][PATCH V2 09/14] RISC-V/ProcessorPkg: Address Core CI ECC errors. Date: Sat, 22 Jan 2022 14:53:13 +0800 Message-Id: <20220122065318.21808-10-abner.chang@hpe.com> In-Reply-To: <20220122065318.21808-1-abner.chang@hpe.com> References: <20220122065318.21808-1-abner.chang@hpe.com> MIME-Version: 1.0 X-Proofpoint-GUID: T4IcVdGgzPgxbyDaGvWvOVml0VpyfXAe X-Proofpoint-ORIG-GUID: T4IcVdGgzPgxbyDaGvWvOVml0VpyfXAe X-HPE-SCL: -1 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,abner.chang@hpe.com X-Gm-Message-State: FQCJvMQneB8TowWFfRAnkVopx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1642838106; bh=UfOa/6RE+9FlnSNoFizWJsOhl2Mkjq2NvPlCfYJ6T7g=; h=Cc:Date:From:Reply-To:Subject:To; b=q+dvlYEQy4yi3SV3K6+eLdkvLxOc2b2jQ2hN+vKaFDLrEk8M3MBu+ULGCZXtwsP/XM4 5c9leBOF7deDv2eG6tGqzmLp/iB4EEJdXN55G1M1Z6up0Z895MyrNM8I7Gj3Dz0vu395P 1ZDPnkI4YLQKNktxUTvIkvZhqw/wTFIwihA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1642838108162100007 Content-Type: text/plain; charset="utf-8" Signed-off-by: Abner Chang Cc: Daniel Schaefer Cc: Sunil V L --- .../RISC-V/ProcessorPkg/RiscVProcessorPkg.dec | 2 ++ .../RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc | 4 ++-- .../RiscVFirmwareContextSbiLib.inf | 2 +- .../Include/Library/MachineModeTimerLib.h | 15 +++++++++++++ .../Include/Library/RiscVPlatformTimerLib.h | 21 +++++++++++++++++++ .../ProcessorPkg/Include/OpensbiTypes.h | 6 +++--- .../Include/ProcessorSpecificHobData.h | 8 +++---- .../CpuExceptionHandlerLib.h | 2 +- .../Universal/SmbiosDxe/RiscVSmbiosDxe.c | 12 +++++------ .../RISC-V/ProcessorPkg/RiscVProcessorPkg.uni | 18 +++++++++++++++- 10 files changed, 72 insertions(+), 18 deletions(-) create mode 100644 Silicon/RISC-V/ProcessorPkg/Include/Library/MachineMode= TimerLib.h create mode 100644 Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVPlatfo= rmTimerLib.h diff --git a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec b/Silicon/RI= SC-V/ProcessorPkg/RiscVProcessorPkg.dec index 9c8b57cce3..045fc55212 100644 --- a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec +++ b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec @@ -26,6 +26,8 @@ RiscVCpuLib|Include/Library/RiscVCpuLib.h RiscVEdk2SbiLib|Include/Library/RiscVEdk2SbiLib.h RiscVFirmwareContextLib|Include/Library/RiscVFirmwareContextLib.h + RiscVPlatformTimerLib|Include/Library/RiscVPlatformTimerLib.h + MachineModeTimerLib|Include/Library/MachineModeTimerLib.h =20 [Guids] gUefiRiscVPkgTokenSpaceGuid =3D { 0x4261e9c8, 0x52c0, 0x4b34, { 0x85, 0= x3d, 0x48, 0x46, 0xea, 0xd3, 0xb7, 0x2c}} diff --git a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc b/Silicon/RI= SC-V/ProcessorPkg/RiscVProcessorPkg.dsc index 563b9e7088..0591cd6a6c 100644 --- a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc +++ b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc @@ -1,11 +1,11 @@ -#/** @file +## @file # RISC-V processor package. # # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right= s reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # -#**/ +# =20 ##########################################################################= ###### # diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib= /RiscVFirmwareContextSbiLib.inf b/Silicon/RISC-V/ProcessorPkg/Library/RiscV= FirmwareContextSbiLib/RiscVFirmwareContextSbiLib.inf index 168b705453..0edf781149 100644 --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVF= irmwareContextSbiLib.inf +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVF= irmwareContextSbiLib.inf @@ -12,7 +12,7 @@ [Defines] INF_VERSION =3D 0x0001001b BASE_NAME =3D RiscVFirmwareContextSbiLib - FILE_GUID =3D 3709E048-6794-427A-B728-BFE3FFD6D461 + FILE_GUID =3D 308117C0-400A-79C5-6ED4-AB9763A202E5 MODULE_TYPE =3D PEIM VERSION_STRING =3D 1.0 LIBRARY_CLASS =3D RiscVFirmwareContextLib|PEIM PEI_CORE diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/MachineModeTimerLi= b.h b/Silicon/RISC-V/ProcessorPkg/Include/Library/MachineModeTimerLib.h new file mode 100644 index 0000000000..a27391cca3 --- /dev/null +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/MachineModeTimerLib.h @@ -0,0 +1,15 @@ +/** @file + RISC-V Machine Mode Timer Library Definition + + Copyright (c) 2022, Hewlett Packard Enterprise Development LP. All right= s reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef MACHINE_MODE_TIMER_LIB_H_ +#define MACHINE_MODE_TIMER_LIB_H_ + +UINT64 +RiscVReadMachineTimerInterface (VOID); + +#endif diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVPlatformTimer= Lib.h b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVPlatformTimerLib.h new file mode 100644 index 0000000000..dcd8734eb5 --- /dev/null +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVPlatformTimerLib.h @@ -0,0 +1,21 @@ +/** @file + RISC-V Platform Timer library definitions. + + Copyright (c) 2022, Hewlett Packard Enterprise Development LP. All right= s reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef RISCV_PLATFORM_TIMER_LIB_H_ +#define RISCV_PLATFORM_TIMER_LIB_H_ + +UINT64 +RiscVReadMachineTimer (VOID); + +VOID +RiscVSetMachineTimerCmp (UINT64); + +UINT64 +RiscVReadMachineTimerCmp(VOID); + +#endif diff --git a/Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h b/Silicon/R= ISC-V/ProcessorPkg/Include/OpensbiTypes.h index bbf74e2a82..8a6ea97708 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h @@ -44,8 +44,8 @@ typedef UINT64 virtual_size_t; typedef UINT64 physical_addr_t; typedef UINT64 physical_size_t; =20 -#define true TRUE -#define false FALSE +#define true TRUE +#define false FALSE =20 #define __packed __attribute__((packed)) #define __noreturn __attribute__((noreturn)) @@ -70,7 +70,7 @@ typedef UINT64 physical_size_t; const typeof(((type *)0)->member) * __mptr =3D (ptr); \ (type *)((char *)__mptr - offsetof(type, member)); }) =20 -#define array_size(x) (sizeof(x) / sizeof((x)[0])) +#define array_size(x) (sizeof(x) / sizeof((x)[0])) =20 #define CLAMP(a, lo, hi) MIN(MAX(a, lo), hi) #define ROUNDUP(a, b) ((((a)-1) / (b) + 1) * (b)) diff --git a/Silicon/RISC-V/ProcessorPkg/Include/ProcessorSpecificHobData.h= b/Silicon/RISC-V/ProcessorPkg/Include/ProcessorSpecificHobData.h index 2f5847e53e..97285289f7 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/ProcessorSpecificHobData.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/ProcessorSpecificHobData.h @@ -1,7 +1,7 @@ /** @file Definition of Processor Specific Data HOB. =20 - Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All right= s reserved.
+ Copyright (c) 2019-2022, Hewlett Packard Enterprise Development LP. All = rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -24,7 +24,7 @@ /// RISC-V processor specific data HOB /// typedef struct { - EFI_GUID ParentPrcessorGuid; + EFI_GUID ParentProcessorGuid; UINTN ParentProcessorUid; EFI_GUID CoreGuid; VOID *Context; // The additional information of this core whi= ch @@ -37,7 +37,7 @@ typedef struct { /// RISC-V SMBIOS type 4 (Processor) GUID data HOB /// typedef struct { - EFI_GUID PrcessorGuid; + EFI_GUID ProcessorGuid; UINTN ProcessorUid; SMBIOS_TABLE_TYPE4 SmbiosType4Processor; UINT16 EndingZero; @@ -75,7 +75,7 @@ typedef struct { /// RISC-V SMBIOS type 7 (Cache) GUID data HOB /// typedef struct { - EFI_GUID PrcessorGuid; + EFI_GUID ProcessorGuid; UINTN ProcessorUid; SMBIOS_TABLE_TYPE7 SmbiosType7Cache; UINT16 EndingZero; diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExcep= tionHandlerLib.h b/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/Cp= uExceptionHandlerLib.h index 3e480e9b09..b316510020 100644 --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHan= dlerLib.h +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHan= dlerLib.h @@ -1,4 +1,4 @@ -/**@file +/** @file =20 RISC-V Exception Handler library definition file. =20 diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe= .c b/Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.c index b30f9d7f6a..14f62c4036 100644 --- a/Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.c +++ b/Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.c @@ -1,7 +1,7 @@ /** @file RISC-V generic SMBIOS DXE driver to build up SMBIOS type 4, type 7 and t= ype 44 records. =20 - Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All right= s reserved.
+ Copyright (c) 2019-2022, Hewlett Packard Enterprise Development LP. All = rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -33,7 +33,7 @@ BuildSmbiosType7 ( EFI_STATUS Status; SMBIOS_HANDLE Handle; =20 - if (!CompareGuid (&Type4HobData->PrcessorGuid, &Type7DataHob->PrcessorGu= id) || + if (!CompareGuid (&Type4HobData->ProcessorGuid, &Type7DataHob->Processor= Guid) || Type4HobData->ProcessorUid !=3D Type7DataHob->ProcessorUid) { return EFI_INVALID_PARAMETER; } @@ -48,7 +48,7 @@ BuildSmbiosType7 ( return Status; } DEBUG ((DEBUG_INFO, "SMBIOS Type 7 was added. SMBIOS Handle: 0x%x\n", Ha= ndle)); - DEBUG ((DEBUG_VERBOSE, " Cache belone to processor GUID: %g\n", &Typ= e7DataHob->PrcessorGuid)); + DEBUG ((DEBUG_VERBOSE, " Cache belone to processor GUID: %g\n", &Typ= e7DataHob->ProcessorGuid)); DEBUG ((DEBUG_VERBOSE, " Cache belone processor UID: %d\n", Type7Da= taHob->ProcessorUid)); DEBUG ((DEBUG_VERBOSE, " =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D\n")); DEBUG ((DEBUG_VERBOSE, " Socket Designation: %d\n", Type7DataHob->Sm= biosType7Cache.SocketDesignation)); @@ -90,7 +90,7 @@ BuildSmbiosType4 ( EFI_STATUS Status; =20 DEBUG ((DEBUG_INFO, "Building Type 4.\n")); - DEBUG ((DEBUG_INFO, " Processor GUID: %g\n", &Type4HobData->PrcessorG= uid)); + DEBUG ((DEBUG_INFO, " Processor GUID: %g\n", &Type4HobData->Processor= Guid)); DEBUG ((DEBUG_INFO, " Processor UUID: %d\n", Type4HobData->ProcessorU= id)); =20 Type4HobData->SmbiosType4Processor.L1CacheHandle =3D RISC_V_CACHE_INFO_N= OT_PROVIDED; @@ -193,7 +193,7 @@ BuildSmbiosType44 ( EFI_STATUS Status; =20 DEBUG ((DEBUG_INFO, "Building Type 44 for...\n")); - DEBUG ((DEBUG_VERBOSE, " Processor GUID: %g\n", &Type4HobData->Prces= sorGuid)); + DEBUG ((DEBUG_VERBOSE, " Processor GUID: %g\n", &Type4HobData->Proce= ssorGuid)); DEBUG ((DEBUG_VERBOSE, " Processor UUID: %d\n", Type4HobData->Proces= sorUid)); =20 GuidHob =3D (EFI_HOB_GUID_TYPE *)GetFirstGuidHob ((EFI_GUID *)PcdGetPtr(= PcdProcessorSpecificDataGuidHobGuid)); @@ -206,7 +206,7 @@ BuildSmbiosType44 ( // do { ProcessorSpecificData =3D (RISC_V_PROCESSOR_SPECIFIC_HOB_DATA *)GET_GU= ID_HOB_DATA (GuidHob); - if (!CompareGuid (&ProcessorSpecificData->ParentPrcessorGuid, &Type4Ho= bData->PrcessorGuid) || + if (!CompareGuid (&ProcessorSpecificData->ParentProcessorGuid, &Type4H= obData->ProcessorGuid) || ProcessorSpecificData->ParentProcessorUid !=3D Type4HobData->Process= orUid) { GuidHob =3D GetNextGuidHob((EFI_GUID *)PcdGetPtr(PcdProcessorSpecifi= cDataGuidHobGuid), GET_NEXT_HOB(GuidHob)); if (GuidHob =3D=3D NULL) { diff --git a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.uni b/Silicon/RI= SC-V/ProcessorPkg/RiscVProcessorPkg.uni index 83da92fe40..db519c42dd 100644 --- a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.uni +++ b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.uni @@ -8,6 +8,22 @@ // **/ =20 #string STR_PACKAGE_ABSTRACT #language en-US "Provides UEFI com= patible RISC-V processor modules and libraries" - #string STR_PACKAGE_DESCRIPTION #language en-US "This Package prov= ides UEFI compatible RISC-V processor modules and libraries." =20 +#string STR_gUefiRiscVPkgTokenSpaceGuid_PcdProcessorSpecificDataGuidHobGui= d_PROMPT #language en-US "Processor Specific Data HOB GUID" +#string STR_gUefiRiscVPkgTokenSpaceGuid_PcdProcessorSpecificDataGuidHobGui= d_HELP #language en-US "This is the GUID definition of HOB that passes= the " + = "processor specific data to DXE phase." +#string STR_gUefiRiscVPkgTokenSpaceGuid_PcdProcessorSmbiosGuidHobGuid_PROM= PT #language en-US "RISC-V SMBIOS Data HOB GUID" +#string STR_gUefiRiscVPkgTokenSpaceGuid_PcdProcessorSmbiosGuidHobGuid_HELP= #language en-US "This is the GUID definition of HOB that passes= RISC-V SMBIOS " + = "Data to DXE phase." +#string STR_gUefiRiscVPkgTokenSpaceGuid_PcdProcessorSmbiosType4GuidHobGuid= _PROMPT #language en-US "RISC-V SMBIOS Type 4 Data HOB GUID" +#string STR_gUefiRiscVPkgTokenSpaceGuid_PcdProcessorSmbiosType4GuidHobGuid= _HELP #language en-US "This is the GUID definition of HOB that passes= RISC-V SMBIOS " + = "Type 4 information to DXE phase for building up SMBIOS record." +#string STR_gUefiRiscVPkgTokenSpaceGuid_PcdProcessorSmbiosType7GuidHobGuid= _PROMPT #language en-US "RISC-V SMBIOS Type 7 Data HOB GUID" +#string STR_gUefiRiscVPkgTokenSpaceGuid_PcdProcessorSmbiosType7GuidHobGuid= _HELP #language en-US "This is the GUID definition of HOB that passes= RISC-V SMBIOS " + = "Type 7 information to DXE phase for building up SMBIOS record." +#string STR_gUefiRiscVPkgTokenSpaceGuid_PcdRiscVMachineTimerTickInNanoSeco= nd_PROMPT #language en-US "RISC-V Machine Mode Timer Duration" +#string STR_gUefiRiscVPkgTokenSpaceGuid_PcdRiscVMachineTimerTickInNanoSeco= nd_HELP #language en-US "RISC-V Machine Mode Timer Duration in nanoseco= nd." +#string STR_gUefiRiscVPkgTokenSpaceGuid_PcdRiscVMachineTimerFrequencyInHer= z_PROMPT #language en-US "RISC-V Machine Mode Timer frequency." +#string STR_gUefiRiscVPkgTokenSpaceGuid_PcdRiscVMachineTimerFrequencyInHer= z_HELP #language en-US "RISC-V Machine Mode Timer frequency in Hertz" + --=20 2.31.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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