From nobody Fri Apr 26 08:44:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+85248+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85248+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1641102586; cv=none; d=zohomail.com; s=zohoarc; b=K391EzFLwNo7+3mt4zJ5fQnTI5GhyREkYTX51ioNk03HSbX6z3xv0ic8MuOOxhynK7zk0ofwuGa2qH5b0C/+rl0+x2jWmdoemGbR51qZCqCBCT89+nzFcLvXuXGRGTt8O1ZuixCyp1rI7EVH9kfXsPUlTFFyprz+YAn5Ne+ewgM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1641102586; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=h24uiLVjAaKCyBXkmMlYALP0bKlHr9nT8W4jcEHPizs=; b=IUvcZvOIa30IjBCeZLaPkrtKCATyE/EyW5Aj1ovYHgI6fWt5WJv18GqxTE5OfM2dAIZqx3s/5uA7MAHU3VKOkhhOMMN/l+G6uc/6CpYOkF3RYrrHDfQIT7NzCveZBLkVSXhuIHNbRnCj1iVUFXjDolAOX9OVaHpiDXJKYOy9pHw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85248+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1641102584540193.87629350464488; Sat, 1 Jan 2022 21:49:44 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id tb9gYY1788612xU88STD9FNo; Sat, 01 Jan 2022 21:49:44 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.9371.1641102581596363212 for ; Sat, 01 Jan 2022 21:49:41 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0AC5AED1; Sat, 1 Jan 2022 21:49:41 -0800 (PST) X-Received: from u200856.usa.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A318C3F5A1; Sat, 1 Jan 2022 21:49:40 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: pete@akeo.ie, ardb+tianocore@kernel.org, leif@nuviainc.com, awarkentin@vmware.com, Sunny.Wang@arm.com, samer.el-haj-mahmoud@arm.com, mariobalanica02@gmail.com, Jeremy Linton , Ard Biesheuvel Subject: [edk2-devel] [PATCH V2 01/10] Platform/RaspberryPi: Cleanup menu visibility Date: Sat, 1 Jan 2022 23:49:15 -0600 Message-Id: <20220102054924.1195762-2-jeremy.linton@arm.com> In-Reply-To: <20220102054924.1195762-1-jeremy.linton@arm.com> References: <20220102054924.1195762-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: LpAzeaesDYJlVfqKpwV8tvMix1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1641102584; bh=yjCzIeXTHr41gY0xyjG3R7uHw1vIQR9VsiGKAO3LGAU=; h=Cc:Date:From:Reply-To:Subject:To; b=BXAhI/KFFRmpI7SD6lSkru3gQHNPoVKkHnwOscuQc7VEEFmqqsl9Q+0zBo3Xhpfgjpd sD+Oliv2ZxkP9kvBu/UzTESeX9R8JXpGMYaTRc7nOGpokglOocZ3s980huTp2Larg49pn wEyBDwC4FmkYSNLrWkfWHqEFlcVDZoAVf1Q= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1641103489118100001 Content-Type: text/plain; charset="utf-8" Lets allow some of these options to change when the system is in ACPI+DT mode. Plus the fan temp should be disabled when ACPI isn't enabled. Tested-by: Ard Biesheuvel Signed-off-by: Jeremy Linton Tested-by: 0n0w1c --- Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr b/Plat= form/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr index e8bf16312d..f668b7a553 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr @@ -196,7 +196,7 @@ formset endoneof; =20 #if (RPI_MODEL =3D=3D 4) - grayoutif NOT ideqval SystemTableMode.Mode =3D=3D SYSTEM_TABLE_MOD= E_ACPI; + grayoutif ideqval SystemTableMode.Mode =3D=3D SYSTEM_TABLE_MODE_DT; oneof varid =3D FanOnGpio.Enabled, prompt =3D STRING_TOKEN(STR_ADVANCED_FANONGPIO_PROMPT), help =3D STRING_TOKEN(STR_ADVANCED_FANONGPIO_HELP), @@ -207,7 +207,7 @@ formset endoneof; endif; =20 - grayoutif ideqval FanOnGpio.Enabled =3D=3D 0; + grayoutif ideqval FanOnGpio.Enabled =3D=3D 0 OR ideqval SystemTabl= eMode.Mode =3D=3D SYSTEM_TABLE_MODE_DT; numeric varid =3D FanTemp.Value, prompt =3D STRING_TOKEN(STR_ADVANCED_FANTEMP_PROMPT), help =3D STRING_TOKEN(STR_ADVANCED_FANTEMP_HELP), @@ -219,7 +219,7 @@ formset endif; =20 suppressif ideqval XhciPci.Value =3D=3D 2; - grayoutif NOT ideqval SystemTableMode.Mode =3D=3D SYSTEM_TABLE_M= ODE_ACPI; + grayoutif ideqval SystemTableMode.Mode =3D=3D SYSTEM_TABLE_MODE_= DT; oneof varid =3D XhciPci.Value, prompt =3D STRING_TOKEN(STR_ADVANCED_XHCIPCI_PROMPT), help =3D STRING_TOKEN(STR_ADVANCED_XHCIPCI_HELP), --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#85248): https://edk2.groups.io/g/devel/message/85248 Mute This Topic: https://groups.io/mt/88087662/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 08:44:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+85250+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85250+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1641102585; cv=none; d=zohomail.com; s=zohoarc; b=G2HoDelr9ie39RN7ZTW0pRiA+ARU2mfzjZoSWK6grs3Xp8sGokXYAAK9J7rs03aUp3FyPDAGiy6ZhnegVIjgwDSODVJfrGe9R/w5nz6DsZGPRdhvOzRRj/HW0ng7niFmEoi2qjl/Wt0LDoNKtCAqgvubu36BszW/KXj5qVYWPug= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1641102585; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=Pw7onDoHMe6+xv89xgFaKjllm2sfaNN8hugcVdVAnIA=; b=mo2CQdsOrh/Mztveh+6fnQWx3zCRiAGP68JPn2B4qbkpT/fYCOIlt32Ce0OhqSSUqaIGsypNHtvDVqKgsb2oUj0vlo1raojtLKxf+VhSKMArUdsO5XsGlijfinDF3kMe7SmRCZS6WDJ1T2xQSdo+HbVhbSPUEF/DA/i+oipHNQ4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85250+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1641102585644838.107173801146; Sat, 1 Jan 2022 21:49:45 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id NUpMYY1788612xEVWxlfA6VH; Sat, 01 Jan 2022 21:49:45 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.9312.1641102581915220614 for ; Sat, 01 Jan 2022 21:49:42 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 72A77106F; Sat, 1 Jan 2022 21:49:41 -0800 (PST) X-Received: from u200856.usa.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 163C23F5A1; Sat, 1 Jan 2022 21:49:41 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: pete@akeo.ie, ardb+tianocore@kernel.org, leif@nuviainc.com, awarkentin@vmware.com, Sunny.Wang@arm.com, samer.el-haj-mahmoud@arm.com, mariobalanica02@gmail.com, Jeremy Linton , Ard Biesheuvel Subject: [edk2-devel] [PATCH V2 02/10] Platform/RaspberryPi: Give the user control over the XHCI mailbox Date: Sat, 1 Jan 2022 23:49:16 -0600 Message-Id: <20220102054924.1195762-3-jeremy.linton@arm.com> In-Reply-To: <20220102054924.1195762-1-jeremy.linton@arm.com> References: <20220102054924.1195762-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: F3mcyi3B9t7HF6ldwHCVLLvjx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1641102585; bh=9WP5wMdPwcb/A5hevTTsFliqLVFuOJDima2lA5nVPx0=; h=Cc:Date:From:Reply-To:Subject:To; b=P9x6eEiFiSN8Ox+bEgxO/41OXIRXcDyYpy7MAMzna9/DmIsLKZhIEZ7iQVB8GXfKKn3 8IODhrvBrZdVd/Vswsu4GaWiew765mvSWRoV5s2FOSIr6ooEnW+yd6nVHlnUOkNtYxsrP lWlC7oBUhIVZ4HzrjhlGRigob6WauDCWzZ0= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1641102587680100010 Content-Type: text/plain; charset="utf-8" Its a complete tossup whether removing the mailbox call after we have set up the XHCI works for a given kernel+distro in DT mode. So lets give users which want to try DT the option of flipping this on/off. Users that don't want to have to deal with DT, can use ACPI. Tested-by: Ard Biesheuvel Signed-off-by: Jeremy Linton Tested-by: 0n0w1c --- Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 10 ++++++++++ Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf | 1 + Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni | 5 +++++ Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr | 15 +++++++++++++= ++ Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c | 4 ++++ Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf | 1 + Platform/RaspberryPi/RPi3/RPi3.dsc | 6 ++++++ Platform/RaspberryPi/RPi4/RPi4.dsc | 7 +++++++ Platform/RaspberryPi/RaspberryPi.dec | 1 + 9 files changed, 50 insertions(+) diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platform/= RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c index 415d99fadb..bdabdec7a5 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c @@ -297,6 +297,16 @@ SetupVariables ( Status =3D PcdSet32S (PcdXhciPci, 1); ASSERT_EFI_ERROR (Status); } + + Size =3D sizeof (UINT32); + Status =3D gRT->GetVariable (L"XhciReload", + &gConfigDxeFormSetGuid, + NULL, &Size, &Var32); + if (EFI_ERROR (Status)) { + Status =3D PcdSet32S (PcdXhciReload, PcdGet32 (PcdXhciReload)); + ASSERT_EFI_ERROR (Status); + } + } } else { /* diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf b/Platfor= m/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf index e6e22ad82e..ff182e831d 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf @@ -95,6 +95,7 @@ gRaspberryPiTokenSpaceGuid.PcdFanTemp gRaspberryPiTokenSpaceGuid.PcdUartInUse gRaspberryPiTokenSpaceGuid.PcdXhciPci + gRaspberryPiTokenSpaceGuid.PcdXhciReload =20 [Depex] gPcdProtocolGuid AND gRaspberryPiFirmwareProtocolGuid diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni b/Plat= form/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni index 5ec17072c3..8130638876 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni @@ -62,6 +62,11 @@ #string STR_ADVANCED_XHCIPCI_XHCI #language en-US "XHCI" #string STR_ADVANCED_XHCIPCI_PCIE #language en-US "PCIe" =20 +#string STR_ADVANCED_XHCIRELOAD_PROMPT #language en-US "DT Reload XHCI fi= rmware" +#string STR_ADVANCED_XHCIRELOAD_HELP #language en-US "OS should reload = XHCI firmware on reset" +#string STR_ADVANCED_XHCIRELOAD_DISABLE #language en-US "Disabled" +#string STR_ADVANCED_XHCIRELOAD_RELOAD #language en-US "Reload" + #string STR_ADVANCED_ASSET_TAG_PROMPT #language en-US "Asset Tag" #string STR_ADVANCED_ASSET_TAG_HELP #language en-US "Set the system Asse= t Tag" =20 diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr b/Plat= form/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr index f668b7a553..f13b70711d 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr @@ -61,6 +61,11 @@ formset name =3D XhciPci, guid =3D CONFIGDXE_FORM_SET_GUID; =20 + efivarstore ADVANCED_XHCIPCI_VARSTORE_DATA, + attribute =3D EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME= _ACCESS | EFI_VARIABLE_NON_VOLATILE, + name =3D XhciReload, + guid =3D CONFIGDXE_FORM_SET_GUID; + efivarstore SYSTEM_TABLE_MODE_VARSTORE_DATA, attribute =3D EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME= _ACCESS | EFI_VARIABLE_NON_VOLATILE, name =3D SystemTableMode, @@ -228,6 +233,16 @@ formset option text =3D STRING_TOKEN(STR_ADVANCED_XHCIPCI_PCIE), val= ue =3D 1, flags =3D 0; endoneof; endif; + + grayoutif ideqval SystemTableMode.Mode =3D=3D SYSTEM_TABLE_MODE_= ACPI; + oneof varid =3D XhciReload.Value, + prompt =3D STRING_TOKEN(STR_ADVANCED_XHCIRELOAD_PROMPT), + help =3D STRING_TOKEN(STR_ADVANCED_XHCIRELOAD_HELP), + flags =3D NUMERIC_SIZE_4 | INTERACTIVE | RESET_REQUIRE= D, + option text =3D STRING_TOKEN(STR_ADVANCED_XHCIRELOAD_DISABLE= ), value =3D 0, flags =3D DEFAULT; + option text =3D STRING_TOKEN(STR_ADVANCED_XHCIRELOAD_RELOAD)= , value =3D 1, flags =3D 0; + endoneof; + endif; endif; #endif string varid =3D AssetTag.AssetTag, diff --git a/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c b/Platform/Raspbe= rryPi/Drivers/FdtDxe/FdtDxe.c index e72d132b18..a808b1bf8c 100644 --- a/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c +++ b/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c @@ -375,6 +375,10 @@ SyncPcie ( return EFI_NOT_FOUND; } =20 + if (PcdGet32 (PcdXhciReload) !=3D 1) { + return EFI_SUCCESS; + } + /* * Now that we are always running without DMA translation, and with a 3G * limit, there shouldn't be a need to reset/reload the XHCI. The diff --git a/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf b/Platform/Rasp= berryPi/Drivers/FdtDxe/FdtDxe.inf index 26f84e5940..d9fb6ee480 100644 --- a/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf +++ b/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf @@ -47,3 +47,4 @@ =20 [Pcd] gRaspberryPiTokenSpaceGuid.PcdSystemTableMode + gRaspberryPiTokenSpaceGuid.PcdXhciReload diff --git a/Platform/RaspberryPi/RPi3/RPi3.dsc b/Platform/RaspberryPi/RPi3= /RPi3.dsc index 6ab5d1ae6d..9b00327002 100644 --- a/Platform/RaspberryPi/RPi3/RPi3.dsc +++ b/Platform/RaspberryPi/RPi3/RPi3.dsc @@ -526,6 +526,12 @@ # gRaspberryPiTokenSpaceGuid.PcdXhciPci|L"XhciPci"|gConfigDxeFormSetGuid|0= x0|0 =20 + # DT contains XHCI quirk node (not valid on rpi3) + # + # 0 - DISABLED + # + gRaspberryPiTokenSpaceGuid.PcdXhciReload|L"XhciReload"|gConfigDxeFormSet= Guid|0x0|0 + # # Common UEFI ones. # diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4= /RPi4.dsc index 44ed60ab2f..6de4407749 100644 --- a/Platform/RaspberryPi/RPi4/RPi4.dsc +++ b/Platform/RaspberryPi/RPi4/RPi4.dsc @@ -544,6 +544,13 @@ # gRaspberryPiTokenSpaceGuid.PcdXhciPci|L"XhciPci"|gConfigDxeFormSetGuid|0= x0|0 =20 + # DT contains XHCI quirk node + # + # 0 - No reload + # 1 - Yes, DT has Reload + # + gRaspberryPiTokenSpaceGuid.PcdXhciReload|L"XhciReload"|gConfigDxeFormSet= Guid|0x0|0 + # # Common UEFI ones. # diff --git a/Platform/RaspberryPi/RaspberryPi.dec b/Platform/RaspberryPi/Ra= spberryPi.dec index 797be59274..c50ebdcf77 100644 --- a/Platform/RaspberryPi/RaspberryPi.dec +++ b/Platform/RaspberryPi/RaspberryPi.dec @@ -72,3 +72,4 @@ gRaspberryPiTokenSpaceGuid.PcdMmcEnableDma|0|UINT32|0x0000001F gRaspberryPiTokenSpaceGuid.PcdUartInUse|1|UINT32|0x00000021 gRaspberryPiTokenSpaceGuid.PcdXhciPci|0|UINT32|0x00000022 + gRaspberryPiTokenSpaceGuid.PcdXhciReload|0|UINT32|0x00000023 --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#85250): https://edk2.groups.io/g/devel/message/85250 Mute This Topic: https://groups.io/mt/88087664/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 08:44:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+85251+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85251+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1641102586; cv=none; d=zohomail.com; s=zohoarc; b=ms+lbyApP62helxyp1Jhp8N7DtjImDQhEj3fhwKCzKb86HsB7FWI0RSs0xRoUrmBPZpp5aDzGSd3krFg8m/mLQViRBKWduXEw25SDE2NKNdVUjJE6SRtfito3G5/LiLDYTTRIyMwqRE5XCW7GohoQbHYkmIExiLaTk0XS50cx4Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1641102586; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=oV2KldddZDYeDqUlyKpYRuSgpfurmCJJvffpaP6eG1s=; b=gV7dy8ArNtbpzZujGGzyrwXNCMUctU30ffLrOsti9UeQz1jBVzwQEF7lM3iFiqZJyJDe+pG5rKFa5WlEoLsXVDZWzQMxg7I80Sx5XZmlmH/h2XSJc3iLwv7ykpKpNf7u0j9KEK/clQsUvW5Y3Xzi3VoECQEhggl6iYKInmnbXcM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85251+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1641102586901670.5971862622422; Sat, 1 Jan 2022 21:49:46 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id opBcYY1788612xwgwcDzuIDm; Sat, 01 Jan 2022 21:49:46 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web08.9280.1641102582273272137 for ; Sat, 01 Jan 2022 21:49:42 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DF749113E; Sat, 1 Jan 2022 21:49:41 -0800 (PST) X-Received: from u200856.usa.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7E3403F5A1; Sat, 1 Jan 2022 21:49:41 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: pete@akeo.ie, ardb+tianocore@kernel.org, leif@nuviainc.com, awarkentin@vmware.com, Sunny.Wang@arm.com, samer.el-haj-mahmoud@arm.com, mariobalanica02@gmail.com, Jeremy Linton , Ard Biesheuvel Subject: [edk2-devel] [PATCH V2 03/10] Platform/RaspberryPi: Move GPIO/SPI/I2C to SSDT Date: Sat, 1 Jan 2022 23:49:17 -0600 Message-Id: <20220102054924.1195762-4-jeremy.linton@arm.com> In-Reply-To: <20220102054924.1195762-1-jeremy.linton@arm.com> References: <20220102054924.1195762-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: 6rQc6XSg3JHVdfve7APjnwqtx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1641102586; bh=cwWQvwsrZ5jn8ZjWwdLsqh7uhnSYJXub5jq85arG3k0=; h=Cc:Date:From:Reply-To:Subject:To; b=RcqDk5z1BlFsVav27zIZu2PmziTrV8XLq2XyxlQBm64iNO5kXhLPX6HkZgQB/EEp88l rntVWiaXyW/2YgwMka0jlCH8dBE+VFivfCvR/pKcj0mMA7ijXBXyKMiJaWCsUxKwrrKHK Id5XYvGoV2GJEXU+8znTh64OYM8JSHizDfQ= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1641102588166100013 Content-Type: text/plain; charset="utf-8" The UEFI firmware uses the GPIO port for the fan and real soon now the runtime SPI variable store. As such we need to be able to either isolate those devices from the OS or we risk clashing with OS's that reconfigure the GPIO pins. Ideally we would just rip this out and use _DSM() or just individual device power on/off methods to adjust the GPIO pins when needed. For now, lets leave it since windows at least knows about it. In the future we will decide whether the firmware is controlling something (SPI!) based on whether the user has enabled the GPIO block. Tested-by: Ard Biesheuvel Signed-off-by: Jeremy Linton Tested-by: 0n0w1c --- Platform/RaspberryPi/AcpiTables/AcpiTables.inf | 1 + Platform/RaspberryPi/AcpiTables/Dsdt.asl | 7 - Platform/RaspberryPi/AcpiTables/GpuDevs.asl | 126 ---------------- Platform/RaspberryPi/AcpiTables/SsdtGpio.asl | 159 +++++++++++++++++= ++++ Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 6 + 5 files changed, 166 insertions(+), 133 deletions(-) create mode 100644 Platform/RaspberryPi/AcpiTables/SsdtGpio.asl diff --git a/Platform/RaspberryPi/AcpiTables/AcpiTables.inf b/Platform/Rasp= berryPi/AcpiTables/AcpiTables.inf index da2a6db85f..3894d00565 100644 --- a/Platform/RaspberryPi/AcpiTables/AcpiTables.inf +++ b/Platform/RaspberryPi/AcpiTables/AcpiTables.inf @@ -40,6 +40,7 @@ SsdtThermal.asl Xhci.asl Pci.asl + SsdtGpio.asl =20 [Packages] ArmPkg/ArmPkg.dec diff --git a/Platform/RaspberryPi/AcpiTables/Dsdt.asl b/Platform/RaspberryP= i/AcpiTables/Dsdt.asl index b594d50bdf..08acc81d57 100644 --- a/Platform/RaspberryPi/AcpiTables/Dsdt.asl +++ b/Platform/RaspberryPi/AcpiTables/Dsdt.asl @@ -21,13 +21,6 @@ =20 #include "AcpiTables.h" =20 -#define BCM_ALT0 0x4 -#define BCM_ALT1 0x5 -#define BCM_ALT2 0x6 -#define BCM_ALT3 0x7 -#define BCM_ALT4 0x3 -#define BCM_ALT5 0x2 - // // The ASL compiler does not support argument arithmetic in functions // like QWordMemory (). So we need to instantiate dummy qword regions diff --git a/Platform/RaspberryPi/AcpiTables/GpuDevs.asl b/Platform/Raspber= ryPi/AcpiTables/GpuDevs.asl index 9750dc25c0..3399f0fc9a 100644 --- a/Platform/RaspberryPi/AcpiTables/GpuDevs.asl +++ b/Platform/RaspberryPi/AcpiTables/GpuDevs.asl @@ -203,56 +203,6 @@ Device (VCSM) } } =20 -// Description: GPIO -Device (GPI0) -{ - Name (_HID, "BCM2845") - Name (_CID, "BCM2845") - Name (_UID, 0x0) - Name (_CCA, 0x0) - Method (_STA) - { - Return(0xf) - } - Name (RBUF, ResourceTemplate () - { - MEMORY32FIXED (ReadWrite, 0, GPIO_LENGTH, RMEM) - Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) - { - BCM2386_GPIO_INTERRUPT0, BCM2386_GPIO_INTERRUPT1, - BCM2386_GPIO_INTERRUPT2, BCM2386_GPIO_INTERRUPT3 - } - }) - Method (_CRS, 0x0, Serialized) - { - MEMORY32SETBASE (RBUF, RMEM, RBAS, GPIO_OFFSET) - Return (^RBUF) - } -} - -// Description: I2C -Device (I2C1) -{ - Name (_HID, "BCM2841") - Name (_CID, "BCM2841") - Name (_UID, 0x1) - Name (_CCA, 0x0) - Method (_STA) - { - Return(0xf) - } - Name (RBUF, ResourceTemplate () - { - MEMORY32FIXED (ReadWrite, 0, BCM2836_I2C1_LENGTH, RMEM) - Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) { BCM2836_I2C1= _INTERRUPT } - PinFunction (Exclusive, PullUp, BCM_ALT0, "\\_SB.GDV0.GPI0", 0, Resour= ceConsumer, , ) { 2, 3 } - }) - Method (_CRS, 0x0, Serialized) - { - MEMORY32SETBASE (RBUF, RMEM, RBAS, BCM2836_I2C1_OFFSET) - Return (^RBUF) - } -} =20 // I2C2 is the HDMI DDC connection Device (I2C2) @@ -278,81 +228,6 @@ Device (I2C2) } } =20 -// SPI -Device (SPI0) -{ - Name (_HID, "BCM2838") - Name (_CID, "BCM2838") - Name (_UID, 0x0) - Name (_CCA, 0x0) - Method (_STA) - { - Return (0xf) - } - Name (RBUF, ResourceTemplate () - { - MEMORY32FIXED (ReadWrite, 0, BCM2836_SPI0_LENGTH, RMEM) - Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) { BCM2836_SPI0= _INTERRUPT } - PinFunction (Exclusive, PullDown, BCM_ALT0, "\\_SB.GDV0.GPI0", 0, Reso= urceConsumer, , ) { 9, 10, 11 } // MISO, MOSI, SCLK - PinFunction (Exclusive, PullUp, BCM_ALT0, "\\_SB.GDV0.GPI0", 0, Resour= ceConsumer, , ) { 8 } // CE0 - PinFunction (Exclusive, PullUp, BCM_ALT0, "\\_SB.GDV0.GPI0", 0, Resour= ceConsumer, , ) { 7 } // CE1 - }) - - Method (_CRS, 0x0, Serialized) - { - MEMORY32SETBASE (RBUF, RMEM, RBAS, BCM2836_SPI0_OFFSET) - Return (^RBUF) - } -} - -Device (SPI1) -{ - Name (_HID, "BCM2839") - Name (_CID, "BCM2839") - Name (_UID, 0x1) - Name (_CCA, 0x0) - Name (_DEP, Package() { \_SB.GDV0.RPIQ }) - Method (_STA) - { - Return (0xf) - } - Name (RBUF, ResourceTemplate () - { - MEMORY32FIXED (ReadWrite, 0, BCM2836_SPI1_LENGTH, RMEM) - Interrupt (ResourceConsumer, Level, ActiveHigh, Shared,) { BCM2836_SPI= 1_INTERRUPT } - PinFunction (Exclusive, PullDown, BCM_ALT4, "\\_SB.GDV0.GPI0", 0, Reso= urceConsumer, , ) { 19, 20, 21 } // MISO, MOSI, SCLK - PinFunction (Exclusive, PullDown, BCM_ALT4, "\\_SB.GDV0.GPI0", 0, Reso= urceConsumer, , ) { 16 } // CE2 - }) - - Method (_CRS, 0x0, Serialized) - { - MEMORY32SETBASE (RBUF, RMEM, RBAS, BCM2836_SPI1_OFFSET) - Return (^RBUF) - } -} - -// SPI2 has no pins on GPIO header -// Device (SPI2) -// { -// Name (_HID, "BCM2839") -// Name (_CID, "BCM2839") -// Name (_UID, 0x2) -// Name (_CCA, 0x0) -// Name (_DEP, Package() { \_SB.GDV0.RPIQ }) -// Method (_STA) -// { -// Return (0xf) // Disabled -// } -// Method (_CRS, 0x0, Serialized) -// { -// Name (RBUF, ResourceTemplate () -// { -// MEMORY32FIXED (ReadWrite, BCM2836_SPI2_BASE_ADDRESS, BCM2836_SPI2= _LENGTH, RMEM) -// Interrupt (ResourceConsumer, Level, ActiveHigh, Shared,) { BCM283= 6_SPI2_INTERRUPT } -// }) -// Return (RBUF) -// } -// } =20 // PWM Driver Device (PWM0) @@ -393,5 +268,4 @@ Device (PWM0) } =20 include ("Uart.asl") -include ("Rhpx.asl") include ("Sdhc.asl") diff --git a/Platform/RaspberryPi/AcpiTables/SsdtGpio.asl b/Platform/Raspbe= rryPi/AcpiTables/SsdtGpio.asl new file mode 100644 index 0000000000..38e8a54a8f --- /dev/null +++ b/Platform/RaspberryPi/AcpiTables/SsdtGpio.asl @@ -0,0 +1,159 @@ +/** @file + * + * Secondary System Description Table (SSDT) for the GPIO port + * + * Copyright (c) 2021, Arm Ltd. All rights reserved. + * + * SPDX-License-Identifier: BSD-2-Clause-Patent + * + **/ + +#include +#include +#include +#include + +#include "AcpiTables.h" + +#define BCM_ALT0 0x4 +#define BCM_ALT1 0x5 +#define BCM_ALT2 0x6 +#define BCM_ALT3 0x7 +#define BCM_ALT4 0x3 +#define BCM_ALT5 0x2 + +DefinitionBlock (__FILE__, "SSDT", 5, "RPIFDN", "RPI3GPIO", 2) +{ + External (\_SB_.GDV0, DeviceObj) + External (\_SB_.GDV0.RPIQ, DeviceObj) + Scope (\_SB_.GDV0) + { + include ("Rhpx.asl") + + // Description: GPIO + Device (GPI0) + { + Name (_HID, "BCM2845") + Name (_CID, "BCM2845") + Name (_UID, 0x0) + Name (_CCA, 0x0) + Method (_STA) + { + Return(0xf) + } + Name (RBUF, ResourceTemplate () + { + MEMORY32FIXED (ReadWrite, 0, GPIO_LENGTH, RMEM) + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) + { + BCM2386_GPIO_INTERRUPT0, BCM2386_GPIO_INTERRUPT1, + BCM2386_GPIO_INTERRUPT2, BCM2386_GPIO_INTERRUPT3 + } + }) + Method (_CRS, 0x0, Serialized) + { + MEMORY32SETBASE (RBUF, RMEM, RBAS, GPIO_OFFSET) + Return (^RBUF) + } + } + + // SPI + Device (SPI0) + { + Name (_HID, "BCM2838") + Name (_CID, "BCM2838") + Name (_UID, 0x0) + Name (_CCA, 0x0) + Method (_STA) + { + Return (0xf) + } + Name (RBUF, ResourceTemplate () + { + MEMORY32FIXED (ReadWrite, 0, BCM2836_SPI0_LENGTH, RMEM) + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) { BCM2836_= SPI0_INTERRUPT } + PinFunction (Exclusive, PullDown, BCM_ALT0, "\\_SB.GDV0.GPI0", 0, = ResourceConsumer, , ) { 9, 10, 11 } // MISO, MOSI, SCLK + PinFunction (Exclusive, PullUp, BCM_ALT0, "\\_SB.GDV0.GPI0", 0, Re= sourceConsumer, , ) { 8 } // CE0 + PinFunction (Exclusive, PullUp, BCM_ALT0, "\\_SB.GDV0.GPI0", 0, Re= sourceConsumer, , ) { 7 } // CE1 + }) + + Method (_CRS, 0x0, Serialized) + { + MEMORY32SETBASE (RBUF, RMEM, RBAS, BCM2836_SPI0_OFFSET) + Return (^RBUF) + } + } + + Device (SPI1) + { + Name (_HID, "BCM2839") + Name (_CID, "BCM2839") + Name (_UID, 0x1) + Name (_CCA, 0x0) + Name (_DEP, Package() { \_SB.GDV0.RPIQ }) + Method (_STA) + { + Return (0xf) + } + Name (RBUF, ResourceTemplate () + { + MEMORY32FIXED (ReadWrite, 0, BCM2836_SPI1_LENGTH, RMEM) + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared,) { BCM2836= _SPI1_INTERRUPT } + PinFunction (Exclusive, PullDown, BCM_ALT4, "\\_SB_.GDV0.GPI0", 0,= ResourceConsumer, , ) { 19, 20, 21 } // MISO, MOSI, SCLK + PinFunction (Exclusive, PullDown, BCM_ALT4, "\\_SB_.GDV0.GPI0", 0,= ResourceConsumer, , ) { 16 } // CE2 + }) + + Method (_CRS, 0x0, Serialized) + { + MEMORY32SETBASE (RBUF, RMEM, RBAS, BCM2836_SPI1_OFFSET) + Return (^RBUF) + } + } + + // SPI2 has no pins on GPIO header + // Device (SPI2) + // { + // Name (_HID, "BCM2839") + // Name (_CID, "BCM2839") + // Name (_UID, 0x2) + // Name (_CCA, 0x0) + // Name (_DEP, Package() { \_SB.GDV0.RPIQ }) + // Method (_STA) + // { + // Return (0xf) // Disabled + // } + // Method (_CRS, 0x0, Serialized) + // { + // Name (RBUF, ResourceTemplate () + // { + // MEMORY32FIXED (ReadWrite, BCM2836_SPI2_BASE_ADDRESS, BCM2836_SP= I2_LENGTH, RMEM) + // Interrupt (ResourceConsumer, Level, ActiveHigh, Shared,) { BCM2= 836_SPI2_INTERRUPT } + // }) + // Return (RBUF) + // } + // } + + Device (I2C1) + { + Name (_HID, "BCM2841") + Name (_CID, "BCM2841") + Name (_UID, 0x1) + Name (_CCA, 0x0) + Method (_STA) + { + Return(0xf) + } + Name (RBUF, ResourceTemplate () + { + MEMORY32FIXED (ReadWrite, 0, BCM2836_I2C1_LENGTH, RMEM) + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) { BCM2836_= I2C1_INTERRUPT } + PinFunction (Exclusive, PullUp, BCM_ALT0, "\\_SB_.GDV0.GPI0", 0, R= esourceConsumer, , ) { 2, 3 } + }) + Method (_CRS, 0x0, Serialized) + { + MEMORY32SETBASE (RBUF, RMEM, RBAS, BCM2836_I2C1_OFFSET) + Return (^RBUF) + } + } + } +} diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platform/= RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c index bdabdec7a5..d22ecb3128 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c @@ -838,6 +838,12 @@ STATIC CONST NAMESPACE_TABLES SdtTables[] =3D { NULL }, #endif + { + SIGNATURE_64 ('R', 'P', 'I', '3', 'G', 'P', 'I', 'O'), + 0, + 0, + NULL + }, { // DSDT SIGNATURE_64 ('R', 'P', 'I', 0, 0, 0, 0, 0), 0, --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#85251): https://edk2.groups.io/g/devel/message/85251 Mute This Topic: https://groups.io/mt/88087665/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 08:44:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+85252+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85252+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1641102587; cv=none; d=zohomail.com; s=zohoarc; b=elwZFiH72h15Rzd8JEJO1iImnAzDb8sZYOz4ttanjHurg4nVkSDciK010/9xE1MhL6mjEAb7/fZkopo3wV2GV6FrktjNtNM/D8hD86ZcAJSXIkHG1/KS2O7uROpBrqphzpQS3TwhlNTzEaJ0232tqPha/5JG/6gG83P7ZyQmx7Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1641102587; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=j47VbfsuThCfbQUOejrm8ljxpVTHktmMk417zLlaCA4=; b=U2vVAMIvVw8ObEveihLw/2vwGWKXeeN/7kPPj6zri2DBNPbM66lrsxhk1I5g86NXJEQIq1s24a7+iwKxlw4BOoZbhFqTAjZQw/5ib2nkZng+x9oMbPPeZHO7p+lSm95IpqZYlS8RUone/Ql8irBIFMC1TySYqSuASs3OwwfwJn0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85252+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1641102587225150.74018081122676; Sat, 1 Jan 2022 21:49:47 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id oSFJYY1788612xmZIRiG37Fv; Sat, 01 Jan 2022 21:49:46 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.9305.1641102583240960003 for ; Sat, 01 Jan 2022 21:49:43 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6B4D211D4; Sat, 1 Jan 2022 21:49:42 -0800 (PST) X-Received: from u200856.usa.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EFFE83F5A1; Sat, 1 Jan 2022 21:49:41 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: pete@akeo.ie, ardb+tianocore@kernel.org, leif@nuviainc.com, awarkentin@vmware.com, Sunny.Wang@arm.com, samer.el-haj-mahmoud@arm.com, mariobalanica02@gmail.com, Jeremy Linton , Ard Biesheuvel Subject: [edk2-devel] [PATCH V2 04/10] Platform/RaspberryPi: Add menu item to enable/disable GPIO Date: Sat, 1 Jan 2022 23:49:18 -0600 Message-Id: <20220102054924.1195762-5-jeremy.linton@arm.com> In-Reply-To: <20220102054924.1195762-1-jeremy.linton@arm.com> References: <20220102054924.1195762-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: t2yUVGHyQNCJgYIFDWFDHu7Gx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1641102586; bh=AkDd2sAsW6r2ycNinjMa0Pla17zUQ9e3d7GEzUANzqY=; h=Cc:Date:From:Reply-To:Subject:To; b=bNwTGJPlYXvMIFOhhYm+UOfYFWrpgZELVEIlOza5cWgjRSwTm4HZDpFySd4E/0ec6Aa Zt+yyW+0SnJsrfDx/HTbvZ83toCB1RgU1Gew6LbE3oE3mYNhA17UBSBt3HVJPHFT05zPA e1x973ZFiE/fXXrC0Jo5RWuGbAUyz8PlPyU= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1641102589689100017 Content-Type: text/plain; charset="utf-8" Now that the GPIO devices are in their own SSDT lets add a menu item for the rpi4 to enable/disable it. For the rpi3 the SSDT is always exported. Tested-by: Ard Biesheuvel Signed-off-by: Jeremy Linton Tested-by: 0n0w1c --- Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 17 +++++++++++++= +++- Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf | 1 + Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni | 5 +++++ Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr | 15 +++++++++++++= ++ Platform/RaspberryPi/Include/ConfigVars.h | 4 ++++ Platform/RaspberryPi/RPi3/RPi3.dsc | 6 ++++++ Platform/RaspberryPi/RPi4/RPi4.dsc | 7 +++++++ Platform/RaspberryPi/RaspberryPi.dec | 1 + 8 files changed, 55 insertions(+), 1 deletion(-) diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platform/= RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c index d22ecb3128..de7eb769ea 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c @@ -308,12 +308,27 @@ SetupVariables ( } =20 } + + Size =3D sizeof (UINT32); + Status =3D gRT->GetVariable (L"EnableGpio", + &gConfigDxeFormSetGuid, + NULL, &Size, &Var32); + if (EFI_ERROR (Status)) { + Status =3D PcdSet32S (PcdEnableGpio, PcdGet32 (PcdEnableGpio)); + ASSERT_EFI_ERROR (Status); + } + } else { /* * Disable PCIe and XHCI */ Status =3D PcdSet32S (PcdXhciPci, 0); ASSERT_EFI_ERROR (Status); + /* + * Enable GPIO + */ + Status =3D PcdSet32S (PcdEnableGpio, 1); + ASSERT_EFI_ERROR (Status); } =20 Size =3D sizeof (AssetTagVar); @@ -840,7 +855,7 @@ STATIC CONST NAMESPACE_TABLES SdtTables[] =3D { #endif { SIGNATURE_64 ('R', 'P', 'I', '3', 'G', 'P', 'I', 'O'), - 0, + PcdToken (PcdEnableGpio), 0, NULL }, diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf b/Platfor= m/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf index ff182e831d..1cba4a2a22 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf @@ -96,6 +96,7 @@ gRaspberryPiTokenSpaceGuid.PcdUartInUse gRaspberryPiTokenSpaceGuid.PcdXhciPci gRaspberryPiTokenSpaceGuid.PcdXhciReload + gRaspberryPiTokenSpaceGuid.PcdEnableGpio =20 [Depex] gPcdProtocolGuid AND gRaspberryPiFirmwareProtocolGuid diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni b/Plat= form/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni index 8130638876..fb06d46a61 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni @@ -67,6 +67,11 @@ #string STR_ADVANCED_XHCIRELOAD_DISABLE #language en-US "Disabled" #string STR_ADVANCED_XHCIRELOAD_RELOAD #language en-US "Reload" =20 +#string STR_ADVANCED_ENABLEGPIO_PROMPT #language en-US "Export GPIO devic= es to OS" +#string STR_ADVANCED_ENABLEGPIO_HELP #language en-US "OS can see the GP= IO device and some low level SPI and I2C interfaces. Enabling this option w= ill disable runtime variable support." +#string STR_ADVANCED_ENABLEGPIO_DISABLE #language en-US "Disabled" +#string STR_ADVANCED_ENABLEGPIO_ENABLE #language en-US "Enable" + #string STR_ADVANCED_ASSET_TAG_PROMPT #language en-US "Asset Tag" #string STR_ADVANCED_ASSET_TAG_HELP #language en-US "Set the system Asse= t Tag" =20 diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr b/Plat= form/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr index f13b70711d..04eb0a15a2 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr @@ -66,6 +66,11 @@ formset name =3D XhciReload, guid =3D CONFIGDXE_FORM_SET_GUID; =20 + efivarstore ADVANCED_ENABLEGPIO_VARSTORE_DATA, + attribute =3D EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME= _ACCESS | EFI_VARIABLE_NON_VOLATILE, + name =3D EnableGpio, + guid =3D CONFIGDXE_FORM_SET_GUID; + efivarstore SYSTEM_TABLE_MODE_VARSTORE_DATA, attribute =3D EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME= _ACCESS | EFI_VARIABLE_NON_VOLATILE, name =3D SystemTableMode, @@ -244,6 +249,16 @@ formset endoneof; endif; endif; + + grayoutif ideqval SystemTableMode.Mode =3D=3D SYSTEM_TABLE_MODE_DT; + oneof varid =3D EnableGpio.Value, + prompt =3D STRING_TOKEN(STR_ADVANCED_ENABLEGPIO_PROMPT), + help =3D STRING_TOKEN(STR_ADVANCED_ENABLEGPIO_HELP), + flags =3D NUMERIC_SIZE_4 | INTERACTIVE | RESET_REQUIRED, + option text =3D STRING_TOKEN(STR_ADVANCED_ENABLEGPIO_DISABLE),= value =3D 0, flags =3D DEFAULT; + option text =3D STRING_TOKEN(STR_ADVANCED_ENABLEGPIO_ENABLE), = value =3D 1, flags =3D 0; + endoneof; + endif; #endif string varid =3D AssetTag.AssetTag, prompt =3D STRING_TOKEN(STR_ADVANCED_ASSET_TAG_PROMPT), diff --git a/Platform/RaspberryPi/Include/ConfigVars.h b/Platform/Raspberry= Pi/Include/ConfigVars.h index a5b32b5284..43a39891d4 100644 --- a/Platform/RaspberryPi/Include/ConfigVars.h +++ b/Platform/RaspberryPi/Include/ConfigVars.h @@ -81,6 +81,10 @@ typedef struct { } ADVANCED_XHCIPCI_VARSTORE_DATA; =20 typedef struct { + UINT32 Value; +} ADVANCED_ENABLEGPIO_VARSTORE_DATA; + +typedef struct { #define SYSTEM_TABLE_MODE_ACPI 0 #define SYSTEM_TABLE_MODE_BOTH 1 #define SYSTEM_TABLE_MODE_DT 2 diff --git a/Platform/RaspberryPi/RPi3/RPi3.dsc b/Platform/RaspberryPi/RPi3= /RPi3.dsc index 9b00327002..9db4d93735 100644 --- a/Platform/RaspberryPi/RPi3/RPi3.dsc +++ b/Platform/RaspberryPi/RPi3/RPi3.dsc @@ -532,6 +532,12 @@ # gRaspberryPiTokenSpaceGuid.PcdXhciReload|L"XhciReload"|gConfigDxeFormSet= Guid|0x0|0 =20 + # Export GPIO block to OS + # + # 1 - Yes (for legacy reasons) + # + gRaspberryPiTokenSpaceGuid.PcdEnableGpio|L"EnableGpio"|gConfigDxeFormSet= Guid|0x0|1 + # # Common UEFI ones. # diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4= /RPi4.dsc index 6de4407749..c918af6dab 100644 --- a/Platform/RaspberryPi/RPi4/RPi4.dsc +++ b/Platform/RaspberryPi/RPi4/RPi4.dsc @@ -551,6 +551,13 @@ # gRaspberryPiTokenSpaceGuid.PcdXhciReload|L"XhciReload"|gConfigDxeFormSet= Guid|0x0|0 =20 + # Export GPIO block to OS + # + # 0 - No + # 1 - Yes + # + gRaspberryPiTokenSpaceGuid.PcdEnableGpio|L"EnableGpio"|gConfigDxeFormSet= Guid|0x0|0 + # # Common UEFI ones. # diff --git a/Platform/RaspberryPi/RaspberryPi.dec b/Platform/RaspberryPi/Ra= spberryPi.dec index c50ebdcf77..97709f9b94 100644 --- a/Platform/RaspberryPi/RaspberryPi.dec +++ b/Platform/RaspberryPi/RaspberryPi.dec @@ -73,3 +73,4 @@ gRaspberryPiTokenSpaceGuid.PcdUartInUse|1|UINT32|0x00000021 gRaspberryPiTokenSpaceGuid.PcdXhciPci|0|UINT32|0x00000022 gRaspberryPiTokenSpaceGuid.PcdXhciReload|0|UINT32|0x00000023 + gRaspberryPiTokenSpaceGuid.PcdEnableGpio|0|UINT32|0x00000024 --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#85252): https://edk2.groups.io/g/devel/message/85252 Mute This Topic: https://groups.io/mt/88087666/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 08:44:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+85253+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85253+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1641102587; cv=none; d=zohomail.com; s=zohoarc; b=QqbHbTOnZs3cMzpeIMbh2HCBxfRDYZqIu2jVrJrTjdC3Br0DtLx9uc5QEyHzh9TViXi9ShXwTDAiWPPuUoisl5REB4KtkCqTxSWHDSLxWdKJYQJOmWKVKPVN/VpG4fLKdLmcCl6giX7F982Kq8yN//TAhx2XQCBcJw8KbNSpRQQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1641102587; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=pMyFOw5HXijaeituPzcA1EyCSTP6tqvxT1JffWzuyfg=; b=lhohA1nUHFey4kHGqVF7DRgDzNv3La7O15XPG7cN7HDJ7IrGDEZdC967o/vqRTpnVVYdYL3po7drT5mPBmsCgxo25Z4/oE5GcEeFHmha2jAS9JgW4t5cf9pTM3j9OhL/R8wXe5aLFigtdwwYlUS7XCHV4UbLH4u+jOj8IDSt8WM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85253+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 164110258777561.45919199816797; Sat, 1 Jan 2022 21:49:47 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id 911XYY1788612xnvyyXpAJtd; Sat, 01 Jan 2022 21:49:47 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web08.9281.1641102583262087145 for ; Sat, 01 Jan 2022 21:49:43 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E222212FC; Sat, 1 Jan 2022 21:49:42 -0800 (PST) X-Received: from u200856.usa.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 78FEB3F5A1; Sat, 1 Jan 2022 21:49:42 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: pete@akeo.ie, ardb+tianocore@kernel.org, leif@nuviainc.com, awarkentin@vmware.com, Sunny.Wang@arm.com, samer.el-haj-mahmoud@arm.com, mariobalanica02@gmail.com, Jeremy Linton , Ard Biesheuvel Subject: [edk2-devel] [PATCH V2 05/10] Platform/RaspberryPi: Add constants for controlling SPI Date: Sat, 1 Jan 2022 23:49:19 -0600 Message-Id: <20220102054924.1195762-6-jeremy.linton@arm.com> In-Reply-To: <20220102054924.1195762-1-jeremy.linton@arm.com> References: <20220102054924.1195762-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: Ne0iQLYMx6JE2r4MWXWK93h3x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1641102587; bh=akSHOOqCHucknvA1gJKtNJdfqiZRMArka+/5K82drgc=; h=Cc:Date:From:Reply-To:Subject:To; b=QegP41c2/1J8Y4GdyRuJ9IQ8qXpXa8IY1a5+Mw56IWdtOLT0im+JuU7pRbQpcrGMePJ rlNIQJzMj7huky4lyGWe9UnGuCNk6pUSonv2282V976JkbhGgc179U4PTKrUaE9HxZy7/ h+ANOBtkLhEaftIWhN3Tnx78GFjVHatPAnY= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1641102589703100018 Content-Type: text/plain; charset="utf-8" Add the #defines needed to access the SPI interface documented in the BCM2711 Peripheral guide chapter 8. Tested-by: Ard Biesheuvel Signed-off-by: Jeremy Linton Tested-by: 0n0w1c --- .../Bcm283x/Include/IndustryStandard/Bcm2836.h | 34 ++++++++++++++++++= ++++ 1 file changed, 34 insertions(+) diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h b/= Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h index a930c64af3..55a446a86c 100644 --- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h +++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h @@ -109,6 +109,40 @@ #define BCM2836_SPI2_LENGTH 0x00000040 #define BCM2836_SPI2_BASE_ADDRESS (BCM2836_SOC_R= EGISTERS + BCM2836_SPI2_OFFSET) =20 +/* SPI register offsets */ +#define BCM2835_SPI_CS 0x00 +#define BCM2835_SPI_FIFO 0x04 +#define BCM2835_SPI_CLK 0x08 +#define BCM2835_SPI_DLEN 0x0c +#define BCM2835_SPI_LTOH 0x10 +#define BCM2835_SPI_DC 0x14 + +/* Bitfields in CS */ +#define BCM2835_SPI_CS_LEN_LONG 0x02000000 +#define BCM2835_SPI_CS_DMA_LEN 0x01000000 +#define BCM2835_SPI_CS_CSPOL2 0x00800000 +#define BCM2835_SPI_CS_CSPOL1 0x00400000 +#define BCM2835_SPI_CS_CSPOL0 0x00200000 +#define BCM2835_SPI_CS_RXF 0x00100000 +#define BCM2835_SPI_CS_RXR 0x00080000 +#define BCM2835_SPI_CS_TXD 0x00040000 +#define BCM2835_SPI_CS_RXD 0x00020000 +#define BCM2835_SPI_CS_DONE 0x00010000 +#define BCM2835_SPI_CS_LEN 0x00002000 +#define BCM2835_SPI_CS_REN 0x00001000 +#define BCM2835_SPI_CS_ADCS 0x00000800 +#define BCM2835_SPI_CS_INTR 0x00000400 +#define BCM2835_SPI_CS_INTD 0x00000200 +#define BCM2835_SPI_CS_DMAEN 0x00000100 +#define BCM2835_SPI_CS_TA 0x00000080 +#define BCM2835_SPI_CS_CSPOL 0x00000040 +#define BCM2835_SPI_CS_CLEAR_RX 0x00000020 +#define BCM2835_SPI_CS_CLEAR_TX 0x00000010 +#define BCM2835_SPI_CS_CPOL 0x00000008 +#define BCM2835_SPI_CS_CPHA 0x00000004 +#define BCM2835_SPI_CS_CS_10 0x00000002 +#define BCM2835_SPI_CS_CS_01 0x00000001 + /* dma constants */ #define BCM2836_DMA0_OFFSET 0x00007000 #define BCM2836_DMA0_BASE_ADDRESS (BCM2836_SOC_R= EGISTERS + BCM2836_DMA0_OFFSET) --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#85253): https://edk2.groups.io/g/devel/message/85253 Mute This Topic: https://groups.io/mt/88087667/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 08:44:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+85254+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85254+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1641102588; cv=none; d=zohomail.com; s=zohoarc; b=kQNYjCuFuT3Ld8TQBHH6ynuyy6UidEkfOu5ZetlO++uizO61uWMHI+PRjQs1eUGWrZWAxI2zWL7RB+16ZAqFtI4fqaCML0rL0W+Ou61SYnzLtee/n0GTHC3c/d4uj/6dyHSg+sjCNuoqgqLZ8fbB7n4ATcMeozmaSN3Q3KzQWQY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1641102588; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=DK0QmbWi/tAwtsADO/AQP1SE4qV2yMPgj4/Jtr5D73U=; b=NYSxeOJF60BvHAl+yBEsVNR9DyCATRlW2uUTVqyAUpHqJk2Gg0W1VDpaF+kxH3MFFcBNBhfO0HWrhNQUcebF2ZVDtlH61lsKdIf+ZPje/nqBWBlvJY7NiLfKN1EdY1UW+5aruvwrDJDytkmYHrWOckj7pqRy/hgj7sZ7aftInFI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85254+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1641102588346309.03025660418996; Sat, 1 Jan 2022 21:49:48 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id is7JYY1788612xbagWrxBKnL; Sat, 01 Jan 2022 21:49:47 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.9372.1641102583711667127 for ; Sat, 01 Jan 2022 21:49:43 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 599191396; Sat, 1 Jan 2022 21:49:43 -0800 (PST) X-Received: from u200856.usa.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id ECFC73F5A1; Sat, 1 Jan 2022 21:49:42 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: pete@akeo.ie, ardb+tianocore@kernel.org, leif@nuviainc.com, awarkentin@vmware.com, Sunny.Wang@arm.com, samer.el-haj-mahmoud@arm.com, mariobalanica02@gmail.com, Jeremy Linton , Ard Biesheuvel Subject: [edk2-devel] [PATCH V2 06/10] Platform/RaspberryPi: Add mailbox cmd to control audio amp Date: Sat, 1 Jan 2022 23:49:20 -0600 Message-Id: <20220102054924.1195762-7-jeremy.linton@arm.com> In-Reply-To: <20220102054924.1195762-1-jeremy.linton@arm.com> References: <20220102054924.1195762-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: 6AQkwspyUNOqzX4ue79FavrIx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1641102587; bh=P7hA1D55GW0TzbFuaRDRKnBbt/25bayPxZsZFTbcWsA=; h=Cc:Date:From:Reply-To:Subject:To; b=PXwxz2ASb2QopTUIjHR0h91WPE9wh8CIvybgI8XAnCl+K3BgigHEBdqh3nKUOwFElc0 OIP5cyvbhHIBluVQsngMn4zIux+d+9wUHpvmN2mvaYG9y3jEAt+jFpXbjQjlwBd1NZ+AR ms2yRRoPuvOd20D83dyorEECjCKBEZ9iH3o= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1641102589797100021 Content-Type: text/plain; charset="utf-8" The lower level firmware can enable/disable a LDO audio amp, which allows us to mute/unmute audio output while the firmware is running. Tested-by: Ard Biesheuvel Signed-off-by: Jeremy Linton Tested-by: 0n0w1c --- .../Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c | 60 ++++++++++++++++++= +++- .../RaspberryPi/Include/IndustryStandard/RpiMbox.h | 1 + .../RaspberryPi/Include/Protocol/RpiFirmware.h | 7 +++ 3 files changed, 67 insertions(+), 1 deletion(-) diff --git a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c b= /Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c index 4edec0ad04..dca43d78a6 100644 --- a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c +++ b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c @@ -1532,6 +1532,63 @@ RpiFirmwareNotifyGpioSetCfg ( return Status; } =20 +#pragma pack() +typedef struct { + UINT32 State; +} RPI_FW_SET_LDO_REG_TAG; + +typedef struct { + RPI_FW_BUFFER_HEAD BufferHead; + RPI_FW_TAG_HEAD TagHead; + RPI_FW_SET_LDO_REG_TAG TagBody; + UINT32 EndTag; +} RPI_FW_SET_LDO_REG_CMD; +#pragma pack() + + +STATIC +EFI_STATUS +EFIAPI +RpiFirmwareSetLdoRegState ( + IN UINTN State + ) +{ + RPI_FW_SET_LDO_REG_CMD *Cmd; + EFI_STATUS Status; + UINT32 Result; + + if (!AcquireSpinLockOrFail (&mMailboxLock)) { + DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)= ); + return EFI_DEVICE_ERROR; + } + + Cmd =3D mDmaBuffer; + ZeroMem (Cmd, sizeof (*Cmd)); + + Cmd->BufferHead.BufferSize =3D sizeof (*Cmd); + Cmd->BufferHead.Response =3D 0; + Cmd->TagHead.TagId =3D RPI_MBOX_SET_LDO_REGULATOR; + Cmd->TagHead.TagSize =3D sizeof (Cmd->TagBody); + Cmd->TagBody.State =3D State; + + Cmd->TagHead.TagValueSize =3D 0; + Cmd->EndTag =3D 0; + + Status =3D MailboxTransaction (Cmd->BufferHead.BufferSize, RPI_MBOX_VC_C= HANNEL, &Result); + + if (EFI_ERROR (Status) || + Cmd->BufferHead.Response !=3D RPI_MBOX_RESP_SUCCESS) { + DEBUG ((DEBUG_ERROR, + "%a: mailbox transaction error: Status =3D=3D %r, Response =3D=3D 0= x%x\n", + __FUNCTION__, Status, Cmd->BufferHead.Response)); + } + + ReleaseSpinLock (&mMailboxLock); + + return Status; +} + + STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL mRpiFirmwareProtocol =3D { RpiFirmwareSetPowerState, RpiFirmwareGetMacAddress, @@ -1557,7 +1614,8 @@ STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL mRpiFirmwarePro= tocol =3D { RpiFirmwareNotifyXhciReset, RpiFirmwareGetCurrentClockState, RpiFirmwareSetClockState, - RpiFirmwareNotifyGpioSetCfg + RpiFirmwareNotifyGpioSetCfg, + RpiFirmwareSetLdoRegState }; =20 /** diff --git a/Platform/RaspberryPi/Include/IndustryStandard/RpiMbox.h b/Plat= form/RaspberryPi/Include/IndustryStandard/RpiMbox.h index 551c2b82e5..f36aaafaf8 100644 --- a/Platform/RaspberryPi/Include/IndustryStandard/RpiMbox.h +++ b/Platform/RaspberryPi/Include/IndustryStandard/RpiMbox.h @@ -92,6 +92,7 @@ #define RPI_MBOX_NOTIFY_REBOOT 0x00030048 #define RPI_MBOX_GET_POE_HAT_VAL 0x00030049 #define RPI_MBOX_SET_POE_HAT_VAL 0x00030050 +#define RPI_MBOX_SET_LDO_REGULATOR 0x00030056 #define RPI_MBOX_NOTIFY_XHCI_RESET 0x00030058 =20 #define RPI_MBOX_SET_CLOCK_STATE 0x00038001 diff --git a/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h b/Platform= /RaspberryPi/Include/Protocol/RpiFirmware.h index c48bb6e434..175894e37a 100644 --- a/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h +++ b/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h @@ -171,6 +171,12 @@ EFI_STATUS UINTN State ); =20 +typedef +EFI_STATUS +(EFIAPI *SET_LDO_REGULATOR) ( + UINTN State + ); + typedef struct { SET_POWER_STATE SetPowerState; GET_MAC_ADDRESS GetMacAddress; @@ -197,6 +203,7 @@ typedef struct { GET_CLOCK_STATE GetClockState; SET_CLOCK_STATE SetClockState; GPIO_SET_CFG SetGpioConfig; + SET_LDO_REGULATOR SetLdoRegState; } RASPBERRY_PI_FIRMWARE_PROTOCOL; =20 extern EFI_GUID gRaspberryPiFirmwareProtocolGuid; --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#85254): https://edk2.groups.io/g/devel/message/85254 Mute This Topic: https://groups.io/mt/88087668/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 08:44:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+85255+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85255+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1641102589; cv=none; d=zohomail.com; s=zohoarc; b=dsZuXFuhoJJeUuaXjaey65VZJF3vHXPwfe58P3T6bFk22c0l6tO61ooWQYY5VGfoVlqDEkDZ+F8p+gm4YJjujYRzEKqxX+mzyxZitnaBq1d0AKIdStAjZBZNZyOhk/HHBB1ATPg6hQdvT10vUunT+bJZYQ5+5uVaUo6ZNjcEU68= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1641102589; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=kgoSk9AUphInCPCBNaky/Cj4rmrDZUp4uXmfIAGuGxw=; b=Vlc0wTcdNmN1tlOybT3LG1WKHt46iWTuWT4iU+seX1NHNSgb/6xQLOpjgPEuevhpw50S1oOpvxRV6H/wdgHKpUOFZGykAPLqB1xExi91e26U51YBjC3UKGe3IyRSxIa1OzjHzQtrlZvLt5x8v9vbzGyc15DU7fWPEZ1K5vTiP18= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85255+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 164110258934426.426951509583773; Sat, 1 Jan 2022 21:49:49 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id OPffYY1788612xpybb408OOO; Sat, 01 Jan 2022 21:49:48 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.9305.1641102583240960003 for ; Sat, 01 Jan 2022 21:49:44 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CC163139F; Sat, 1 Jan 2022 21:49:43 -0800 (PST) X-Received: from u200856.usa.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 670F83F5A1; Sat, 1 Jan 2022 21:49:43 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: pete@akeo.ie, ardb+tianocore@kernel.org, leif@nuviainc.com, awarkentin@vmware.com, Sunny.Wang@arm.com, samer.el-haj-mahmoud@arm.com, mariobalanica02@gmail.com, Jeremy Linton , Ard Biesheuvel Subject: [edk2-devel] [PATCH V2 07/10] Platform/RaspberryPi: Add SPI/GPIO to memory map Date: Sat, 1 Jan 2022 23:49:21 -0600 Message-Id: <20220102054924.1195762-8-jeremy.linton@arm.com> In-Reply-To: <20220102054924.1195762-1-jeremy.linton@arm.com> References: <20220102054924.1195762-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: z5iRLanhKZXzLuOpteYVksnux1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1641102588; bh=5EQILWpo5aHGQb6FOgRg6f+Ab1NCgcuuaEA3VksA+lA=; h=Cc:Date:From:Reply-To:Subject:To; b=vVlWFB7hllAoUu/TCs6KUAaBiQsDR601mAkN3hEWNQhLR+R6d9OMmXBmiRdvhkOoMft 6XidISFWhGjwJaCjxfQAgR+wklgOD1Z9vMvvOP7m1TeDuW8T+f30FwesnX9VVYg2CoJ36 bBzh4Igw7SCGIR1VPVaYOmiDtI7+uNUYBaQ= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1641102591823100031 Content-Type: text/plain; charset="utf-8" A large reason for using the SPI flash on this platform is that it can be updated without OS interference at rutime. In order for that to happen we need both the SPI, as well as the GPIO which is used to change the pinmux from the PWM device to SPI added to the UEFI memory map as being used by the runtime service. Tested-by: Ard Biesheuvel Signed-off-by: Jeremy Linton Tested-by: 0n0w1c --- Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platform/= RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c index de7eb769ea..b0db3312c5 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c @@ -503,6 +503,22 @@ ApplyVariables ( DEBUG ((DEBUG_INFO, "Current CPU speed is %u MHz\n", Rate / FREQ_1_MHZ= )); } =20 + if (mModelFamily =3D=3D 4) { + Status =3D gDS->AddMemorySpace (EfiGcdMemoryTypeMemoryMappedIo, BCM283= 6_SPI0_BASE_ADDRESS, + SIZE_4KB, EFI_MEMORY_UC | EFI_MEMORY_RUN= TIME); + ASSERT_EFI_ERROR (Status); + Status =3D gDS->SetMemorySpaceAttributes (BCM2836_SPI0_BASE_ADDRESS, + SIZE_4KB, EFI_MEMORY_UC|EFI_ME= MORY_RUNTIME); + + Status =3D gDS->AddMemorySpace (EfiGcdMemoryTypeMemoryMappedIo, GPIO_B= ASE_ADDRESS, + SIZE_4KB, EFI_MEMORY_UC | EFI_MEMORY_RUN= TIME); + ASSERT_EFI_ERROR (Status); + Status =3D gDS->SetMemorySpaceAttributes (GPIO_BASE_ADDRESS, + SIZE_4KB, EFI_MEMORY_UC|EFI_ME= MORY_RUNTIME); + + ASSERT_EFI_ERROR (Status); + } + if (mModelFamily >=3D 4 && PcdGet32 (PcdRamMoreThan3GB) !=3D 0 && PcdGet32 (PcdRamLimitTo3GB) =3D=3D 0) { UINT64 SystemMemorySize; --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#85255): https://edk2.groups.io/g/devel/message/85255 Mute This Topic: https://groups.io/mt/88087669/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 08:44:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+85256+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85256+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1641102589; cv=none; d=zohomail.com; s=zohoarc; b=k4Sg1GkO1kZ/TadCufMZi5BHLBG0HGZUsKEtA7qg5KigBVIGZGSfcjYft5SiUP0UoYJLAiaVG8Vtg3pPjPYNVZYrsj6qEuukiLtciKO9pfyT4XOoF2gyiOgCKhz+r3LX+YffU3MQJHrXGP3pVJRrv7KEPstZ2bcrD7yPmObAod0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1641102589; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=Z5jMj4uygQzYu69IO2TIHbsj8zo7RcEde6TaizKKqhM=; b=NcFHyV7/8DSs7bbGSuYmQgcG2nB0N+FIN7r82WxJxQ82t72Y/FDSa6QfQakY09OQmqrHCKKdpdyUvezCvs7bAFNqOk1ucwigM5wus6ojcQkp0SkSDHFm4dos15zQhLPV35Mb/vt4Yc91nhsoLlcung10czWP6kRGz/mta87OraY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85256+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1641102589474402.15993283129535; Sat, 1 Jan 2022 21:49:49 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id vr7qYY1788612xXV3v2axxA9; Sat, 01 Jan 2022 21:49:49 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web08.9281.1641102583262087145 for ; Sat, 01 Jan 2022 21:49:44 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4616F13D5; Sat, 1 Jan 2022 21:49:44 -0800 (PST) X-Received: from u200856.usa.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D974D3F5A1; Sat, 1 Jan 2022 21:49:43 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: pete@akeo.ie, ardb+tianocore@kernel.org, leif@nuviainc.com, awarkentin@vmware.com, Sunny.Wang@arm.com, samer.el-haj-mahmoud@arm.com, mariobalanica02@gmail.com, Jeremy Linton , Ard Biesheuvel Subject: [edk2-devel] [PATCH V2 08/10] Platform/RaspberryPi: Allow pin function selection at runtime Date: Sat, 1 Jan 2022 23:49:22 -0600 Message-Id: <20220102054924.1195762-9-jeremy.linton@arm.com> In-Reply-To: <20220102054924.1195762-1-jeremy.linton@arm.com> References: <20220102054924.1195762-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: 1wtiJR1Kvyykkarjsk4JCN0ex1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1641102589; bh=HM8BnK1Ith+0jlWRmXJIiHznSn6HvjeVUlox9UMH2wo=; h=Cc:Date:From:Reply-To:Subject:To; b=C8K908+oiOzd64ZQBC2E8qf29aFAGe8bY2MsN15LB6u6QSg7Z4ojC+68/Ocb07rzf+M 1Ab6qQ2WAfGwaqryGPcArk+KnBzLM/Of7RUq4uNPji0zPnP3C68jsXpiGG/5x0ovqAMd2 U1nqm7+nALnpZpYjqXXVXED9XjOtVV+9mjU= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1641102591825100032 Content-Type: text/plain; charset="utf-8" Update GpioLib slightly so that we can change the GPIO pin muxing at runtime. For the moment only the GpioPinFuncGet/Set() routines are used at runtime, and only by the Variable service. Tested-by: Ard Biesheuvel Signed-off-by: Jeremy Linton Tested-by: 0n0w1c --- Silicon/Broadcom/Bcm283x/Include/Library/GpioLib.h | 6 ++++++ Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c | 16 ++++++++++++++-- 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/Silicon/Broadcom/Bcm283x/Include/Library/GpioLib.h b/Silicon/B= roadcom/Bcm283x/Include/Library/GpioLib.h index 1f7d2204e0..79765be4fb 100644 --- a/Silicon/Broadcom/Bcm283x/Include/Library/GpioLib.h +++ b/Silicon/Broadcom/Bcm283x/Include/Library/GpioLib.h @@ -45,4 +45,10 @@ GpioSetPull ( IN UINTN Pud ); =20 +VOID +GpioSetupRuntime ( + VOID +); + + #endif /* __GPIO_LIB__ */ diff --git a/Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c b/Silicon/B= roadcom/Bcm283x/Library/GpioLib/GpioLib.c index eaf53e5369..fc1f928e6b 100644 --- a/Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c +++ b/Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c @@ -15,10 +15,22 @@ #include #include #include +#include #include #include #include =20 + +STATIC EFI_PHYSICAL_ADDRESS GpioGfpSel0 =3D GPIO_GPFSEL0; + +VOID +GpioSetupRuntime ( + VOID + ) +{ + EfiConvertPointer (0x0, (VOID**)&GpioGfpSel0); +} + STATIC VOID GpioFSELModify ( @@ -30,7 +42,7 @@ GpioFSELModify ( UINT32 Val; EFI_PHYSICAL_ADDRESS Reg; =20 - Reg =3D RegIndex * sizeof (UINT32) + GPIO_GPFSEL0; + Reg =3D RegIndex * sizeof (UINT32) + GpioGfpSel0; =20 ASSERT (Reg <=3D GPIO_GPFSEL5); ASSERT ((~ModifyMask & FunctionMask) =3D=3D 0); @@ -77,7 +89,7 @@ GpioPinFuncGet ( =20 RegIndex =3D Pin / 10; SelIndex =3D Pin % 10; - Reg =3D RegIndex * sizeof (UINT32) + GPIO_GPFSEL0; + Reg =3D RegIndex * sizeof (UINT32) + GpioGfpSel0; =20 Val =3D MmioRead32 (Reg); Val >>=3D SelIndex * GPIO_FSEL_BITS_PER_PIN; --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#85256): https://edk2.groups.io/g/devel/message/85256 Mute This Topic: https://groups.io/mt/88087670/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 08:44:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+85257+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85257+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1641102590; cv=none; d=zohomail.com; s=zohoarc; b=hw4Vn5uGK8d8PZBCqcnPBRQWLpY6k8JIrqp5rosI3q5qDabnld2YoLVE6u1U18oMwxUvY8L3aE5+pA9uLd8qaDA1XW3jnuvOVDA1SjkOkSi+wl/maA0XJFg/ckcdmyOHlfLlrdWv2eWAhDwSriMppUB7yuVH5TcrfLDfDsdR6Rs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1641102590; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=bQngX263WGaAGOu3YCgb6pjFMRh2u7j5PlRmIVbKom8=; b=SftZtqduji0nNkH8laBnJaaQ1KXOJ/neAH+bGkHk66GKLVW8x5YiwlAXKhXgbNTVyQ9QH3Z8Hioy18+0WeIL7Ml0MZJ66qjzlSmoHKOSh32GITHwNSJI+0PFVziRDglottv0/S+Q1QCCOYoYCuGeWcFUuD1GlOVRz1iT0FjCoO0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85257+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1641102590054821.7876897141333; Sat, 1 Jan 2022 21:49:50 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id XjixYY1788612xtcNxRakj3p; Sat, 01 Jan 2022 21:49:49 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.9305.1641102583240960003 for ; Sat, 01 Jan 2022 21:49:45 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B82C3142F; Sat, 1 Jan 2022 21:49:44 -0800 (PST) X-Received: from u200856.usa.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 525823F5A1; Sat, 1 Jan 2022 21:49:44 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: pete@akeo.ie, ardb+tianocore@kernel.org, leif@nuviainc.com, awarkentin@vmware.com, Sunny.Wang@arm.com, samer.el-haj-mahmoud@arm.com, mariobalanica02@gmail.com, Jeremy Linton , Ard Biesheuvel Subject: [edk2-devel] [PATCH V2 09/10] Platform/RaspberryPi: Add SPI flash variable store. Date: Sat, 1 Jan 2022 23:49:23 -0600 Message-Id: <20220102054924.1195762-10-jeremy.linton@arm.com> In-Reply-To: <20220102054924.1195762-1-jeremy.linton@arm.com> References: <20220102054924.1195762-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: DL0iKraTv3glQJzlxgSqRp2ex1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1641102589; bh=ALx1nhY0uI0wZ/4j5N+DUcinHRwA6KUfvBFx9gb+Vhw=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=NCNcDFq0fcDkBVk3W9PaHOCYcl4UhpddHUOeFxbsLcxyPD/h+DE1m4shgwXpAbiE0/i WDL3gfbAyITzhNOemCq0EVT0pOaZzlv6W9MwvMB7cDiDqJ/GMJemJXN9ULKVxhojJrKVp BOpnRdvS2Vxp3UZLw6xlMNPsPZ46bUWkQu8= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1641102591899100035 Content-Type: text/plain; charset="utf-8" The RPi4 has a 512KB SPI flash, which depending on RPi and firmware revision has 300-180K free. We can use this storage to persist variables when the OS is running or over firmware upgrades. The problem is that the SPI is pin mux'ed with the PWM audio, so we want to leave the PWM configured for OS use. And of course there is the problem of sharing the GPIO block with OS's that are aware of it. Hence a previous patch set which moves the GPIO and some of the low level i2c/etc devices into its own SSDT, and disables them by default. This patch, adds a few SPI access functions directly to the variable store rather than creating another runtime service since the early boot ordering is critical. These functions are of the form ReadSpi(), WriteSpi(), DisableSpiWp(), etc all with Spi in the name. On top of that a few "Flash" routines are created which provide high level functions for reading/writing and walking the portion of the SPI flash we use to clone the variable store region. Importantly WalkFlashVolume() walks the entire SPI flash region, which has a simple header structure containing filename+len for each region of the flash, to return how much of the capacity is being utilized by the existing bootloader/etc firmware. So, if this is a RPi4, and there is sufficient space, and that space doesn't have a valid varstore header we erase it and flush the RPI's varstore region to the SPI. Then we note its starting offset in mFvInstance->FlashOffset. From then on, writes to the EFI_FW_VOL_BLOCK_DEVICE are written to both the RAM copy as well as the SPI flash. If the empty region has a valid header we read the entire region overtop of the one being passed as part of the RPi's BL33, and continue as above. At ready to boot we re-enable the LDO, and then during the dump vars check, we check for DT or the GPIO being enabled and disable the runtime SPI updates because we can't be sure of what the OS might be doing with the GPIO. The dual ACPI and DT mode, leaves it enabled (if GPIO is disabled) so care should be taken. Now, one of the problems here is that with the LDO enabled any SPI accesses can be heard over the speakers as pops, buzzes, or scratchy tones. This is happening even without this patch because TFA and/or the rpi low level firmware doesn't itself assure the LDO is disabled during resets, so the early SoC startup is quite noisy. We add to this, but alongside that a couple fairly trivial TFA patchs, to mute it before reset, and again assure its off before releasing to us solve a large part of this problem. That said, this can now happen during runtime as well. Generally the OS's aren't doing a lot of variable updates, but when they do its generally barely noticable clicks since we aren't going through the long process of muting/unmuting the LDO which itself causes a pop. So, this patch fixes a whole bunch of bugs on github that exist because the variable store isn't persisted. It also fixes a rather large bug in the existing variable store code caused by the FaultTolerantWriteDxe erasing the entire variable store region when it garbage collects during startup. That latter bug is the result of FvbGetLbaAddress reading recently erased data from the VolumeHeader before its been recreated, and results in random UEFI crashes. Tested-by: Ard Biesheuvel Signed-off-by: Jeremy Linton Tested-by: 0n0w1c --- .../Drivers/VarBlockServiceDxe/FvbInfo.c | 8 +- .../Drivers/VarBlockServiceDxe/VarBlockService.c | 650 +++++++++++++++++= +++- .../Drivers/VarBlockServiceDxe/VarBlockService.h | 10 + .../VarBlockServiceDxe/VarBlockServiceDxe.c | 38 +- .../VarBlockServiceDxe/VarBlockServiceDxe.inf | 6 + 5 files changed, 690 insertions(+), 22 deletions(-) diff --git a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/FvbInfo.c b/Pl= atform/RaspberryPi/Drivers/VarBlockServiceDxe/FvbInfo.c index 0e0c108dba..ee18f327e6 100644 --- a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/FvbInfo.c +++ b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/FvbInfo.c @@ -11,12 +11,7 @@ #include #include #include - -typedef struct { - UINT64 FvLength; - EFI_FIRMWARE_VOLUME_HEADER FvbInfo; - EFI_FV_BLOCK_MAP_ENTRY End[1]; -} EFI_FVB_MEDIA_INFO; +#include "VarBlockService.h" =20 EFI_FVB_MEDIA_INFO mPlatformFvbMediaInfo[] =3D { // @@ -38,6 +33,7 @@ EFI_FVB_MEDIA_INFO mPlatformFvbMediaInfo[] =3D { FixedPcdGet32 (PcdNvStorageEventLogSize), EFI_FVH_SIGNATURE, EFI_FVB2_MEMORY_MAPPED | + EFI_FVB2_STICKY_WRITE | EFI_FVB2_READ_ENABLED_CAP | EFI_FVB2_READ_STATUS | EFI_FVB2_WRITE_ENABLED_CAP | diff --git a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServic= e.c b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockService.c index 572309439a..0cf204738f 100644 --- a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockService.c +++ b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockService.c @@ -7,17 +7,28 @@ * **/ =20 +#include + +#include +#include + #include #include +#include =20 #include #include #include #include #include +#include +#include #include +#include #include =20 +#include + #include "VarBlockService.h" =20 #define EFI_FVB2_STATUS \ @@ -85,6 +96,467 @@ EFI_FW_VOL_BLOCK_DEVICE mFvbDeviceTemplate =3D { } }; =20 +/* + * This is a derived approximation for the number of BCM2835_SPI_CS + * register reads that can be accomplished in 1US on a bcm2711. + */ +#define SPI_CS_READS_PER_US 25 + +STATIC +VOID +SpiDelay ( + IN UINTN micro_sec + ) +/*++ + + Routine Description: + Delay loop based on how fast we can read SPI controller + state rather than a hardcoded delay since we are a runtime + service. + + Arguments: + micro_sec - Approximate number of micro seconds to delay. + + Returns: +--*/ +{ + UINT32 looping; + for (looping =3D 0; looping < micro_sec; looping++) { + UINT32 looping2; + // + // RPi4 does about 25 reg reads per micro second + // + for (looping2 =3D 0; looping2 < SPI_CS_READS_PER_US; looping2++) { + MmioRead32 (mFvInstance->SpiBase+BCM2835_SPI_CS); + } + } +} + +STATIC +INT32 +DoSpiCommand ( + UINT8 *Buffer, + UINTN in_len, + UINTN out_len) +/*++ + + Routine Description: + Read and/or Write data on the SPI bus. A buffer with + data to write/read is passed and this routine then writes + out_len data on the SPI bus, and reads in_len data back + into the buffer starting at the first location. Obviously + this means that the buffer must be greater than the largest + of in_len or out_len + + Arguments: + in_len - bytes to read from the SPI to buffer + out_len - bytes to write on the SPI from buffer + + Returns: + number of bytes read into buffer. +--*/ +{ + int cur_byte; + UINT32 ret =3D 0; + + MmioWrite32 (mFvInstance->SpiBase + BCM2835_SPI_CS, BCM2835_SPI_CS_TA); + + for (cur_byte =3D 0 ;cur_byte < in_len + out_len; cur_byte++) + { + int loop =3D 10000*SPI_CS_READS_PER_US; + + while ((MmioRead32 (mFvInstance->SpiBase + BCM2835_SPI_CS) & BCM2835_S= PI_CS_TXD) =3D=3D 0) { + loop--; + if (loop =3D=3D 0) { + DEBUG ((DEBUG_ERROR, "Write timeout %X\n", MmioRead32 (mFvInstance= ->SpiBase+BCM2835_SPI_CS))); + ret =3D -1; + break; + } + } + + if (cur_byte < out_len) { + MmioWrite32 (mFvInstance->SpiBase + BCM2835_SPI_FIFO, Buffer[cur_byt= e]); + } else { + MmioWrite32 (mFvInstance->SpiBase + BCM2835_SPI_FIFO, 0); + } + + loop =3D 10000 * SPI_CS_READS_PER_US; + while ((MmioRead32 (mFvInstance->SpiBase + BCM2835_SPI_CS) & BCM2835_S= PI_CS_RXD) =3D=3D 0) { + loop--; + if (loop =3D=3D 0) { + DEBUG ((DEBUG_ERROR, "Read timeout %X\n", MmioRead32 (mFvInstance-= >SpiBase+BCM2835_SPI_CS))); + ret =3D -1; + break; + } + } + + if (cur_byte < out_len) { + MmioRead32 (mFvInstance->SpiBase + BCM2835_SPI_FIFO); + } else { + ret++; + Buffer[cur_byte - out_len] =3D MmioRead32 (mFvInstance->SpiBase + BC= M2835_SPI_FIFO); + } + } + + MmioWrite32 (mFvInstance->SpiBase + BCM2835_SPI_CS, 0); + + SpiDelay (1); //wait for /CS to settle + + return ret; +} + +#if (RPI_MODEL =3D=3D 4) +STATIC +INT32 +ReadDeviceId (VOID) +/*++ + + Routine Description: + Sends the SPI device identification command then checks to see + if its a winbond we recognize, and returns the expected capacity. + + Arguments: + + Returns: + Capacity of attached device +--*/ +{ + UINT8 Buffer[32]; + Buffer[0] =3D 0x9F; + + DoSpiCommand (Buffer, 3, 1); //EF 30 31 is the winbond W25X40CL on the= base rpi4 + if (Buffer[0] !=3D 0xEF) { + DEBUG ((DEBUG_INFO, "ReadDeviceId %02X %02X %02X\n", + Buffer[0], Buffer[1], Buffer[2])); + } + // Lets assume we understand JEDEC type 0x30 + if (Buffer[1] =3D=3D 0x30) { + // it should be 512K + return 1 << Buffer[2]; //not really standard... + } + + return 0; +} + +STATIC +INT32 +ReadSpi ( + UINT32 Addr, + UINT8 *Buffer, + UINT32 Len) +/*++ + + Routine Description: + Reads Len bytes of data at flash Addr into Buffer + + Arguments: + Addr - Flash device address + Buffer - Buffer where data is returned, this + buffer must be at least 5 bytes long to + hold the command. + Len - Number of bytes to read into Buffer + + Returns: + Number of bytes read +--*/ +{ + INT32 ret; + Buffer[0] =3D 0x0B; //send read data + Buffer[1] =3D (Addr >> 16) & 0xFF; // address MSB + Buffer[2] =3D (Addr >> 8) & 0xFF; // + Buffer[3] =3D Addr & 0xFF; // address LSB + Buffer[4] =3D 0; + + ret =3D DoSpiCommand (Buffer, Len, 5); + return ret; +} + +STATIC +UINT32 +WalkFlashVolume (VOID) +/*++ + + Routine Description: + Walk the RPi's SPI flash volume to determine if there is + free space we may consume as the backing store for a UEFI + variable store volume. This is fairly safe as the entire volume + can be recovered using the Raspberry Pi OS image tool to create + an EEPROM update disk. We aren't going to bother to + attempt to contain it in their volume format, rather hiding in + the free/unclaimed space. If this space is corrupted via an update + done outside of our control, we will fallback to the original + RPI_EFI.FD variables. AKA we should never really be worse off. + + Arguments: + None + + Returns: + A value that can be assigned to mFvInstance->FlashOffset + as the location we may right, otherwise 0. +--*/ +{ + UINT32 total_data; + UINT32 device_size; + UINT8 buffer[32]; + + device_size =3D ReadDeviceId (); + // newer write location 00051100 + + for (total_data =3D 0; total_data < device_size; ) { + UINT32 len; + if (ReadSpi (total_data, buffer, 24) =3D=3D 24) { + len =3D 0; + len +=3D (*(UINT8 *)&buffer[5]) << 16; + len +=3D (*(UINT8 *)&buffer[6]) << 8; + len +=3D (*(UINT8 *)&buffer[7]); + + // round up to nearest 8 byte align + len +=3D 7; + len &=3D 0xFFFFF8; + + buffer[24]=3D0; + DEBUG ((DEBUG_INFO, "%X len=3D%d filename=3D%a \n", *(UINT32 *)buffe= r, + len, (char *)&buffer[8])); + if (*(UINT32 *)buffer =3D=3D 0xFFFFFFFF) { + break; + } + total_data +=3D 8 + len; + } else { + DEBUG ((DEBUG_ERROR, "Didn't get correct amount of data from SPI, ab= ort its use\n")); + return 0; + } + } + + DEBUG ((DEBUG_INFO, "First free sector at %X free space remaining %dK \n= ", total_data,(device_size-total_data)/1024)); + if ((device_size - total_data) > SIZE_128KB) { + //start at the next 4k page + total_data =3D (total_data + SIZE_4KB) & 0xFFFFE000; + DEBUG ((DEBUG_INFO, "Start of Fv at %X\n", total_data)); + } else { + total_data =3D 0; + } + + return total_data; +} + + +STATIC +INT32 +FlashRead ( + UINT32 Addr, + UINT8 *Buffer, + UINT32 Len) +/*++ + + Routine Description: + Reads Len data from variable storage area into Buffer + + Arguments: + Addr - Offset into variable store region + Buffer - Buffer where data is returned, this + buffer must be at least 5 bytes long to + hold the command. + Len - Number of bytes to read into Buffer + + Returns: + Number of bytes read +--*/ +{ + return ReadSpi (mFvInstance->FlashOffset + Addr, Buffer, Len); +} +#endif + +STATIC +VOID +DisableSpiWp (VOID) +/*++ + + Routine Description: + Sends SPI flash command to disable write protection + + Arguments: + + Returns: + +--*/ +{ + UINT8 Buffer[32]; + Buffer[0] =3D 0x06; + + DoSpiCommand (Buffer, 0, 1); +} + +STATIC +INT32 +ReadSpiStatus (VOID) +/*++ + + Routine Description: + Sends SPI get status command + Arguments: + + Returns: + Status of flash device +--*/ +{ + UINT8 Buffer[32]; + Buffer[0] =3D 0x05; + + DoSpiCommand (Buffer, 1, 1); + + return Buffer[0]; +} + + +STATIC +VOID +WriteSpi ( + UINT32 Addr, + UINT8 *SrcBuffer, + UINT32 Len) +/*++ + + Routine Description: + Writes Len bytes of SrcBuffer to SPI flash. The max write len is a si= ngle + 256 byte block, but this routine deals with the case where its misali= gned + across two flash blocks. + + Arguments: + Addr - Flash device address + SrcBuffer - Buffer from which data is written to the SPI flash + Len - Number of bytes to write + + Returns: + Nothing +--*/ +{ + UINT8 Buffer[280]; + UINTN loop; + int additional =3D 0; + + if (Len > 256) Len =3D 256; + + // check if request crosses boundary + if (((Addr + Len - 1) & 0xFFFFFF00) !=3D (Addr & 0xFFFFFF00)) { + additional =3D (Addr + Len) & 0xFF; + Len -=3D additional; + } + + do { + + DisableSpiWp (); + + while (ReadSpiStatus () !=3D 2) { + DEBUG ((DEBUG_INFO, "Spi status %X \n", ReadSpiStatus ())); + } + + Buffer[0] =3D 0x02; //write len + Buffer[1] =3D (Addr >> 16) & 0xFF; + Buffer[2] =3D (Addr >> 8) & 0xFF; + Buffer[3] =3D Addr & 0xFF; + + CopyMem (&Buffer[4], SrcBuffer, Len); + + DoSpiCommand (Buffer, 0, 4+Len); + + loop =3D Len * 30000 * SPI_CS_READS_PER_US; + while (ReadSpiStatus () & 0x3) { + loop--; + if (loop =3D=3D 0) { + DEBUG ((DEBUG_ERROR, "Write still busy, continue\n")); + break; + } + } + + // deal with second block + if (additional) { + Addr +=3D Len; + SrcBuffer +=3D Len; + Len =3D additional; + additional =3D 0; + } else { + Len =3D 0; + } + + } while (Len); +} + +STATIC +VOID +Erase4kSpi ( + UINT32 Addr) +/*++ + + Routine Description: + Erases a complete SPI flash page, which in this + case is 4k at the given address. + + Arguments: + Addr - Flash device address + + Returns: + Nothing +--*/ +{ + UINT8 Buffer[32]; + int loop =3D 300000 * SPI_CS_READS_PER_US; + + DisableSpiWp (); + + Buffer[0] =3D 0x20; //erase 4k + Buffer[1] =3D (Addr >> 16) & 0xFF; + Buffer[2] =3D (Addr >> 8) & 0xFF; + Buffer[3] =3D Addr & 0xFF; + + DoSpiCommand (Buffer, 0, 4); + + while (ReadSpiStatus () & 0x3) { + loop--; + if (loop =3D=3D 0) { + DEBUG ((DEBUG_ERROR, "Erase still busy \n")); + break; + } + } +} + +STATIC +VOID +FlashWrite ( + IN UINTN Address, + IN UINT8 *Buffer, + IN UINTN NumBytes + ) +/*++ + + Routine Description: + Writes Len bytes of SrcBuffer to flash variable storage. This routine= breaks + the writes into blocks <=3D 256 bytes, which is the max that can be w= ritten with + the SPI flash commands we are using. + + Arguments: + Address - Variable store offset + Buffer - data buffer to write + NumBytes - bytes in buffer to write + + Returns: + +--*/ +{ + UINTN Off=3DAddress; + + while (NumBytes>0) { + int write_bytes =3D NumBytes; + if (write_bytes > 256) { + write_bytes =3D 256; + } + WriteSpi (mFvInstance->FlashOffset + Off, Buffer, write_bytes); + + Off +=3D write_bytes; + Buffer +=3D write_bytes; + NumBytes -=3D write_bytes; + } +} + =20 EFI_STATUS VarStoreWrite ( @@ -93,8 +565,47 @@ VarStoreWrite ( IN UINT8 *Buffer ) { + + if (AddressFvBase) { + return EFI_INVALID_PARAMETER; + } + CopyMem ((VOID*)Address, Buffer, *NumBytes); - mFvInstance->Dirty =3D TRUE; + + if (mFvInstance->FlashOffset) { + GpioPinFuncSet (40, GPIO_FSEL_ALT4); + GpioPinFuncSet (41, GPIO_FSEL_ALT4); + + FlashWrite (Address-mFvInstance->FvBase, Buffer, *NumBytes); + + GpioPinFuncSet (40, GPIO_FSEL_ALT0); + GpioPinFuncSet (41, GPIO_FSEL_ALT0); + } else { + mFvInstance->Dirty =3D TRUE; + } + + return EFI_SUCCESS; +} + +EFI_STATUS +FlashErase ( + IN UINTN Address, + IN UINTN LbaLength + ) + +{ + UINTN Off=3DAddress; + + while (LbaLength>0) { + int erase_bytes =3D LbaLength; + if (erase_bytes > 4096) { + erase_bytes =3D 4096; + } + Erase4kSpi (mFvInstance->FlashOffset + Off); + + Off +=3D erase_bytes; + LbaLength -=3D erase_bytes; + } =20 return EFI_SUCCESS; } @@ -106,8 +617,22 @@ VarStoreErase ( IN UINTN LbaLength ) { + if (AddressFvBase) { + return EFI_INVALID_PARAMETER; + } SetMem ((VOID*)Address, LbaLength, 0xff); - mFvInstance->Dirty =3D TRUE; + + if (mFvInstance->FlashOffset) { + GpioPinFuncSet (40, GPIO_FSEL_ALT4); + GpioPinFuncSet (41, GPIO_FSEL_ALT4); + + FlashErase (Address-mFvInstance->FvBase, LbaLength); + + GpioPinFuncSet (40, GPIO_FSEL_ALT0); + GpioPinFuncSet (41, GPIO_FSEL_ALT0); + } else { + mFvInstance->Dirty =3D TRUE; + } =20 return EFI_SUCCESS; } @@ -166,8 +691,16 @@ FvbGetLbaAddress ( // Parse the blockmap of the FV to find which map entry the Lba belongs = to. // while (TRUE) { - NumBlocks =3D BlockMap->NumBlocks; - BlockLength =3D BlockMap->Length; + if (BlockMap->NumBlocks=3D=3D0xFFFFFFFF) { + NumBlocks =3D mFvInstance->NumOfBlocks; + } else { + NumBlocks =3D BlockMap->NumBlocks; + } + if (BlockMap->Length=3D=3D0xFFFFFFFF) { + BlockLength =3D mFvInstance->BlockSize; + } else { + BlockLength =3D BlockMap->Length; + } =20 if (NumBlocks =3D=3D 0 || BlockLength =3D=3D 0) { return EFI_INVALID_PARAMETER; @@ -199,6 +732,7 @@ FvbGetLbaAddress ( Offset =3D Offset + NumBlocks * BlockLength; BlockMap++; } + } =20 =20 @@ -371,6 +905,19 @@ FvbSetVolumeAttributes ( *AttribPtr =3D (*AttribPtr) | NewStatus; *Attributes =3D *AttribPtr; =20 + if (mFvInstance->FlashOffset) { + GpioPinFuncSet (40, GPIO_FSEL_ALT4); + GpioPinFuncSet (41, GPIO_FSEL_ALT4); + + FlashErase (0, 0x1000); + FlashWrite (0, (UINT8*)mFvInstance->VolumeHeader, 0x1000); + + GpioPinFuncSet (40, GPIO_FSEL_ALT0); + GpioPinFuncSet (41, GPIO_FSEL_ALT0); + + } + + return EFI_SUCCESS; } =20 @@ -416,12 +963,16 @@ FvbProtocolGetBlockSize ( =20 --*/ { - return FvbGetLbaAddress ( - Lba, - NULL, - BlockSize, - NumOfBlocks - ); + EFI_STATUS Status; + + Status =3D FvbGetLbaAddress ( + Lba, + NULL, + BlockSize, + NumOfBlocks + ); + + return Status; } =20 =20 @@ -602,7 +1153,7 @@ FvbProtocolWrite ( EFI_FVB_ATTRIBUTES_2 Attributes; UINTN LbaAddress; UINTN LbaLength; - EFI_STATUS Status; + EFI_STATUS Status =3D EFI_SUCCESS; EFI_STATUS ReturnStatus; =20 // @@ -637,6 +1188,7 @@ FvbProtocolWrite ( return EFI_INVALID_PARAMETER; } =20 + // forces this write to split if (LbaLength < (*NumBytes + Offset)) { *NumBytes =3D (UINT32)(LbaLength - Offset); Status =3D EFI_BAD_BUFFER_SIZE; @@ -789,8 +1341,6 @@ ValidateFvHeader ( Expected =3D (UINT16)(((UINTN)FwVolHeader->Checksum + 0x10000 - Checksum) & 0xfff= f); =20 - DEBUG ((DEBUG_INFO, "FV@%p Checksum is 0x%x, expected 0x%x\n", - FwVolHeader, FwVolHeader->Checksum, Expected)); return EFI_NOT_FOUND; } =20 @@ -825,6 +1375,7 @@ FvbInitialize ( UINTN NumOfBlocks; RETURN_STATUS PcdStatus; UINTN StartOffset; + EFI_FIRMWARE_VOLUME_HEADER SpiBuffer[2]; =20 BaseAddress =3D PcdGet32 (PcdNvStorageVariableBase); Length =3D (FixedPcdGet32 (PcdFlashNvStorageVariableSize) + @@ -842,11 +1393,78 @@ FvbInitialize ( =20 mFvInstance->FvBase =3D (UINTN)BaseAddress; mFvInstance->FvLength =3D (UINTN)Length; - mFvInstance->Offset =3D StartOffset; + mFvInstance->BlockSize =3D FixedPcdGet32 (PcdFirmwareBlockSize); + mFvInstance->Offset =3D StartOffset; // Start offset of RPI_EFI.FD file /* * Should I parse config.txt instead and find the real name? */ mFvInstance->MappedFile =3D L"RPI_EFI.FD"; + /* + * SPI Control + */ + mFvInstance->SpiBase =3D BCM2836_SPI0_BASE_ADDRESS; + mFvInstance->FlashOffset =3D 0; + mFvInstance->DisableRuntime =3D 0; + + ZeroMem (SpiBuffer, sizeof (EFI_FIRMWARE_VOLUME_HEADER) * 2); +#if (RPI_MODEL =3D=3D 4) + /* + * On the RPI4 there is a 512KB flash chip + * used to store the low level bcm2711 bootstrap code + * and the XHCI firmware on newer devices. It has between + * ~330K and ~180K available depending on model/version + * Possibly less as its consumed for other purposes. + * It shares a GPIO pin with the 3.5mm audio port (pwm) + * so accessing it causes pops, shzzzz and bzzz + * noices that are sometimes audible even without us. + * During reboot for example. Newer TFA's will presumably + * help us out and disable the audio amp at shutdown + * and leave it disabled during startup. That means + * that this code can bzzzz if TFA hasn't assured the + * audio is off for us. + * + * Runtime audio pops are audible although barely noticable + * in Windows and DT based linux boots. Although the larger + * problem is configuring the GPIO pins. As such we disable + * runtime persistance if either DT boot mode, or ACPI GPIO + * is enabled. + */ + + GpioPinFuncSet (40, GPIO_FSEL_ALT4); + GpioPinFuncSet (41, GPIO_FSEL_ALT4); + GpioPinFuncSet (42, GPIO_FSEL_ALT4); + GpioPinFuncSet (43, GPIO_FSEL_ALT4); + GpioPinFuncSet (44, GPIO_FSEL_ALT4); + GpioPinFuncSet (45, GPIO_FSEL_ALT4); + + GpioSetPull (43, GPIO_PULL_DOWN); + GpioSetPull (44, GPIO_PULL_DOWN); + GpioSetPull (45, GPIO_PULL_DOWN); + + mFvInstance->FlashOffset =3D WalkFlashVolume (); + + if (mFvInstance->FlashOffset) { + if (FlashRead (0, (UINT8*)SpiBuffer, sizeof (EFI_FIRMWARE_VOLUME_HEADE= R)*2) + !=3D sizeof (EFI_FIRMWARE_VOLUME_HEADER) * 2) { + DEBUG ((DEBUG_ERROR, "Unable to read data from SPI\n")); + mFvInstance->FlashOffset =3D 0; + } else { + Status =3D ValidateFvHeader (SpiBuffer); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_INFO, "Invalid header on SPI, recreate volume\n")); + FlashErase (0, Length); + FlashWrite (0, (UINT8*)BaseAddress, Length); + } + + // read the entire varstore... + if (FlashRead (0, (UINT8*)BaseAddress, Length) !=3D Length) { + DEBUG ((DEBUG_ERROR, "Failed to read entire flash region\n")); + } + } + } + GpioPinFuncSet (40, GPIO_FSEL_ALT0); + GpioPinFuncSet (41, GPIO_FSEL_ALT0); +#endif =20 Status =3D ValidateFvHeader (mFvInstance->VolumeHeader); if (!EFI_ERROR (Status)) { @@ -903,7 +1521,9 @@ FvbInitialize ( } =20 // - // The total number of blocks in the FV. + // The total number of blocks in the FV. This should match: + // PcdFlashNvStorageVariableSize + PcdFlashNvStorageFtwWorkingSize + + // PcdFlashNvStorageFtwSpareSize + PcdNvStorageEventLogSize / PcdFirmwar= eBlockSize // mFvInstance->NumOfBlocks =3D NumOfBlocks; =20 diff --git a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServic= e.h b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockService.h index b65c26453d..1b4f6bd877 100644 --- a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockService.h +++ b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockService.h @@ -30,9 +30,13 @@ typedef struct { UINTN FvLength; UINTN Offset; UINTN NumOfBlocks; + UINTN BlockSize; EFI_DEVICE_PATH_PROTOCOL *Device; CHAR16 *MappedFile; BOOLEAN Dirty; + UINTN SpiBase; + UINTN FlashOffset; + UINTN DisableRuntime; } EFI_FW_VOL_INSTANCE; =20 extern EFI_FW_VOL_INSTANCE *mFvInstance; @@ -208,4 +212,10 @@ FileClose ( IN EFI_FILE_PROTOCOL *File ); =20 +typedef struct { + UINT64 FvLength; + EFI_FIRMWARE_VOLUME_HEADER FvbInfo; + EFI_FV_BLOCK_MAP_ENTRY End[1]; +} EFI_FVB_MEDIA_INFO; + #endif diff --git a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServic= eDxe.c b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe= .c index 4071a3fca4..99ae78f158 100644 --- a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.c +++ b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.c @@ -8,8 +8,10 @@ * **/ =20 +#include +#include #include "VarBlockService.h" - +#include "ConfigVars.h" // // Minimum delay to enact before reset, when variables are dirty (in =CE= =BCs). // Needed to ensure that SSD-based USB 3.0 devices have time to flush their @@ -104,9 +106,14 @@ FvbVirtualAddressChangeEvent ( =20 --*/ { + if (mFvInstance->DisableRuntime) { + mFvInstance->FlashOffset =3D 0; //disable flash writes + } + EfiConvertPointer (0x0, (VOID**)&mFvInstance->SpiBase); EfiConvertPointer (0x0, (VOID**)&mFvInstance->FvBase); EfiConvertPointer (0x0, (VOID**)&mFvInstance->VolumeHeader); EfiConvertPointer (0x0, (VOID**)&mFvInstance); + GpioSetupRuntime (); } =20 =20 @@ -175,6 +182,15 @@ DumpVars ( =20 if (!mFvInstance->Dirty) { DEBUG ((DEBUG_INFO, "Variables not dirty, not dumping!\n")); + // if there is a valid SPI flash volume in use, don't delay the reset + if (mFvInstance->FlashOffset) { + PcdSet32S (PcdPlatformResetDelay, 0); + } + if ((PcdGet32 (PcdSystemTableMode) =3D=3D SYSTEM_TABLE_MODE_DT) || + PcdGet32 (PcdEnableGpio)) { + mFvInstance->DisableRuntime =3D TRUE; + } + return; } =20 @@ -200,6 +216,24 @@ DumpVars ( mFvInstance->Dirty =3D FALSE; } =20 +STATIC +VOID +EnableAudioLdo (VOID) +{ + EFI_STATUS Status; + RASPBERRY_PI_FIRMWARE_PROTOCOL *mFwProtocol; + + Status =3D gBS->LocateProtocol (&gRaspberryPiFirmwareProtocolGuid, + NULL, (VOID**)&mFwProtocol); + ASSERT_EFI_ERROR (Status); + if (EFI_ERROR (Status)) { + return; + } + + mFwProtocol->SetLdoRegState (1); + ASSERT_EFI_ERROR (Status); +} + =20 VOID ReadyToBootHandler ( @@ -230,6 +264,8 @@ ReadyToBootHandler ( DumpVars (NULL, NULL); Status =3D gBS->CloseEvent (Event); ASSERT_EFI_ERROR (Status); + + EnableAudioLdo (); } =20 =20 diff --git a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServic= eDxe.inf b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceD= xe.inf index c2edb25bd4..6fe5a22dd3 100644 --- a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.inf +++ b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.inf @@ -37,6 +37,7 @@ MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec Platform/RaspberryPi/RaspberryPi.dec + Silicon/Broadcom/Bcm283x/Bcm283x.dec =20 [LibraryClasses] BaseLib @@ -44,6 +45,7 @@ DebugLib DevicePathLib DxeServicesTableLib + GpioLib MemoryAllocationLib PcdLib UefiBootServicesTableLib @@ -61,6 +63,7 @@ gEfiBlockIoProtocolGuid gEfiFirmwareVolumeBlockProtocolGuid # PROTOCOL SOMETIMES_PRODU= CED gEfiDevicePathProtocolGuid # PROTOCOL SOMETIMES_PRODU= CED + gRaspberryPiFirmwareProtocolGuid ## CONSUMES =20 [FixedPcd] gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize @@ -75,12 +78,15 @@ gArmTokenSpaceGuid.PcdFdSize =20 [Pcd] + gBcm283xTokenSpaceGuid.PcdBcm283xRegistersAddress gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase gRaspberryPiTokenSpaceGuid.PcdNvStorageEventLogBase gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64 + gRaspberryPiTokenSpaceGuid.PcdSystemTableMode + gRaspberryPiTokenSpaceGuid.PcdEnableGpio =20 [FeaturePcd] =20 --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#85257): https://edk2.groups.io/g/devel/message/85257 Mute This Topic: https://groups.io/mt/88087671/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 08:44:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+85258+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85258+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1641102591; cv=none; d=zohomail.com; s=zohoarc; b=eQh/KI98IMKQcXUgnKMtwBJgRiQdHg53b+JHeGvO3wcm8pqJtks2hDODfLA3xB9Wk79RVn57bK4vp0lsmyStsl6C+68dwvBUDTB7SMRHtCwYnvkrcLgHXp/OkAJXoFSKtHbPNgUXeTlC4U09eDl60D3/7kkYinWSh3LGBh4DMpo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1641102591; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=ZvYICIPI0gp1JBsWWzfKMZhhE7bdC8wFuo0NON+nWMM=; b=BVMgbjO8IBjFAm6kaAABCLlho4XzwZs02GcWBG29jEn3S6E8KD3ThbIiA5vd75P2H5X1e7Ip8NzkoiYps07gfTBVrZ2CoUv0kNrx9EQgwZx+4CeGHV17Q/swU0/TcIQeYU+AvKupflR0eZg4lycz5/dJuEf4ktBFz2PjBRSpqXA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85258+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1641102591172625.5705025391319; Sat, 1 Jan 2022 21:49:51 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id 0Q46YY1788612xtRt7oOUj1S; Sat, 01 Jan 2022 21:49:50 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web08.9281.1641102583262087145 for ; Sat, 01 Jan 2022 21:49:45 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 24B281435; Sat, 1 Jan 2022 21:49:45 -0800 (PST) X-Received: from u200856.usa.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C319E3F5A1; Sat, 1 Jan 2022 21:49:44 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: pete@akeo.ie, ardb+tianocore@kernel.org, leif@nuviainc.com, awarkentin@vmware.com, Sunny.Wang@arm.com, samer.el-haj-mahmoud@arm.com, mariobalanica02@gmail.com, Jeremy Linton Subject: [edk2-devel] [PATCH V2 10/10] Platform/RaspberryPi: Update RPi4 Readme Date: Sat, 1 Jan 2022 23:49:24 -0600 Message-Id: <20220102054924.1195762-11-jeremy.linton@arm.com> In-Reply-To: <20220102054924.1195762-1-jeremy.linton@arm.com> References: <20220102054924.1195762-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: M5smIr14rXESf5K4iSILQybTx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1641102590; bh=2ZfHl0KTvVWAVNh9sFRD2B6kLSfJCOaQwBbJcjBDaOE=; h=Cc:Date:From:Reply-To:Subject:To; b=UNKwSRGAu06pGm1Tm/197Hc5wcHMzbUp4+2VycVjZt6I6B6/NwtayRzjIkXHAc67J9u PiTL7bAjSGwir9yXNTOMOhCeFnf5HEkJhdC/wsooipMpaCyyoMYeJims9J7S8pERnOYUd aQdxZRVZ8CfBkQ3sfxdn4yA1WwqyImrcWVM= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1641102593935100043 Content-Type: text/plain; charset="utf-8" Replace the paragraph about NVRAM/UEFI variables, with something that explains the situation a bit better. Update the UEFI settings table. Tweak the DT overlay list, and note support for CM4 and RPi400. Update the missing block to describe some higher level goals and point users at the github issues page. Signed-off-by: Jeremy Linton Tested-by: 0n0w1c --- Platform/RaspberryPi/RPi4/Readme.md | 63 +++++++++++++++++++++++++++++++--= ---- 1 file changed, 53 insertions(+), 10 deletions(-) diff --git a/Platform/RaspberryPi/RPi4/Readme.md b/Platform/RaspberryPi/RPi= 4/Readme.md index 80899f4ca4..38ae0372fb 100644 --- a/Platform/RaspberryPi/RPi4/Readme.md +++ b/Platform/RaspberryPi/RPi4/Readme.md @@ -16,6 +16,8 @@ Raspberry Pi is a trademark of the [Raspberry Pi Foundati= on](https://www.raspber =20 The RPi4 target supports Pi revisions based on the BCM2711 SoC: - Raspberry Pi 4B +- Raspberry Compute Module 4 +- Raspberry Pi 400 =20 Please see the RPi3 target for the BCM2837-based variants, such as the Ras= pberry Pi 3B. @@ -44,10 +46,11 @@ Build instructions from the top level edk2-platforms Re= adme.md apply. 1. Format a uSD card as FAT16 or FAT32 2. Copy the generated `RPI_EFI.fd` firmware onto the partition 3. Download and copy the following files from https://github.com/raspberry= pi/firmware/tree/master/boot - - `bcm2711-rpi-4-b.dtb` + - `bcm2711-rpi-4-b.dtb`, `bcm2711-rpi-cm4.dtb`, or `bcm2711-rpi-400.dtb` - `fixup4.dat` - `start4.elf` - `overlays/miniuart-bt.dbto` or `overlays/disable-bt.dtbo` (Optional) + - `overlays/upstream-pi4.dtbo` (Optional) 4. Create a `config.txt` with the following content: ``` arm_64bit=3D1 @@ -62,7 +65,12 @@ Build instructions from the top level edk2-platforms Rea= dme.md apply. ``` dtoverlay=3Dminiuart-bt ``` - Note: doing so requires `miniuart-bt.dbto` to have been copied into an= `overlays/` + Additionally, if you want to use linux in DT mode + ``` + dtoverlay=3Dupstream-pi4 + ``` + + Note: doing so requires `miniuart-bt.dbto` or `upstream-pi4.dtbo` to h= ave been copied into an `overlays/` directory on the uSD card. Alternatively, you may use `disable-bt` ins= tead of `miniuart-bt` if you don't require Bluetooth. 5. Insert the uSD card and power up the Pi. @@ -84,6 +92,8 @@ By default, UEFI will use the device tree loaded by the V= ideoCore firmware. This depends on the model/variant, and relies on the presence on specific files= on your boot media. E.g.: - `bcm2711-rpi-4-b.dtb` (for Pi 4B) + - `bcm2711-rpi-cm4.dtb` (for CM4) + - `bcm2711-rpi-400.dtb` (for Pi 400) =20 You can override the DTB and provide a custom one. Copy the relevant `.dtb= ` into the root of the SD or USB, and then edit your `config.txt` so that it looks like: @@ -110,11 +120,36 @@ Note, that the ultimate contents of `/chosen/bootargs= ` are a combination of seve =20 ## NVRAM =20 -The Raspberry Pi has no NVRAM. - -NVRAM is emulated, with the non-volatile store backed by the UEFI image it= self. This -means that any changes made in UEFI proper are persisted, but changes made= from within -an Operating System aren't. +The Raspberry Pi doesn't have NVRAM dedicated for UEFI. + +While UEFI variables and associated functions will appear to work correctl= y, +changes made while the OS is active won't persist over reboot except when +three conditions are true. Those conditions are: +- The OS must be running in ACPI mode. +- The GPIO controller is not exported to the OS. +- There must be sufficient free space on the SPI flash. + +In explanation, there are two different methods used to persist firmware +configurations. The firmware first attempts to find 128K of free space on = the +SPI flash utilized by the SoC for early boot. If that fails, updates are +written directly to the RPI_EFI.fd image, but only when two conditions are +true. Those conditions are: +- The OS is not yet booted. +- The RPI_EFI.fd image is stored on media that the firmware can rewrite. + +The SPI is generally a better choice, but it only works if the firmware +controls the GPIO pin muxing (since it shares pins with the PWM Audio) and= the +associated SPI controller while the OS is running. That is where the DT and +GPIO restrictions come in. + +Finally, since the variables store utilizes free space on an SPI flash dev= ice +reserved for early boot/low-level firmware functions, future versions of t= he +RPi foundation firmware may consume more of the available free space. The = SPI +flash may be upgraded/downgraded using the official +[RPi imager](https://github.com/raspberrypi/rpi-imager) update flash tool.= That +tool writes an SD disk image that, when placed in the RPi, will erase and +reprogram the entire SPI flash, thereby wiping out the UEFI variable store= in +the process. =20 ## RTC =20 @@ -141,9 +176,12 @@ all functionality may be available. =20 ## Missing Functionality =20 -- Network booting via onboard NIC. -- SPCR hardcodes type to PL011, and thus will not expose correct - (miniUART) UART if DT overlays to switch UART are used on Pi 4B. +- Capsule update +- CPPC (in progress) +- External RTC support and CM4 IO Board RTC +- Support more HATs in ACPI mode +- Various OS drivers for onboard devices (GPU in linux, etc) +- Other stuff, check https://github.com/pftf/RPi4/issues =20 # Configuration Settings The Raspberry Pi UEFI configuration settings can be viewed and changed usi= ng both the UI configuration menu (under `Device Manager` -> `Raspberry Pi = Configuration`), as well as the UEFI Shell. To configure using the UEFI She= ll, use `setvar` command to read/write the UEFI variables with GUID =3D `CD= 7CC258-31DB-22E6-9F22-63B0B8EED6B5`. @@ -179,6 +217,11 @@ Screenshot support | `DisplayEnableSShot` | = Control-Alt-F12 =3D `0x00000 **Advanced Configuration** | Limit RAM to 3 GB | `RamLimitTo3GB` | Disable =3D `0x00000000` =
Enabled=3D `0x00000001` (default) System Table Selection | `SystemTableMode`| ACPI =3D `0x00000000` (d= efault)
ACPI + Devicetree =3D `0x00000001`
Devicetree =3D `0x00000= 002` +ACPI fan control | `FanOnGpio` | Disable =3D `0x00000000`
= Otherwise numeric GPIO pin +ACPI fan temperature | `FanTemp` | Hex numeric value degrees C +ACPI XHCI/PCIe | `XhciPci` | Xhci =3D `0x00000000`
PCIe= =3D `0x00000001`
always PCIe `0x00000002` +DT Reload XHCI firmware | `XhciReload` | Disable =3D `0x00000000` Enabled=3D `0x00000001` +Export GPIO devices to OS | `EnableGpio` | Disable =3D `0x00000000` Enabled=3D `0x00000001` Asset Tag | `AssetTag` | String, 32 characters or less = (e.g. `L"ABCD123"`)
(default `L""`) **SD/MMC Configuration** | uSD/eMMC Routing | `SdIsArasan` | Arasan SDHC =3D `0x00000001`=
eMMC2 SDHCI =3D `0x00000000` (default) --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#85258): https://edk2.groups.io/g/devel/message/85258 Mute This Topic: https://groups.io/mt/88087672/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-