From nobody Sun May 5 14:24:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+85040+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85040+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1639709296; cv=none; d=zohomail.com; s=zohoarc; b=VwteVEp6fkT1+VJuZyRDniSHOl/nBLAiJfnCdyBqpdSfbBI0K6uT15d2FxMSzwKJ0Vqcmc3ZB6AZ6fCYEa6e0wiHA2nkuKUszViyvRypF/6DoUeWfd+YXWbEpUNWeD572LNMmkrn2bxwzZyQxenrRoVW4bUrCUuvEYUjDhDIU0o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1639709296; h=Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=8/4yjAwGCizl58Aekkpjl5EOTZcSFpKd0J73/lf7Q0E=; b=XcvaXoEDZ/lgMi1D/vxWx8WyzB1Mnw5ivj+S+2+kivy3gDTXbkOkSD3CqWRWK6nlJoRno+CcRNkWHMLkx5B3Xbh/vhYxwwLHUDrVkHSYUg62vZJJ8GyJXv/bQ+oYwBNQixXa8rhFKHEf8Iit4NHn4h/Ahw9AaRiJ4S3YFCDZbz4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+85040+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1639709296681601.6492156891807; Thu, 16 Dec 2021 18:48:16 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id irMBYY1788612xCqyPtk6pmp; Thu, 16 Dec 2021 18:48:16 -0800 X-Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mx.groups.io with SMTP id smtpd.web12.1635.1639709295127983104 for ; Thu, 16 Dec 2021 18:48:15 -0800 X-IronPort-AV: E=McAfee;i="6200,9189,10200"; a="239886937" X-IronPort-AV: E=Sophos;i="5.88,213,1635231600"; d="scan'208";a="239886937" X-Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Dec 2021 18:47:45 -0800 X-IronPort-AV: E=Sophos;i="5.88,213,1635231600"; d="scan'208";a="568813102" X-Received: from fm73lab177-1.amr.corp.intel.com ([10.80.209.189]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Dec 2021 18:47:45 -0800 From: "Rodrigo Gonzalez del Cueto" To: devel@edk2.groups.io Cc: Rodrigo Gonzalez del Cueto , Jian J Wang , Jiewen Yao Subject: [edk2-devel] [PATCH] SecurityPkg: Reallocate TPM Active PCRs based on platform support Date: Thu, 16 Dec 2021 18:47:36 -0800 Message-Id: <20211217024736.419-1-rodrigo.gonzalez.del.cueto@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,rodrigo.gonzalez.del.cueto@intel.com X-Gm-Message-State: 27WMeZ15UpYgXti5lSLvAwldx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1639709296; bh=7AElQB4T4OqSpkgzEaC7nvt3oZAPz98/xzxGfd1Hg8o=; h=Cc:Date:From:Reply-To:Subject:To; b=UdYjg+NwgSw231Jzq489mBLjh6vSCKCBzBCvWjQAEJlGvNBapxvxt3bkZrrME+/fHxS ML9brOOUb2JY1F6fIC936LabI7AEowaPn4mYQmFmdWNly/O2aqx0uKcmBhV8Qd5RUSHlz Jw0NkB6hnvribswAmq24P76KaeKY0IE6Rk0= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1639709298848100003 Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3515 In V4: Fixed patch format and uncrustify cleanup In V3: Cleaned up comments, debug prints and updated patch to use the new debug ENUM definitions. - Replaced EFI_D_INFO with DEBUG_INFO. - Replaced EFI_D_VERBOSE with DEBUG_VERBOSE. In V2: Add case to RegisterHashInterfaceLib logic RegisterHashInterfaceLib needs to correctly handle registering the HashLib instance supported algorithm bitmap when PcdTpm2HashMask is set to zero. The current implementation of SyncPcrAllocationsAndPcrMask() triggers PCR bank reallocation only based on the intersection between TpmActivePcrBanks and PcdTpm2HashMask. When the software HashLibBaseCryptoRouter solution is used, no PCR bank reallocation is occurring based on the supported hashing algorithms registered by the HashLib instances. Need to have an additional check for the intersection between the TpmActivePcrBanks and the PcdTcg2HashAlgorithmBitmap populated by the HashLib instances present on the platform's BIOS. Signed-off-by: Rodrigo Gonzalez del Cueto Cc: Jian J Wang Cc: Jiewen Yao --- SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDxe.c |= 11 ++++++++--- SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterPei.c |= 11 ++++++++--- SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c |= 43 +++++++++++++++++++++++++++++++------------ SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf |= 1 + 4 files changed, 48 insertions(+), 18 deletions(-) diff --git a/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoR= outerDxe.c b/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoR= outerDxe.c index 59639d0538..ee8fe6e06e 100644 --- a/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDx= e.c +++ b/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDx= e.c @@ -3,7 +3,7 @@ hash handler registered, such as SHA1, SHA256. Platform can use PcdTpm2HashMask to mask some hash engines. =20 -Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.
+Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -234,13 +234,18 @@ RegisterHashInterfaceLib ( { UINTN Index; UINT32 HashMask; + UINT32 Tpm2HashMask; EFI_STATUS Status; =20 // // Check allow // - HashMask =3D Tpm2GetHashMaskFromAlgo (&HashInterface->HashGuid); - if ((HashMask & PcdGet32 (PcdTpm2HashMask)) =3D=3D 0) { + HashMask =3D Tpm2GetHashMaskFromAlgo (&HashInterface->HashGuid); + Tpm2HashMask =3D PcdGet32 (PcdTpm2HashMask); + + if ((Tpm2HashMask !=3D 0) && + ((HashMask & Tpm2HashMask) =3D=3D 0)) + { return EFI_UNSUPPORTED; } =20 diff --git a/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoR= outerPei.c b/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoR= outerPei.c index e21103d371..eeb424b6c3 100644 --- a/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterPe= i.c +++ b/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterPe= i.c @@ -3,7 +3,7 @@ hash handler registered, such as SHA1, SHA256. Platform can use PcdTpm2HashMask to mask some hash engines. =20 -Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.
+Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -330,13 +330,18 @@ RegisterHashInterfaceLib ( UINTN Index; HASH_INTERFACE_HOB *HashInterfaceHob; UINT32 HashMask; + UINT32 Tpm2HashMask; EFI_STATUS Status; =20 // // Check allow // - HashMask =3D Tpm2GetHashMaskFromAlgo (&HashInterface->HashGuid); - if ((HashMask & PcdGet32 (PcdTpm2HashMask)) =3D=3D 0) { + HashMask =3D Tpm2GetHashMaskFromAlgo (&HashInterface->HashGuid); + Tpm2HashMask =3D PcdGet32 (PcdTpm2HashMask); + + if ((Tpm2HashMask !=3D 0) && + ((HashMask & Tpm2HashMask) =3D=3D 0)) + { return EFI_UNSUPPORTED; } =20 diff --git a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c b/SecurityPkg/Tcg/Tcg2Pei/Tc= g2Pei.c index a97a4e7f2d..0da89b795e 100644 --- a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c +++ b/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c @@ -1,7 +1,7 @@ /** @file Initialize TPM2 device and measure FVs before handing off control to DXE. =20 -Copyright (c) 2015 - 2020, Intel Corporation. All rights reserved.
+Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.
Copyright (c) 2017, Microsoft Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -252,7 +252,7 @@ EndofPeiSignalNotifyCallBack ( =20 /** Make sure that the current PCR allocations, the TPM supported PCRs, - and the PcdTpm2HashMask are all in agreement. + PcdTcg2HashAlgorithmBitmap and the PcdTpm2HashMask are all in agreement. **/ VOID SyncPcrAllocationsAndPcrMask ( @@ -261,6 +261,7 @@ SyncPcrAllocationsAndPcrMask ( { EFI_STATUS Status; EFI_TCG2_EVENT_ALGORITHM_BITMAP TpmHashAlgorithmBitmap; + EFI_TCG2_EVENT_ALGORITHM_BITMAP BiosHashAlgorithmBitmap; UINT32 TpmActivePcrBanks; UINT32 NewTpmActivePcrBanks; UINT32 Tpm2PcrMask; @@ -274,33 +275,50 @@ SyncPcrAllocationsAndPcrMask ( Status =3D Tpm2GetCapabilitySupportedAndActivePcrs (&TpmHashAlgorithmBit= map, &TpmActivePcrBanks); ASSERT_EFI_ERROR (Status); =20 + DEBUG ((DEBUG_INFO, "Tpm2GetCapabilitySupportedAndActivePcrs - TpmHashAl= gorithmBitmap: 0x%08x\n", TpmHashAlgorithmBitmap)); + DEBUG ((DEBUG_INFO, "Tpm2GetCapabilitySupportedAndActivePcrs - TpmActive= PcrBanks 0x%08x\n", TpmActivePcrBanks)); + Tpm2PcrMask =3D PcdGet32 (PcdTpm2HashMask); if (Tpm2PcrMask =3D=3D 0) { // - // if PcdTPm2HashMask is zero, use ActivePcr setting + // If PcdTpm2HashMask is zero, use ActivePcr setting. + // Only when PcdTpm2HashMask is initialized to 0, will it be updated t= o current Active Pcrs. // PcdSet32S (PcdTpm2HashMask, TpmActivePcrBanks); Tpm2PcrMask =3D TpmActivePcrBanks; } =20 - // - // Find the intersection of Pcd support and TPM support. - // If banks are missing from the TPM support that are in the PCD, update= the PCD. - // If banks are missing from the PCD that are active in the TPM, realloc= ate the banks and reboot. - // + DEBUG ((DEBUG_INFO, "Tpm2PcrMask 0x%08x\n", Tpm2PcrMask)); =20 // - // If there are active PCR banks that are not supported by the Platform = mask, - // update the TPM allocations and reboot the machine. + // The Active PCRs in the TPM need to be a strict subset of the hashing = algorithms supported by BIOS. // - if ((TpmActivePcrBanks & Tpm2PcrMask) !=3D TpmActivePcrBanks) { - NewTpmActivePcrBanks =3D TpmActivePcrBanks & Tpm2PcrMask; + // * Find the intersection of Pcd support and TPM active PCRs. If banks = are missing from the TPM support + // that are in the PCD, update the PCD. + // * Find intersection of TPM Active PCRs and BIOS supported algorithms.= If there are active PCR banks + // that are not supported by the platform, update the TPM allocations an= d reboot. + // Note: When the HashLibBaseCryptoRouter solution is used, the hash alg= orithm support from BIOS is reported + // by Tcg2HashAlgorithmBitmap, which is populated by HashLib insta= nces at runtime. + BiosHashAlgorithmBitmap =3D PcdGet32 (PcdTcg2HashAlgorithmBitmap); + DEBUG ((DEBUG_INFO, "Tcg2HashAlgorithmBitmap: 0x%08x\n", BiosHashAlgorit= hmBitmap)); + + if (((TpmActivePcrBanks & Tpm2PcrMask) !=3D TpmActivePcrBanks) || + ((TpmActivePcrBanks & BiosHashAlgorithmBitmap) !=3D TpmActivePcrBank= s)) + { + DEBUG ((DEBUG_INFO, "TpmActivePcrBanks & Tpm2PcrMask =3D 0x%08x\n", (T= pmActivePcrBanks & Tpm2PcrMask))); + DEBUG ((DEBUG_INFO, "TpmActivePcrBanks & BiosHashAlgorithmBitmap =3D 0= x%08x\n", (TpmActivePcrBanks & BiosHashAlgorithmBitmap))); + NewTpmActivePcrBanks =3D TpmActivePcrBanks; + NewTpmActivePcrBanks &=3D Tpm2PcrMask; + NewTpmActivePcrBanks &=3D BiosHashAlgorithmBitmap; + DEBUG ((DEBUG_INFO, "NewTpmActivePcrBanks 0x%08x\n", NewTpmActivePcrBa= nks)); =20 DEBUG ((DEBUG_INFO, "%a - Reallocating PCR banks from 0x%X to 0x%X.\n"= , __FUNCTION__, TpmActivePcrBanks, NewTpmActivePcrBanks)); + if (NewTpmActivePcrBanks =3D=3D 0) { DEBUG ((DEBUG_ERROR, "%a - No viable PCRs active! Please set a less = restrictive value for PcdTpm2HashMask!\n", __FUNCTION__)); ASSERT (FALSE); } else { + DEBUG ((DEBUG_ERROR, "Tpm2PcrAllocateBanks (TpmHashAlgorithmBitmap: = 0x%08x, NewTpmActivePcrBanks: 0x%08x)\n", TpmHashAlgorithmBitmap, NewTpmAct= ivePcrBanks)); Status =3D Tpm2PcrAllocateBanks (NULL, (UINT32)TpmHashAlgorithmBitma= p, NewTpmActivePcrBanks); if (EFI_ERROR (Status)) { // @@ -331,6 +349,7 @@ SyncPcrAllocationsAndPcrMask ( } =20 Status =3D PcdSet32S (PcdTpm2HashMask, NewTpm2PcrMask); + DEBUG ((DEBUG_ERROR, "Set PcdTpm2Hash Mask to 0x%08x\n", NewTpm2PcrMas= k)); ASSERT_EFI_ERROR (Status); } } diff --git a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf b/SecurityPkg/Tcg/Tcg2Pei/= Tcg2Pei.inf index 06c26a2904..17ad116126 100644 --- a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf +++ b/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf @@ -86,6 +86,7 @@ ## SOMETIMES_CONSUMES ## SOMETIMES_PRODUCES gEfiSecurityPkgTokenSpaceGuid.PcdTpm2HashMask + gEfiSecurityPkgTokenSpaceGuid.PcdTcg2HashAlgorithmBitmap = ## CONSUMES =20 [Depex] gEfiPeiMasterBootModePpiGuid AND --=20 2.26.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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