From nobody Sun May 5 15:00:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+84456+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+84456+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1638890442; cv=none; d=zohomail.com; s=zohoarc; b=Kw4aSqCLkWa5g35YFk9XiKLrx3aU52GvjIijArmVW/gaootYuGV9yILiwPt9fquwa8AtVysgt7ldeLMcML/dL3rUVnG1ePCZl2sLfeJ93zEXmEW5d97ZtyJ2uu/aoAbhT2lOz1eGLOTcGDKZVmFxMa51my9xew+kz5MtGN41lpg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1638890442; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=CGSJ4jhgLmy97+PzXFY3Al+51phBeZrp3hAYMqV8dmM=; b=nYS8LCkWHlP1hTEXhGsZkw0BIt5g+qDcvqdo6j6kaXMfwGM+RihU+2sEcGpk9qABKU0oI8xvXv5G6tsbBKPQFYxAH5KtbsesA91FAIZ9iCLqLMiZMxoknNgnNVwKRZ6z8dEJ3JJCLw8dzQYMnNbC3U/gVa0gy1B7LMOsuUsnvMs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+84456+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1638890442214505.4561151696063; Tue, 7 Dec 2021 07:20:42 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id c19LYY1788612xHVT2fM5MWF; Tue, 07 Dec 2021 07:20:41 -0800 X-Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mx.groups.io with SMTP id smtpd.web08.68383.1638890439750652418 for ; Tue, 07 Dec 2021 07:20:40 -0800 X-IronPort-AV: E=McAfee;i="6200,9189,10190"; a="261664701" X-IronPort-AV: E=Sophos;i="5.87,293,1631602800"; d="scan'208";a="261664701" X-Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Dec 2021 07:20:39 -0800 X-IronPort-AV: E=Sophos;i="5.87,293,1631602800"; d="scan'208";a="461295468" X-Received: from mczajkow-mobl.ger.corp.intel.com ([10.213.19.205]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Dec 2021 07:20:37 -0800 From: "Maciej Czajkowski" To: devel@edk2.groups.io Cc: Ray Ni , Rangasai V Chaganty Subject: [edk2-devel] [edk2platforms][PATCH v4 1/1] IntelSiliconPkg: Add IntelDieInfoProtocol Date: Tue, 7 Dec 2021 16:20:32 +0100 Message-Id: <20211207152032.932-2-maciej.czajkowski@intel.com> In-Reply-To: <20211207152032.932-1-maciej.czajkowski@intel.com> References: <20211207152032.932-1-maciej.czajkowski@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,maciej.czajkowski@intel.com X-Gm-Message-State: ZylyQiD9XZRPioJEyIiNOhQCx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1638890441; bh=0dgn77n7fBXvqM60RdFVOuXu6pJsUkhwIGt4mj9Ob5c=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=BXGfpyll84ZFtE6aVbWrpXSAKwlhX/JDFkvDia9dovM7j9FtbF6nKFRBhp8+JAJARgk Ceh9CWrCgXAwmlE9i+VeQ9m2Hy16Ix1iKNrLcwbAwNdTkFwg/vSNCjI5oYfXs2W3qm9eL BAYxFt24Muml0UChTGc8rpVCy6ZZ8VLcr1U= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1638890445612100007 Content-Type: text/plain; charset="utf-8" Added IntelDieInfo header into IntelSiliconPkg tree. The purpose is to have generic and unified interface for getting information about dies installed in the system. It will be implemented by silicon code. Cc: Ray Ni Cc: Rangasai V Chaganty Signed-off-by: Maciej Czajkowski Reviewed-by: Ray Ni Reviewed-by: Sai Chaganty --- Notes: v4: - removed Signature field =20 v3: - added EDKII_ prefix to interface - removed GUID definitons from .h file - corrected descriptions - made PPI/protocol GUIDs unique =20 v2: - added interface description - added die specific GUIDs into .dec file Silicon/Intel/IntelSiliconPkg/Include/Protocol/IntelDieInfo.h | 94 +++++++= +++++++++++++ Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 9 ++ 2 files changed, 103 insertions(+) diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Protocol/IntelDieInfo.h = b/Silicon/Intel/IntelSiliconPkg/Include/Protocol/IntelDieInfo.h new file mode 100644 index 000000000000..bba2908bf598 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Include/Protocol/IntelDieInfo.h @@ -0,0 +1,94 @@ +/** @file + IntelDieInfo definition + + Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ +#ifndef _DIE_INFO_PROTOCOL_H_ +#define _DIE_INFO_PROTOCOL_H_ + +typedef struct _EDKII_INTEL_DIE_INFO_PROTOCOL EDKII_INTEL_DIE_INFO_PROTOC= OL; +typedef EDKII_INTEL_DIE_INFO_PROTOCOL EDKII_INTEL_DIE_INFO_PPI; + +extern EFI_GUID gIntelDieInfoProtocolGuid; +extern EFI_GUID gIntelDieInfoPpiGuid; + +extern EFI_GUID gIntelDieInfoPchGuid; +extern EFI_GUID gIntelDieInfoSocGuid; +extern EFI_GUID gIntelDieInfoIoGuid; +extern EFI_GUID gIntelDieInfoCpuGuid; +extern EFI_GUID gIntelDieInfoGfxGuid; + +#define DIE_INFO_PROTOCOL_REVISION 1 + +/** + Returns pointer to constant string representing die name. + Name is specific to die type. + + @param[in] This Pointer to the DieInfoProtocol context structure + @retval Pointer to the const string +**/ +typedef +CONST CHAR8* +(EFIAPI *EDKII_INTEL_DIE_INFO_GET_DIE_NAME_STR) ( + IN EDKII_INTEL_DIE_INFO_PROTOCOL *This + ); + +/** + Returns pointer to constant string representing stepping of the die. + + @param[in] This Pointer to the DieInfoProtocol context structure + @retval Pointer to the const string +**/ +typedef +CONST CHAR8* +(EFIAPI *EDKII_INTEL_DIE_INFO_GET_STEPPING_STR) ( + IN EDKII_INTEL_DIE_INFO_PROTOCOL *This + ); + +/** + Returns pointer to constant string representing SKU of the die. + + @param[in] This Pointer to the DieInfoProtocol context structure + @retval Pointer to the const string +**/ +typedef +CONST CHAR8* +(EFIAPI *EDKII_INTEL_DIE_INFO_GET_SKU_STR) ( + IN EDKII_INTEL_DIE_INFO_PROTOCOL *This + ); + +/** + Protocol/PPI definition. + The purpose of this interface is to serve die-specific informations in a= unified, generic way. + It will be produced by silicon code per die, and can be consumed by any = module that needs contained information. + + Revision 1: + - Initial version. +**/ +struct _EDKII_INTEL_DIE_INFO_PROTOCOL { + UINT32 Revision; ///< Current protocol r= evision + /** + Type of the die that particular instance is reffering to. + **/ + EFI_GUID Type; + /** + Index of the die in the package. + **/ + UINT32 DieIndex; + /** + Unique ID specific to the die and the associated generation. + **/ + UINT64 DieId; + /** + Generation and die specific stepping ID. + **/ + UINT32 SteppingId; + + EDKII_INTEL_DIE_INFO_GET_DIE_NAME_STR GetNameStr; + EDKII_INTEL_DIE_INFO_GET_STEPPING_STR GetSteppingStr; + EDKII_INTEL_DIE_INFO_GET_SKU_STR GetSkuStr; +}; + +#endif // _DIE_INFO_PROTOCOL_H_ diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/In= tel/IntelSiliconPkg/IntelSiliconPkg.dec index f950c3d1c72b..e5b785ae6204 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec @@ -92,12 +92,20 @@ [Guids] gFlashRegionAllGuid =3D { 0xbabe60dc, 0xf88d, 0x4584, {0x9= e, 0x54, 0x57, 0x44, 0x4b, 0xe2, 0x6e, 0xf3 } } gFlashRegionMaxGuid =3D { 0x74c2e3c1, 0x8faa, 0x4659, {0xa= 7, 0xbb, 0x87, 0x1f, 0xbb, 0x61, 0xd3, 0xb4 } } =20 + ## Include/Protocol/IntelDieInfo.h + gIntelDieInfoPchGuid =3D { 0x62CB6D68, 0x4771, 0x4569, { 0x81, 0xFA, 0x1= E, 0x99, 0x6E, 0xA9, 0x91, 0xC5 }} + gIntelDieInfoSocGuid =3D { 0x63287105, 0x578E, 0x4799, { 0xBE, 0x55, 0x5= D, 0xDA, 0xCA, 0x03, 0x74, 0xD0 }} + gIntelDieInfoIoGuid =3D { 0x23DA4C74, 0x54A0, 0x4E01, { 0x83, 0xB1, 0x8C= , 0xA7, 0x43, 0x43, 0x1F, 0xF0 }} + gIntelDieInfoCpuGuid =3D { 0x6E5AF2E3, 0x5D84, 0x48F2, { 0x84, 0x28, 0x9= 9, 0xE4, 0x93, 0x4F, 0x51, 0xE4 }} + gIntelDieInfoGfxGuid =3D { 0x1D3D2599, 0x7A1C, 0x4B1E, { 0x8C, 0xC5, 0x0= F, 0x88, 0x27, 0xA0, 0x2E, 0xEC }} + [Ppis] ## Include/Ppi/Spi2.h gPchSpi2PpiGuid =3D { 0x63c40580, 0x10c4, 0x4a8e, { 0xb4, 0x16, 0x86, 0x= 85, 0x25, 0x7e, 0xce, 0x04 } } =20 gEdkiiVTdInfoPpiGuid =3D { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x6= 7, 0xaf, 0x2b, 0x25, 0x68, 0x4a } } gEdkiiVTdNullRootEntryTableGuid =3D { 0x3de0593f, 0x6e3e, 0x4542, { 0xa1= , 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } } + gIntelDieInfoPpiGuid =3D { 0xF9E45CBF, 0x1E21, 0x434A, { 0x90, 0x88, 0x1= D, 0x10, 0x38, 0xF3, 0x68, 0xF2 }} =20 [Protocols] ## Protocols that provide services for the Intel(R) PCH SPI Host Control= ler Compatibility Interface @@ -107,6 +115,7 @@ [Protocols] gPchSmmSpi2ProtocolGuid =3D { 0x2d1c0c43, 0x20d3, 0x40ae, { 0x99, 0x07, = 0x2d, 0xf0, 0xe7, 0x91, 0x21, 0xa5 } } =20 gEdkiiPlatformVTdPolicyProtocolGuid =3D { 0x3d17e448, 0x466, 0x4e20, { 0= x99, 0x9f, 0xb2, 0xe1, 0x34, 0x88, 0xee, 0x22 }} + gIntelDieInfoProtocolGuid =3D { 0xAED8A0A1, 0xFDE6, 0x4CF2, { 0xA3, 0x85= , 0x08, 0xF1, 0x25, 0xF2, 0x40, 0x37 }} =20 ## Protocol for device security policy. # Include/Protocol/PlatformDeviceSecurityPolicy.h --=20 2.27.0.windows.1 --------------------------------------------------------------------- Intel Technology Poland sp. z o.o. ul. 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