From nobody Tue Feb 10 23:12:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+84338+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+84338+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1638621061; cv=none; d=zohomail.com; s=zohoarc; b=LhUUQHiwzWdo6CQrryFPiLn8zvF5NxW6RsSl3vFck9n+IUf/4glCBaKjHYMf/el7KWCYdIcV5rfHvFESQUmADLaAghVbPj9kZgDcgr9nr7su4QCesMV/nNdVKe+8VcKU3WDxTRYP9GfZl7aMIMpJMQsoynJ9d7yqzoyxNxI1m5w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1638621061; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=1CNFrXXxGRY8pSkRbyufZ/iA6qfHm9yMqK61CHv/Q04=; b=fXxbVOPKqs1z3h4L9/KAVfEIzDWhkS88Q1nsvYx+MzYDcuXW+zWerjEU/EW8ForwLt0WXyHn34/RG7EdN5zqpx50JIJPc083Vww6/WhIO7OuOB4Y3bmwd0p/MWoRhvA9JKXNszJ8or3Fb+MBYFaT2Be9qvpzSNyUSFpz7WhRydo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+84338+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1638621061375374.51647528910917; Sat, 4 Dec 2021 04:31:01 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id f52WYY1788612xOBuXDczDCY; Sat, 04 Dec 2021 04:31:01 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.24251.1638621060321402792 for ; Sat, 04 Dec 2021 04:31:00 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6B235153B; Sat, 4 Dec 2021 04:30:55 -0800 (PST) X-Received: from usa.arm.com (a074744.blr.arm.com [10.162.17.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id BFE583F766; Sat, 4 Dec 2021 04:30:53 -0800 (PST) From: "chandni cherukuri" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Sami Mujawar , Chandni Cherukuri Subject: [edk2-devel] [edk2-platforms][PATCH V1 02/11] Platform/ARM/Morello: Add Platform Library support for Morello SoC Date: Sat, 4 Dec 2021 18:00:33 +0530 Message-Id: <20211204123042.32140-3-chandni.cherukuri@arm.com> In-Reply-To: <20211204123042.32140-1-chandni.cherukuri@arm.com> References: <20211204123042.32140-1-chandni.cherukuri@arm.com> Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,chandni.cherukuri@arm.com X-Gm-Message-State: oeQYRRGgY3T0QOrOwIkOtO60x1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1638621061; bh=2Dm8QkAsM1mPLpwR+QXXcsPFHRxTrHhiKRxnGxzw+sA=; h=Cc:Date:From:Reply-To:Subject:To; b=vvAbpww3W4ziZa0d061tXpWjTI9Ofw23ng3yhPRZ6flBsj105w+9qWWJWYOPORCXitt lEhToCcHovtu69QElLrJs4H0IatG36WlaKO8QDbPkpBFr8tGW9I/Wz+yw04TBWG7gRUmq L7UvZFizJb1zXWd00zAKNCmRBwquNZPINfQ= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1638621062954100001 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" It includes virutal memory map for Morello SoC platform. Signed-off-by: Chandni Cherukuri Reviewed-by: Sami Mujawar --- Platform/ARM/Morello/Library/PlatformLib/PlatformLibSoc.inf | 44 +++++ Platform/ARM/Morello/Library/PlatformLib/PlatformLibMemSoc.c | 176 +++++++= +++++++++++++ 2 files changed, 220 insertions(+) diff --git a/Platform/ARM/Morello/Library/PlatformLib/PlatformLibSoc.inf b/= Platform/ARM/Morello/Library/PlatformLib/PlatformLibSoc.inf new file mode 100644 index 000000000000..bc31b8709152 --- /dev/null +++ b/Platform/ARM/Morello/Library/PlatformLib/PlatformLibSoc.inf @@ -0,0 +1,44 @@ +## @file +# Platform Library for Morello SoC platform. +# +# Copyright (c) 2021, ARM Limited. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x0001001B + BASE_NAME =3D ArmMorelloLib + FILE_GUID =3D 7858ED56-9716-454F-90D7-D117B05063EA + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D ArmPlatformLib + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Platform/ARM/Morello/MorelloPlatform.dec + +[Sources.common] + PlatformLib.c + PlatformLibMemSoc.c + +[Sources.AARCH64] + AArch64/Helper.S | GCC + +[FixedPcd] + gArmMorelloTokenSpaceGuid.PcdDramBlock2Base + + gArmTokenSpaceGuid.PcdArmPrimaryCore + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask + gArmTokenSpaceGuid.PcdSystemMemoryBase + gArmTokenSpaceGuid.PcdSystemMemorySize + +[Guids] + gEfiHobListGuid ## CONSUMES ## SystemTable + +[Ppis] + gArmMpCoreInfoPpiGuid diff --git a/Platform/ARM/Morello/Library/PlatformLib/PlatformLibMemSoc.c b= /Platform/ARM/Morello/Library/PlatformLib/PlatformLibMemSoc.c new file mode 100644 index 000000000000..67dd8469feb8 --- /dev/null +++ b/Platform/ARM/Morello/Library/PlatformLib/PlatformLibMemSoc.c @@ -0,0 +1,176 @@ +/** @file + + Copyright (c) 2021, ARM Limited. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include +#include +#include +#include +#include + +// The total number of descriptors, including the final "end-of-table" des= criptor. +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 9 + +#if !defined (MDEPKG_NDEBUG) + STATIC CONST CHAR8 *gTblAttrDesc[] =3D { + "UNCACHED_UNBUFFERED ", + "NONSECURE_UNCACHED_UNBUFFERED", + "WRITE_BACK ", + "NONSECURE_WRITE_BACK ", + "WB_NONSHAREABLE ", + "NONSECURE_WB_NONSHAREABLE ", + "WRITE_THROUGH ", + "NONSECURE_WRITE_THROUGH ", + "DEVICE ", + "NONSECURE_DEVICE " + }; +#endif + +#define LOG_MEM(desc) DEBUG (( = \ + DEBUG_ERROR, = \ + desc, = \ + VirtualMemoryTable[Index].PhysicalBase, = \ + (VirtualMemoryTable[Index].PhysicalBase + = \ + VirtualMemoryTable[Index].Length - 1), = \ + VirtualMemoryTable[Index].Length, = \ + gTblAttrDesc[VirtualMemoryTable[Index].Attributes]= \ + )); + +/** + Returns the Virtual Memory Map of the platform. + + This Virtual Memory Map is used by MemoryInitPei Module to initialize th= e MMU + on your platform. + + @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR descr= ibing + a Physical-to-Virtual Memory mapping. This = array + must be ended by a zero-filled entry. +**/ +VOID +ArmPlatformGetVirtualMemoryMap ( + OUT ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryMap + ) +{ + UINTN Index; + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; + EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; + MORELLO_PLAT_INFO *PlatInfo; + UINT64 DramBlock2Size; + + Index =3D 0; + DramBlock2Size =3D 0; + + PlatInfo =3D (MORELLO_PLAT_INFO *)MORELLO_PLAT_INFO_STRUCT_BASE; + if (PlatInfo->LocalDdrSize > MORELLO_DRAM_BLOCK1_SIZE) { + DramBlock2Size =3D PlatInfo->LocalDdrSize - MORELLO_DRAM_BLOCK1_SIZE; + } + + if (DramBlock2Size !=3D 0) { + ResourceAttributes =3D + EFI_RESOURCE_ATTRIBUTE_PRESENT | + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_TESTED; + + BuildResourceDescriptorHob ( + EFI_RESOURCE_SYSTEM_MEMORY, + ResourceAttributes, + FixedPcdGet64 (PcdDramBlock2Base), + DramBlock2Size + ); + } + + ASSERT (VirtualMemoryMap !=3D NULL); + + VirtualMemoryTable =3D AllocatePool ( + sizeof (ARM_MEMORY_REGION_DESCRIPTOR) * + MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS + ); + if (VirtualMemoryTable =3D=3D NULL) { + return; + } + + DEBUG (( + DEBUG_ERROR, + " Memory Map\n--------------------------------------------------------= --\n" + )); + DEBUG (( + DEBUG_ERROR, + "Description : START - END = " \ + "[ SIZE ] { ATTR }\n" + )); + + // SubSystem Peripherals - Generic Watchdog + VirtualMemoryTable[Index].PhysicalBase =3D MORELLO_GENERIC_WDOG_BASE; + VirtualMemoryTable[Index].VirtualBase =3D MORELLO_GENERIC_WDOG_BASE; + VirtualMemoryTable[Index].Length =3D MORELLO_GENERIC_WDOG_SZ; + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUTE_DEV= ICE; + LOG_MEM ("Generic Watchdog : 0x%016lx - 0x%016lx [ 0x%016= lx ] { %a }\n"); + + // SubSystem Peripherals - GIC-600 + VirtualMemoryTable[++Index].PhysicalBase =3D MORELLO_GIC_BASE; + VirtualMemoryTable[Index].VirtualBase =3D MORELLO_GIC_BASE; + VirtualMemoryTable[Index].Length =3D MORELLO_GIC_SZ; + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUTE_DEV= ICE; + LOG_MEM ("GIC-600 : 0x%016lx - 0x%016lx [ 0x%016= lx ] { %a }\n"); + + // SubSystem Peripherals - GICR-600 + VirtualMemoryTable[++Index].PhysicalBase =3D MORELLO_GICR_BASE; + VirtualMemoryTable[Index].VirtualBase =3D MORELLO_GICR_BASE; + VirtualMemoryTable[Index].Length =3D MORELLO_GICR_SZ; + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUTE_DEV= ICE; + LOG_MEM ("GICR-600 : 0x%016lx - 0x%016lx [ 0x%016= lx ] { %a }\n"); + + // SubSystem non-secure SRAM + VirtualMemoryTable[++Index].PhysicalBase =3D MORELLO_NON_SECURE_SRAM_BAS= E; + VirtualMemoryTable[Index].VirtualBase =3D MORELLO_NON_SECURE_SRAM_BAS= E; + VirtualMemoryTable[Index].Length =3D MORELLO_NON_SECURE_SRAM_SZ; + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUTE_UNC= ACHED_UNBUFFERED; + LOG_MEM ("non-secure SRAM : 0x%016lx - 0x%016lx [ 0x%016= lx ] { %a }\n"); + + // SubSystem Pheripherals - UART0 + VirtualMemoryTable[++Index].PhysicalBase =3D MORELLO_UART0_BASE; + VirtualMemoryTable[Index].VirtualBase =3D MORELLO_UART0_BASE; + VirtualMemoryTable[Index].Length =3D MORELLO_UART0_SZ; + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUTE_DEV= ICE; + LOG_MEM ("UART0 : 0x%016lx - 0x%016lx [ 0x%016= lx ] { %a }\n"); + + // DDR Primary + VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdSystemMemoryBa= se); + VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdSystemMemoryBa= se); + VirtualMemoryTable[Index].Length =3D PcdGet64 (PcdSystemMemorySize); + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUTE_WRI= TE_BACK; + LOG_MEM ("DDR Primary : 0x%016lx - 0x%016lx [ 0x%016= lx ] { %a }\n"); + + // DDR Secondary + if (DramBlock2Size !=3D 0) { + VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdDramBlock2Ba= se); + VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdDramBlock2Ba= se); + VirtualMemoryTable[Index].Length =3D DramBlock2Size; + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUTE_W= RITE_BACK; + LOG_MEM ("DDR Secondary : 0x%016lx - 0x%016lx [ 0x%0= 16lx ] { %a }\n"); + } + + // Expansion Peripherals + VirtualMemoryTable[++Index].PhysicalBase =3D MORELLO_EXP_PERIPH_BASE; + VirtualMemoryTable[Index].VirtualBase =3D MORELLO_EXP_PERIPH_BASE; + VirtualMemoryTable[Index].Length =3D MORELLO_EXP_PERIPH_BASE_SZ; + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUTE_DEV= ICE; + LOG_MEM ("Expansion Peripherals : 0x%016lx - 0x%016lx [ 0x%016= lx ] { %a }\n"); + + // End of Table + VirtualMemoryTable[++Index].PhysicalBase =3D 0; + VirtualMemoryTable[Index].VirtualBase =3D 0; + VirtualMemoryTable[Index].Length =3D 0; + VirtualMemoryTable[Index].Attributes =3D (ARM_MEMORY_REGION_ATTRIBUTES)0; + + ASSERT ((Index) < MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); + DEBUG ((DEBUG_INIT, "Virtual Memory Table setup complete.\n")); + + *VirtualMemoryMap =3D VirtualMemoryTable; +} --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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