From nobody Mon Feb 9 14:33:31 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+82533+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+82533+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1634917620; cv=none; d=zohomail.com; s=zohoarc; b=Qz+c4SU6iICS1zkZOLpWIAZ/8hj64CTHci4gl7VMASyyP72Z75mupQA2lnx+DjZlORTSJONu/T4hWj2GteWIi+qQLG4ZQChKjft90aWr4p3Nd8QMOxHWXTXaYd6y12dD0Y1Dl4ZRvHn5ALtGNCDxVWmu5b0MdAOlbx4xzTWGeQQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1634917620; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=Et7yMSN0PiAcQ6HRakzbqRi4b+yBPGi4flZM8ZWNT8A=; b=CcI1xTI74QI3lqzKLhktpOVYmpWCwrX7KPWNcPe9g/KlFVVnACglrcw4WdQbei9p0hKJTY02hz/Is9F7lfmA27UkDMQNnV6s+rps+Xj0823+hSz9x9vp5FeU1BSL+8ZaLf5LMEcHTGWXMe0uR2wv/wsDlKzlOZhAopE8DvEOzBI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+82533+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1634917620032799.4737513143014; Fri, 22 Oct 2021 08:47:00 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id rOpIYY1788612xPeRB6xbJfE; Fri, 22 Oct 2021 08:46:59 -0700 X-Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web10.10216.1634917618991189270 for ; Fri, 22 Oct 2021 08:46:59 -0700 X-IronPort-AV: E=McAfee;i="6200,9189,10145"; a="209428360" X-IronPort-AV: E=Sophos;i="5.87,173,1631602800"; d="scan'208";a="209428360" X-Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Oct 2021 08:46:41 -0700 X-IronPort-AV: E=Sophos;i="5.87,173,1631602800"; d="scan'208";a="445333059" X-Received: from gdong1-mobl1.amr.corp.intel.com ([10.212.41.65]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Oct 2021 08:46:40 -0700 From: "Guo Dong" To: devel@edk2.groups.io Cc: Guo Dong , Ray Ni , Maurice Ma , Benjamin You Subject: [edk2-devel] [`edk2-devel][PATCH V3 2/8] UefiPayloadPkg: Add a common SMM control Runtime DXE module Date: Fri, 22 Oct 2021 08:46:21 -0700 Message-Id: <20211022154627.1607-3-guo.dong@intel.com> In-Reply-To: <20211022154627.1607-1-guo.dong@intel.com> References: <20211022154627.1607-1-guo.dong@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,guo.dong@intel.com X-Gm-Message-State: M0fI3HhHcdxASNzueXbbhbMAx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1634917619; bh=ciUfzLzWq/qPC5Ca4/QEAX5CuXknoZV1AxmGjHHyRXE=; h=Cc:Date:From:Reply-To:Subject:To; b=LuSAYTUg3/vWGbtgQGz00Z8vYNF5SHr8lZ2+MBCj5h0KGjbNxtQ8tfuUeXtxFsFcbqA P/i8yqBJWii4WaTC2ni0QApZ6WN0ZRqFJMoHVeKLpSwqdlLEgEps8JIyypqYKa4WcQk6A Y8q1IL+Q3JApRA/JbseNORUsUxkp8vjls78= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1634918524487100001 Content-Type: text/plain; charset="utf-8" From: Guo Dong This module consumes SMM Registers HOB (SMI_GBL_EN and SMI_APM_EN) to install SMM control 2 protocol gEfiSmmControl2ProtocolGuid. The protocol activate() would set SMI_GBL_EN and SMI_APM_EN and trigger SMI by writing to IO port 0xB3 and 0xB2. Signed-off-by: Guo Dong Cc: Ray Ni Cc: Maurice Ma Cc: Benjamin You Reviewed-by: Ray Ni Reviewed-by: Benjamin You --- .../Include/Guid/SmmRegisterInfoGuid.h | 48 ++++ .../SmmControlRuntimeDxe.c | 256 ++++++++++++++++++ .../SmmControlRuntimeDxe.inf | 50 ++++ UefiPayloadPkg/UefiPayloadPkg.dec | 2 + 4 files changed, 356 insertions(+) create mode 100644 UefiPayloadPkg/Include/Guid/SmmRegisterInfoGuid.h create mode 100644 UefiPayloadPkg/SmmControlRuntimeDxe/SmmControlRuntimeDx= e.c create mode 100644 UefiPayloadPkg/SmmControlRuntimeDxe/SmmControlRuntimeDx= e.inf diff --git a/UefiPayloadPkg/Include/Guid/SmmRegisterInfoGuid.h b/UefiPayloa= dPkg/Include/Guid/SmmRegisterInfoGuid.h new file mode 100644 index 0000000000..8a1d3d7486 --- /dev/null +++ b/UefiPayloadPkg/Include/Guid/SmmRegisterInfoGuid.h @@ -0,0 +1,48 @@ +/** @file + This file defines the SMM info hob structure. + + Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef PAYLOAD_SMM_REGISTER_INFO_GUID_H_ +#define PAYLOAD_SMM_REGISTER_INFO_GUID_H_ + +#include + +/// +/// SMM Information GUID +/// +extern EFI_GUID gSmmRegisterInfoGuid; + +/// +/// Reuse ACPI definition +/// AddressSpaceId(0xC0-0xFF) is defined by OEM for MSR and other spaces +/// +typedef EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE PLD_GENERIC_ADDRESS; + +#define REGISTER_ID_SMI_GBL_EN 1 +#define REGISTER_ID_SMI_GBL_EN_LOCK 2 +#define REGISTER_ID_SMI_EOS 3 +#define REGISTER_ID_SMI_APM_EN 4 +#define REGISTER_ID_SMI_APM_STS 5 + +#pragma pack(1) +typedef struct { + UINT64 Id; + UINT64 Value; + PLD_GENERIC_ADDRESS Address; +} PLD_GENERIC_REGISTER; + +typedef struct { + UINT16 Revision; + UINT16 Reserved; + UINT32 Count; + PLD_GENERIC_REGISTER Registers[0]; +} PLD_SMM_REGISTERS; + + +#pragma pack() + +#endif diff --git a/UefiPayloadPkg/SmmControlRuntimeDxe/SmmControlRuntimeDxe.c b/U= efiPayloadPkg/SmmControlRuntimeDxe/SmmControlRuntimeDxe.c new file mode 100644 index 0000000000..6dd91e2601 --- /dev/null +++ b/UefiPayloadPkg/SmmControlRuntimeDxe/SmmControlRuntimeDxe.c @@ -0,0 +1,256 @@ +/** @file + This module produces the SMM Control2 Protocol + + Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SMM_DATA_PORT 0xB3 +#define SMM_CONTROL_PORT 0xB2 + +typedef struct { + UINT8 GblBitOffset; + UINT8 ApmBitOffset; + UINT32 Address; +} SMM_CONTROL2_REG; + +SMM_CONTROL2_REG mSmiCtrlReg; + +/** + Invokes SMI activation from either the preboot or runtime environment. + + This function generates an SMI. + + @param[in] This The EFI_SMM_CONTROL2_PROTOCOL instanc= e. + @param[in,out] CommandPort The value written to the command port. + @param[in,out] DataPort The value written to the data port. + @param[in] Periodic Optional mechanism to engender a peri= odic stream. + @param[in] ActivationInterval Optional parameter to repeat at this = period one + time or, if the Periodic Boolean is s= et, periodically. + + @retval EFI_SUCCESS The SMI has been engendered. + @retval EFI_DEVICE_ERROR The timing is unsupported. + @retval EFI_INVALID_PARAMETER The activation period is unsupported. + @retval EFI_INVALID_PARAMETER The last periodic activation has not been= cleared. + @retval EFI_NOT_STARTED The MM base service has not been initiali= zed. +**/ +EFI_STATUS +EFIAPI +Activate ( + IN CONST EFI_SMM_CONTROL2_PROTOCOL *This, + IN OUT UINT8 *CommandPort OPTIONAL, + IN OUT UINT8 *DataPort OPTIONAL, + IN BOOLEAN Periodic OPTIONAL, + IN EFI_SMM_PERIOD ActivationInterval OPTIONAL + ) +{ + UINT32 SmiEn; + UINT32 SmiEnableBits; + + if (Periodic) { + return EFI_INVALID_PARAMETER; + } + + SmiEn =3D IoRead32 (mSmiCtrlReg.Address); + SmiEnableBits =3D (1 << mSmiCtrlReg.GblBitOffset) | (1 << mSmiCtrlReg.Ap= mBitOffset); + if ((SmiEn & SmiEnableBits) !=3D SmiEnableBits) { + // + // Set the "global SMI enable" bit and APM bit + // + IoWrite32 (mSmiCtrlReg.Address, SmiEn | SmiEnableBits); + } + + IoWrite8 (SMM_DATA_PORT, DataPort =3D=3D NULL ? 0 : *DataPort); + IoWrite8 (SMM_CONTROL_PORT, CommandPort =3D=3D NULL ? 0 : *CommandPort); + return EFI_SUCCESS; +} + +/** + Clears an SMI. + + @param This Pointer to an instance of EFI_SMM_CONTROL2_PROTOCOL + @param Periodic TRUE to indicate a periodical SMI + + @return Return value from SmmClear () + +**/ +EFI_STATUS +EFIAPI +Deactivate ( + IN CONST EFI_SMM_CONTROL2_PROTOCOL *This, + IN BOOLEAN Periodic + ) +{ + if (Periodic) { + return EFI_INVALID_PARAMETER; + } + + // + // Temporarily do nothing here + // + return EFI_SUCCESS; +} + +/// +/// SMM COntrol2 Protocol instance +/// +EFI_SMM_CONTROL2_PROTOCOL mSmmControl2 =3D { + Activate, + Deactivate, + 0 +}; + +/** + Get specified SMI register based on given register ID + + @param[in] SmmRegister SMI related register array from bootloader + @param[in] Id The register ID to get. + + @retval NULL The register is not found or the format is not = expected. + @return smi register + +**/ +PLD_GENERIC_REGISTER * +GetSmmCtrlRegById ( + IN PLD_SMM_REGISTERS *SmmRegister, + IN UINT32 Id + ) +{ + UINT32 Index; + PLD_GENERIC_REGISTER *PldReg; + + PldReg =3D NULL; + for (Index =3D 0; Index < SmmRegister->Count; Index++) { + if (SmmRegister->Registers[Index].Id =3D=3D Id) { + PldReg =3D &SmmRegister->Registers[Index]; + break; + } + } + + if (PldReg =3D=3D NULL) { + DEBUG ((DEBUG_INFO, "Register %d not found.\n", Id)); + return NULL; + } + + // + // Checking the register if it is expected. + // + if ((PldReg->Address.AccessSize !=3D EFI_ACPI_3_0_DWORD) || + (PldReg->Address.Address =3D=3D 0) || + (PldReg->Address.RegisterBitWidth !=3D 1) || + (PldReg->Address.AddressSpaceId !=3D EFI_ACPI_3_0_SYSTEM_IO) || + (PldReg->Value !=3D 1)) { + DEBUG ((DEBUG_INFO, "Unexpected SMM register.\n")); + DEBUG ((DEBUG_INFO, "AddressSpaceId=3D 0x%x\n", PldReg->Address.Addres= sSpaceId)); + DEBUG ((DEBUG_INFO, "RegBitWidth =3D 0x%x\n", PldReg->Address.Regist= erBitWidth)); + DEBUG ((DEBUG_INFO, "RegBitOffset =3D 0x%x\n", PldReg->Address.Regist= erBitOffset)); + DEBUG ((DEBUG_INFO, "AccessSize =3D 0x%x\n", PldReg->Address.Access= Size)); + DEBUG ((DEBUG_INFO, "Address =3D 0x%lx\n",PldReg->Address.Addres= s )); + return NULL; + } + return PldReg; +} + + +/** + Fixup data pointers so that the services can be called in virtual mode. + + @param[in] Event The event registered. + @param[in] Context Event context. + +**/ +VOID +EFIAPI +SmmControlVirtualAddressChangeEvent ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + EfiConvertPointer (0x0, (VOID **) &(mSmmControl2.Trigger)); + EfiConvertPointer (0x0, (VOID **) &(mSmmControl2.Clear)); +} + + +/** + This function installs EFI_SMM_CONTROL2_PROTOCOL. + + @param ImageHandle Handle for the image of this driver + @param SystemTable Pointer to the EFI System Table + + @retval EFI_UNSUPPORTED There's no Intel ICH on this platform + @return The status returned from InstallProtocolInterface(). + +**/ +EFI_STATUS +EFIAPI +SmmControlEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_HOB_GUID_TYPE *GuidHob; + PLD_SMM_REGISTERS *SmmRegister; + PLD_GENERIC_REGISTER *SmiGblEnReg; + PLD_GENERIC_REGISTER *SmiApmEnReg; + EFI_EVENT Event; + + GuidHob =3D GetFirstGuidHob (&gSmmRegisterInfoGuid); + if (GuidHob =3D=3D NULL) { + return EFI_UNSUPPORTED; + } + + SmmRegister =3D (PLD_SMM_REGISTERS *) (GET_GUID_HOB_DATA(GuidHob)); + SmiGblEnReg =3D GetSmmCtrlRegById (SmmRegister, REGISTER_ID_SMI_GBL_EN); + if (SmiGblEnReg =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "SMI global enable reg not found.\n")); + return EFI_NOT_FOUND; + } + mSmiCtrlReg.Address =3D (UINT32)SmiGblEnReg->Address.Address; + mSmiCtrlReg.GblBitOffset =3D SmiGblEnReg->Address.RegisterBitOffset; + + SmiApmEnReg =3D GetSmmCtrlRegById (SmmRegister, REGISTER_ID_SMI_APM_EN); + if (SmiApmEnReg =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "SMI APM enable reg not found.\n")); + return EFI_NOT_FOUND; + } + + if (SmiApmEnReg->Address.Address !=3D mSmiCtrlReg.Address) { + DEBUG ((DEBUG_ERROR, "SMI APM EN and SMI GBL EN are expected to have s= ame register base\n")); + DEBUG ((DEBUG_ERROR, "APM:0x%x, GBL:0x%x\n", SmiApmEnReg->Address.Addr= ess, mSmiCtrlReg.Address)); + return EFI_UNSUPPORTED; + } + mSmiCtrlReg.ApmBitOffset =3D SmiApmEnReg->Address.RegisterBitOffset; + + // + // Install our protocol interfaces on the device's handle + // + Status =3D gBS->InstallMultipleProtocolInterfaces ( + &ImageHandle, + &gEfiSmmControl2ProtocolGuid, + &mSmmControl2, + NULL + ); + ASSERT_EFI_ERROR (Status); + + Status =3D gBS->CreateEventEx ( + EVT_NOTIFY_SIGNAL, + TPL_NOTIFY, + SmmControlVirtualAddressChangeEvent, + NULL, + &gEfiEventVirtualAddressChangeGuid, + &Event + ); + return Status; +} diff --git a/UefiPayloadPkg/SmmControlRuntimeDxe/SmmControlRuntimeDxe.inf b= /UefiPayloadPkg/SmmControlRuntimeDxe/SmmControlRuntimeDxe.inf new file mode 100644 index 0000000000..f0c2a4586b --- /dev/null +++ b/UefiPayloadPkg/SmmControlRuntimeDxe/SmmControlRuntimeDxe.inf @@ -0,0 +1,50 @@ +## @file +# SMM Control runtime DXE Module +# +# Provides the ability to generate a software SMI. +# +# Copyright (c) 2021, Intel Corporation. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D SmmControlRuntimeDxe + FILE_GUID =3D C3099578-F815-4a96-84A3-FC593760181D + MODULE_TYPE =3D DXE_RUNTIME_DRIVER + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D SmmControlEntryPoint + +# +# The following information is for reference only and not required by the = build tools. +# +# VALID_ARCHITECTURES =3D IA32 X64 +# + +[Sources] + SmmControlRuntimeDxe.c + +[Packages] + MdePkg/MdePkg.dec + UefiPayloadPkg/UefiPayloadPkg.dec + +[LibraryClasses] + UefiDriverEntryPoint + DebugLib + UefiBootServicesTableLib + UefiRuntimeLib + PcdLib + IoLib + HobLib + +[Guids] + gSmmRegisterInfoGuid + gEfiEventVirtualAddressChangeGuid + +[Protocols] + gEfiSmmControl2ProtocolGuid ## PRODUCES + +[Depex] + TRUE diff --git a/UefiPayloadPkg/UefiPayloadPkg.dec b/UefiPayloadPkg/UefiPayload= Pkg.dec index e5e8db8863..4f93d3e671 100644 --- a/UefiPayloadPkg/UefiPayloadPkg.dec +++ b/UefiPayloadPkg/UefiPayloadPkg.dec @@ -37,6 +37,8 @@ gUefiSerialPortInfoGuid =3D { 0x6c6872fe, 0x56a9, 0x4403, { 0xbb, 0x98,= 0x95, 0x8d, 0x62, 0xde, 0x87, 0xf1 } } gLoaderMemoryMapInfoGuid =3D { 0xa1ff7424, 0x7a1a, 0x478e, { 0xa9, 0xe4,= 0x92, 0xf3, 0x57, 0xd1, 0x28, 0x32 } } =20 + gSmmRegisterInfoGuid =3D { 0xaa9bd7a7, 0xcafb, 0x4499, { 0xa4, 0xa9,= 0xb, 0x34, 0x6b, 0x40, 0xa6, 0x22 } } + [Ppis] gEfiPayLoadHobBasePpiGuid =3D { 0xdbe23aa1, 0xa342, 0x4b97, {0x85, 0xb6,= 0xb2, 0x26, 0xf1, 0x61, 0x73, 0x89} } =20 --=20 2.32.0.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#82533): https://edk2.groups.io/g/devel/message/82533 Mute This Topic: https://groups.io/mt/86517141/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-