From nobody Sun May 5 16:50:40 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+82530+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+82530+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1634915490; cv=none; d=zohomail.com; s=zohoarc; b=kXggGetFR11TdulqxikYAumBqOUbMD/3kNbQxhoJDcHe/udxCd97qxJaLfcbKw1NUjxSCmAJa60NccLsOl8CVDq3UM/sYgrxM+sz9iCIuI5m+G8fcjYr5fTvYmHzBOeioGc2w7rdeVjKX9fIv4VibU3OoJa6jRTdZteqg5pmpVU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1634915490; h=Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=t1OWGY+PgpIbyzvIp14YmE0psy79nALYJRLLfx5joUE=; b=MdB+YGxUTNNGwHVFkfvf1ka6yS/OGBMjYveN6GZ0u6taN4e4a0NVAVepl8fdBlBuZ6/zHEkC80aEN+YthvyFo0HXpfMHQ6CKAjsSHNwipns1xfBvkgOVgUKcwFj9DTPbvu4MNtZ9X14hbBbnIICZf1b2FfMLnIgEaklHKiqkfAQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+82530+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1634915490410372.63696781122076; Fri, 22 Oct 2021 08:11:30 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id jHarYY1788612xKBsq82cYVJ; Fri, 22 Oct 2021 08:11:30 -0700 X-Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mx.groups.io with SMTP id smtpd.web10.5864.1634894115788676114 for ; Fri, 22 Oct 2021 02:15:17 -0700 X-IronPort-AV: E=McAfee;i="6200,9189,10144"; a="290101523" X-IronPort-AV: E=Sophos;i="5.87,172,1631602800"; d="scan'208";a="290101523" X-Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Oct 2021 02:15:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,172,1631602800"; d="scan'208";a="663108116" X-Received: from ikuox-desk1.gar.corp.intel.com ([10.227.107.18]) by orsmga005.jf.intel.com with ESMTP; 22 Oct 2021 02:15:12 -0700 From: ian.chiu@intel.com To: devel@edk2.groups.io Cc: Ian Chiu , Ian Chiu , Maggie Chu , Ray Ni , Hao A Wu Subject: [edk2-devel] [PATCH] MdeModulePkg\UfsBlockIoPei: UFS MMIO address size support both 32/64 bit Date: Fri, 22 Oct 2021 17:15:01 +0800 Message-Id: <20211022091501.1991-1-ian.chiu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ian.chiu@intel.com X-Gm-Message-State: ZDSqeEtPBUEkQXUWfmZOsvCyx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1634915490; bh=eyz4XkLH5wI5iMhnJ2py69IQd/5iUQCfEkuAde3e398=; h=Cc:Date:From:Reply-To:Subject:To; b=QTzNOtDqDRJgVOSOrp1YshZQHxC9CIZYSrsk1Hx1RvhmgRqJpjLrW1amKXFyjQCHjVK fabMRG5077OfMnO4xYid9mcGQ2+D1QxkOYk9ZSV5cpczg4qw+rLR8bCmhB488Tt4LlUMx sNrGFQ1693nvfmpGmysYEgKf8ZsN1QFPRRk= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1634915492665100002 Content-Type: text/plain; charset="utf-8" From: Ian Chiu https://bugzilla.tianocore.org/show_bug.cgi?id=3D3703 MMIO base address size will overflow while finding two or more Host controller in the system. Correct it and support 32 and 64 bits address space. Signed-off-by: Ian Chiu Cc: Maggie Chu Cc: Ray Ni Cc: Hao A Wu --- MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.c | 37 ++++++++++++++++++++++= ++-- 1 file changed, 35 insertions(+), 2 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.c b/MdeModulePkg/= Bus/Pci/UfsPciHcPei/UfsPciHcPei.c index 447a05b5b2..69a19c60a2 100644 --- a/MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.c +++ b/MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.c @@ -76,6 +76,7 @@ InitializeUfsHcPeim ( UINT16 Device; UINT16 Function; UINT32 Size; + UINT64 MmioSize; UINT8 SubClass; UINT8 BaseClass; UFS_HC_PEI_PRIVATE_DATA *Private; @@ -119,16 +120,48 @@ InitializeUfsHcPeim ( PciAnd16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OF= FSET), (UINT16)~(EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE)= ); PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADD= RESSREG_OFFSET), 0xFFFFFFFF); Size =3D PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_= BASE_ADDRESSREG_OFFSET)); + + switch (Size & 0x07) { + case 0x0: + // + // Memory space: anywhere in 32 bit address space + // + MmioSize =3D (~(Size & 0xFFFFFFF0)) + 1; + break; + case 0x4: + // + // Memory space: anywhere in 64 bit address space + // + MmioSize =3D Size & 0xFFFFFFF0; + + // + // Fix the length to support some spefic 64 bit BAR + // + Size |=3D ((UINT32)(-1) << HighBitSet32 (Size)); + + // + // Calculate the size of 64bit bar + // + MmioSize |=3D LShiftU64 ((UINT64) Size, 32); + MmioSize =3D (~(MmioSize)) + 1; + break; + default: + // + // Unknown BAR type + // + ASSERT (FALSE); + continue; + }; // // Assign resource to the Ufs Pci host controller's MMIO BAR. // Enable the Ufs Pci host controller by setting BME and MSE bit= s of PCI_CMD register. // - PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADD= RESSREG_OFFSET), (UINT32)(PcdGet32 (PcdUfsPciHostControllerMmioBase) + Size= * Private->TotalUfsHcs)); + PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADD= RESSREG_OFFSET), (UINT32)(PcdGet32 (PcdUfsPciHostControllerMmioBase) + Mmio= Size * Private->TotalUfsHcs)); PciOr16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFF= SET), (EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE)); // // Record the allocated Mmio base address. // - Private->UfsHcPciAddr[Private->TotalUfsHcs] =3D PcdGet32 (PcdUfs= PciHostControllerMmioBase) + Size * Private->TotalUfsHcs; + Private->UfsHcPciAddr[Private->TotalUfsHcs] =3D PcdGet32 (PcdUfs= PciHostControllerMmioBase) + (UINTN) MmioSize * Private->TotalUfsHcs; Private->TotalUfsHcs++; ASSERT (Private->TotalUfsHcs < MAX_UFS_HCS); } --=20 2.16.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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