From nobody Mon Feb 9 00:55:24 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+82335+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+82335+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=hpe.com ARC-Seal: i=1; a=rsa-sha256; t=1634634530; cv=none; d=zohomail.com; s=zohoarc; b=QyHwY8YsNPY1Wv0+EyhV/o3pBBAdcSNaGVlhr0WlGkoN/Ay1ck8DBo/h/byvlgHld54w7x49CoYC6ZZlzVQ4ZE62gwHcAHplGyaAc/dzXpEWjl9d8vUPV9d4knsElSRgqUxWlDsX3CmtGsJvzOZaAtHX5skSIX0x1xI0Qcb3dxw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1634634530; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=zvaMO7HnI2sZLiZcUohWaKVGY7Sghaa1SSUR4RLbjXE=; b=Rc//BszhBzxY0J0DymH+8wSmUPt4WplPArresC4DqUMpIrVyVYFRBoxtAsXmd13Zlwvhvvb9h/TV19HjA+cd6RNORApO+2slyig6Knn0POd8B5wqugX81qlshzpN51o2GyORHbJq954fkP5IS7YJOjEz8/khtjEsWI//R/ohRxU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+82335+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1634634530538274.52536750563456; Tue, 19 Oct 2021 02:08:50 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id D7auYY1788612xHV4rsAovOB; Tue, 19 Oct 2021 02:08:50 -0700 X-Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by mx.groups.io with SMTP id smtpd.web12.7280.1634634525737042338 for ; Tue, 19 Oct 2021 02:08:49 -0700 X-Received: from pps.filterd (m0150241.ppops.net [127.0.0.1]) by mx0a-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19J91tM6017711; Tue, 19 Oct 2021 09:08:45 GMT X-Received: from g4t3426.houston.hpe.com (g4t3426.houston.hpe.com [15.241.140.75]) by mx0a-002e3701.pphosted.com with ESMTP id 3bs9b3qs05-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Oct 2021 09:08:45 +0000 X-Received: from g9t2301.houston.hpecorp.net (g9t2301.houston.hpecorp.net [16.220.97.129]) by g4t3426.houston.hpe.com (Postfix) with ESMTP id 7283462; Tue, 19 Oct 2021 09:08:44 +0000 (UTC) X-Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g9t2301.houston.hpecorp.net (Postfix) with ESMTP id 62B274A; Tue, 19 Oct 2021 09:08:43 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Sunil V L , Daniel Schaefer Subject: [edk2-devel] [edk2-platforms][PATCH 23/30] RiscV/ProcessorPkg: Create read mtime CSR library instances Date: Tue, 19 Oct 2021 16:10:00 +0800 Message-Id: <20211019081007.31165-24-abner.chang@hpe.com> In-Reply-To: <20211019081007.31165-1-abner.chang@hpe.com> References: <20211019081007.31165-1-abner.chang@hpe.com> MIME-Version: 1.0 X-Proofpoint-GUID: CTrae0VZ-_E3GuevROCMwPLReHcC_qXA X-Proofpoint-ORIG-GUID: CTrae0VZ-_E3GuevROCMwPLReHcC_qXA X-HPE-SCL: -1 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,abner.chang@hpe.com X-Gm-Message-State: 6Y3Ad1CkmHyQSPgrxwAga9kfx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1634634530; bh=5jf7HUksUNBoA6q4R7ysWPwQ8nGaoGLMzfCeuHc0goI=; h=Cc:Date:From:Reply-To:Subject:To; b=NEpPLdeMhR7jj/UuE0//SosRbXj0UVHrlykBZU+xTkT9enN8TSFMTovbqjeQqUP1Pdt iTI2FSijRNPTF+o8giymcsQbOttpMxRBuXvtaP3WECn90G9halpR/bCiriNfBGSSZswzY LDdfVMf07yhZcGzAP1g90KMSZsrmTjmTEU4= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1634634531604100001 Content-Type: text/plain; charset="utf-8" Create library instances of reading Machine mode timer. - MacineModeTimerLib is used to read mtime CSR through platfrom library. - EmulatedMacineModeTimerLib is used to read mtime CSR through shadow CSR. Cc: Sunil V L Cc: Daniel Schaefer Signed-off-by: Abner Chang --- .../RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc | 2 + .../EmulatedMachineModeTimerLib.inf | 34 +++++++++++++++++ .../MachineModeTimerLib.inf | 38 +++++++++++++++++++ .../Include/IndustryStandard/RiscV.h | 5 +++ .../Include/Library/RiscVCpuLib.h | 3 ++ .../EmulatedMachineModeTimerLib.S | 24 ++++++++++++ .../MachineModeTimerLib/MachineModeTimerLib.S | 25 ++++++++++++ 7 files changed, 131 insertions(+) create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineMod= eTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineMod= eTimer/MachineModeTimerLib/MachineModeTimerLib.inf create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineMod= eTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.S create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineMod= eTimer/MachineModeTimerLib/MachineModeTimerLib.S diff --git a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc b/Silicon/RI= SC-V/ProcessorPkg/RiscVProcessorPkg.dsc index 531319322c..3b5738957d 100644 --- a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc +++ b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc @@ -44,6 +44,8 @@ RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/Risc= VEdk2SbiLib.inf RiscVOpensbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/Risc= VOpensbiLib.inf TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf + MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachine= ModeTimer/MachineModeTimerLib/MachineModeTimerLib.inf + #MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachin= eModeTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf BaseLib|MdePkg/Library/BaseLib/BaseLib.inf BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.i= nf diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/= EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf b/Silicon/RISC-= V/ProcessorPkg/Library/RiscVReadMachineModeTimer/EmulatedMachineModeTimerLi= b/EmulatedMachineModeTimerLib.inf new file mode 100644 index 0000000000..369028a9a6 --- /dev/null +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/Emulate= dMachineModeTimerLib/EmulatedMachineModeTimerLib.inf @@ -0,0 +1,34 @@ +## @file +# Library to read Machine Mode Timer. +# +# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right= s reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x0001001b + BASE_NAME =3D EmulatedMachineModeTimerLib + FILE_GUID =3D 81B82615-D85C-4377-8BFF-7442322E2835 + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D MachineModeTimerLib + +# +# The following information is for reference only and not required by the = build tools. +# +# VALID_ARCHITECTURES =3D RISCV64 +# + +[Sources] + +[Sources.RISCV64] + EmulatedMachineModeTimerLib.S + +[Packages] + MdePkg/MdePkg.dec + Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec + + + diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/= MachineModeTimerLib/MachineModeTimerLib.inf b/Silicon/RISC-V/ProcessorPkg/L= ibrary/RiscVReadMachineModeTimer/MachineModeTimerLib/MachineModeTimerLib.inf new file mode 100644 index 0000000000..71d4315445 --- /dev/null +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/Machine= ModeTimerLib/MachineModeTimerLib.inf @@ -0,0 +1,38 @@ +## @file +# Library to read Machine Mode Timer. +# +# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right= s reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x0001001b + BASE_NAME =3D MachineModeTimerLib + FILE_GUID =3D 6390D8AA-E0E6-4625-A515-9BB2DC7BBCAB + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D MachineModeTimerLib + +# +# The following information is for reference only and not required by the = build tools. +# +# VALID_ARCHITECTURES =3D RISCV64 +# + +[Sources] + +[Sources.RISCV64] + MachineModeTimerLib.S + +[Packages] + MdePkg/MdePkg.dec + Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec + +[LibraryClasses] + RiscVCpuLib + RiscVPlatformTimerLib + + + diff --git a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h b= /Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h index f6726bda24..c9715a2ee2 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h @@ -154,4 +154,9 @@ #define RISCV_CSR_MTOHOST 0x780 #define RISCV_CSR_MFROMHOST 0x781 =20 +// +// User mode CSR +// +#define RISCV_CSR_CYCLE 0xc00 +#define RISCV_CSR_TIME 0xc01 #endif diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h b/Si= licon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h index f70723567e..8d51152fa9 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h @@ -32,6 +32,9 @@ RiscVGetMachineTrapCause (VOID); UINT64 RiscVReadMachineTimer (VOID); =20 +UINT64 +RiscVReadMachineTimerInterface (VOID); + VOID RiscVSetMachineTimerCmp (UINT64); =20 diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/= EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.S b/Silicon/RISC-V/= ProcessorPkg/Library/RiscVReadMachineModeTimer/EmulatedMachineModeTimerLib/= EmulatedMachineModeTimerLib.S new file mode 100644 index 0000000000..1acd0ab062 --- /dev/null +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/Emulate= dMachineModeTimerLib/EmulatedMachineModeTimerLib.S @@ -0,0 +1,24 @@ +//------------------------------------------------------------------------= ------ +// +// Read Machine mode timer using shadow CSR. +// +// Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +//------------------------------------------------------------------------= ------ +#include + +.data + +.text +.align 3 + +.global ASM_PFX(RiscVReadMachineTimerInterface) +// +// Read machine mode timer CSR through shadow CSR. +// @retval a0 : 64-bit machine timer. +// +ASM_PFX (RiscVReadMachineTimerInterface): + csrr a0, RISCV_CSR_TIME + ret diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/= MachineModeTimerLib/MachineModeTimerLib.S b/Silicon/RISC-V/ProcessorPkg/Lib= rary/RiscVReadMachineModeTimer/MachineModeTimerLib/MachineModeTimerLib.S new file mode 100644 index 0000000000..16f8bdd70a --- /dev/null +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/Machine= ModeTimerLib/MachineModeTimerLib.S @@ -0,0 +1,25 @@ +//------------------------------------------------------------------------= ------ +// +// Read mtimer through platform library. +// +// Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +//------------------------------------------------------------------------= ------ +#include + +.data + +.text +.align 3 + +.global ASM_PFX(RiscVReadMachineTimerInterface) +// +// Read machine mode timer CSR. +// @retval a0 : 64-bit machine timer. +// +ASM_PFX (RiscVReadMachineTimerInterface): + call RiscVReadMachineTimer + ret + --=20 2.31.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#82335): https://edk2.groups.io/g/devel/message/82335 Mute This Topic: https://groups.io/mt/86435688/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-